JPH05109714A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To restrain the generation of defects, by patterning a second mask film turning to a practical mask for plating by using a first mask film and an etching mask film which are formed on the upper layer of the second mask film. CONSTITUTION:After an etching mask film 6 is patterned and left on a plating film forming region, a first mask 5 and the unnecessary part of a second conducting film 4 are eliminated. After the etching mask film 6 is eliminated, a second mask film 7 is formed on the whole surface of the first mask 5. The head part of the first mask 5 is exposed by etching-back the second mask 7, and the second conducting film 4 is exposed by eliminating the first mask 5. A plated film 8 is selectively formed on the exposed second conducting film 4 by electro-plating or electroless plating wherein the second mask film 7 is used as a plating mask. Thereby the yield in the manufacturing process can be improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming wiring by a plating method.

[0002]

2. Description of the Related Art A conventional method of forming wiring in a semiconductor device manufacturing process will be described with reference to FIG.

First, as shown in FIG. 3A, a silicon oxide film 2 having a thickness of about 500 nm is formed on a semiconductor substrate 1 by using a thermal oxidation method or a CVD method using SiH ₄ gas, and 10 wt. % Of the titanium-tungsten alloy to which the first conductive film 3 is added is a known technique. C. Film formation power of 1.0 to 2.0 kw and film formation pressure of 2 to 10 mTorr by magnetron sputtering method.
Under the above conditions, it is formed with a thickness of 100 nm. Further, on the first conductive film 3, a second conductive film 4 made of, for example, gold, platinum, palladium, rhodium or the like is formed by using the same method with a film forming power of 0.2 to 1.0 kw and a film forming pressure. It is formed with a thickness of 20 to 50 nm under the condition of 2 to 10 mTorr.

The first conductive film 3 functions as a plating film to be formed in a later step, a diffusion preventing barrier metal of the second conductive film 4, and an adhesion layer between the upper wiring and the insulating film present in the lower layer. It is formed for the purpose of the base (current supply layer) during plating, stable film formation / growth during plating film formation, ensuring adhesion of the plating film, and protecting the surface of the first conductive film from the plating solution. is there.

Subsequently, as shown in FIG. 3 (b), a photolithography method using a g-line or an i-line is performed to obtain 100
Forming a second mask film 7 made of a photoresist film having a thickness of 0 to 2000 nm on the second conductive film 4;
The unnecessary portion is removed and patterning is performed. Further, a plating film 8 made of, for example, gold or copper is selectively formed with a thickness of 500 to 1500 nm only on the exposed second conductive film 4 by using a known electrolytic plating method.

When the plating film 8 is gold and the film forming method is electrolytic plating, the plating solution used for electrolytic gold plating contains sodium gold sulphate and sulfuric acid as main components, and an additive such as a flattening agent and a pH stabilizer. About 10 per liter to which is added
An almost neutral non-cyan type containing g of gold is used. Electrolytic plating has a plating temperature of 35 to 65 ° C and a current density of 1
It is preferable to carry out under the condition of ˜4 mA / cm ² .

Subsequently, as shown in FIG. 3C, the second mask film 7 is removed by a wet stripping method using an organic solvent or an ashing method using O ₂ plasma, and the plating film 8 is further used as an etching mask. As the wet etching method using aqua regia and hydrogen peroxide solution, the ion milling method using Ar gas as a milling source, or CF ₄ , SF ₆
The first conductive film 3 and the second conductive film 4 are formed by a known method such as the reactive ion etching method using the above-mentioned fluorine-based gas.
The unnecessary portion of is removed to form a wiring pattern. For example, in the case of the wet etching method, the concentration of aqua regia is 10 to 20%, the temperature is 25 to 30 ° C., and the concentration of hydrogen peroxide is 50 to 100%.
It is preferably carried out under the condition of a temperature of 25 to 30 ° C.

The first step is performed on the silicon oxide film 2 by the above process.
Wiring composed of the conductive film 3, the second conductive film 4, and the plated film 8 was formed.

[0009]

The above-mentioned conventional method of manufacturing a semiconductor device has the following drawbacks.

First, a photoresist film is used as a plating mask film, and a second conductive film having a high reflectance such as gold is present under the photoresist film. It is easy to draw a skirt. Therefore, the shape of the plated wiring is deteriorated and the dimensional controllability is deteriorated, and it is difficult to obtain wiring having stable electric characteristics.

Secondly, in the case of removing a chemically conductive material such as gold or platinum after plating or a second conductive film which is difficult to gasify during etching such as copper, it is difficult to remove by ordinary reactive ion etching. Therefore, it is removed by a physical method such as ion milling, wet etching or high temperature reactive ion etching.

However, in the case of ion milling, dust is liable to be generated, which causes a short circuit defect and reduces the yield. In the case of wet etching, the amount of dust is small, but the etching proceeds isotropically and side etching occurs, so that it cannot be applied to a fine pattern. In the case of high temperature reactive ion etching, corrosion is likely to occur in copper, which causes a defect.

[0013]

According to the method of manufacturing a semiconductor device of the present invention, an insulating film, a barrier, a first conductive film for adhesion, a second conductive film for power supply, a first mask film, and etching are formed on a semiconductor substrate. A step of sequentially forming a mask film, a step of patterning the etching mask film to leave it in a plating film forming region, and then removing an unnecessary portion of the first mask film and the second conductive film, and the etching mask film Forming a second mask film over the entire surface including the exposed first mask film surface after removing the film, a step of etching back the second mask film to expose the head of the first mask film, and a head. Removing the exposed first mask film to expose the second conductive film, and electrolytic or electroless plating using the second mask film as a plating mask to form a plated film on the exposed second conductive film. It is intended to include a step of selectively forming.

[0014]

According to the method of manufacturing a semiconductor device of the present invention, the second mask film, which is an actual plating mask, is patterned by using the first mask film and the etching mask film formed on the upper layer of the second mask film. It is possible to form fine plated wiring having a good shape and good dimensional controllability without being affected by reflected light from the second conductive film. Furthermore, since the unnecessary portion of the second conductive film is removed before forming the plated wiring, the influence of dust and corrosion can be greatly reduced, and the yield can be improved.

[0015]

The present invention will be described below with reference to the drawings. 1A to 1D are sectional views of a semiconductor chip shown in the order of manufacturing steps for explaining a first embodiment of the present invention.

First, as shown in FIG. 1A, the semiconductor substrate 1
Thermal oxidation method, thermal CVD using SiH ₄ as the main reaction gas
Method or a known method such as a plasma CVD method is used to form a silicon oxide film 2 having a thickness of about 500 nm. Next, titanium is deposited on the silicon oxide film 2 with 10 titanium.
The first conductive film 3 made of a titanium-tungsten alloy added by wt% is a known technique. C. Film formation power of 1.0 to 2.0k by magnetron sputtering method
w, 100 n under the conditions of film forming pressure of 2 to 10 mTorr
The second conductive film 4 made of, for example, gold is formed on the first conductive film 3 by a similar method to form a film with a film forming power of 0.2 to 1.0 kw and a film forming pressure of 2. -10m
It is formed with a thickness of 20 to 50 nm under the conditions of Torr.

The first conductive film 3 functions as a plating film formed in a later step, a barrier metal for preventing diffusion of constituent elements of the second conductive film 4, and an adhesion layer between the upper wiring and the insulating film existing in the lower layer. The second conductive film 4 is for the purpose of a base (current supply layer) during plating, stable film formation / growth during plating film formation, ensuring adhesion of the plating film, and protecting the surface of the first conductive film 3 from the plating solution. In addition to gold, platinum, rhodium, osmium, iridium, ruthenium and other metals can be used.

Next, the first mask film 5 made of, for example, a silicon oxide film is formed at a temperature of 300 ° C. and SiH ₄ = 300 by a plasma CVD method using SiH ₄ and N ₂ O gas.
SCCM, N ₂ O = 1200 SCCM, 0.25 Tor
Under the condition of r, it is formed on the second conductive film 4 to have a thickness of 500 to 1500 nm, and is further positively formed on the first mask film 5 by a known photolithography method using g line or i line. After the etching mask film 6 made of photoresist is selectively formed to a thickness of 1000 to 2000, unnecessary portions of the first mask film are removed by a reactive ion etching method using a fluorine-based gas such as CF _{4 to} SF _6. Is removed and over-etching is applied. Although depending on the etching conditions, if over-etching of about 50% to 200% is applied, the second conductive film 4 exposed in the lower layer after the removal of the first mask film will be subjected to ion bombardment, similar to ion milling. By this phenomenon, the constituent atoms of the second conductive film are scattered, so that the extremely thin second conductive film 4 can be removed.

Next, as shown in FIG. 1B, the etching mask film 6 is removed by both the O ₂ plasma ashing method and the wet stripping method using an organic solvent. Second conductive film 4
It is preferable to remove the etching mask 6 by using both steps as much as possible in order to sufficiently remove dust and redeposits that are likely to occur in the removal step.

Further, a second mask film 7 made of a material having high coating flatness such as photoresist or polyimide is applied to a thickness of 2000 to 4000 nm by using a spin coating method, and the second mask film 7 is applied under a non-oxidizing atmosphere at 100 to 100 nm. Bake at 150 ° C. for 30-60 minutes.

[0021] followed by flattened etched back by reactive ion etching the first mask layer and the thickness equivalent to or until thinner it than about 100 nm, using a CF ₄ or CF ₄ + O ₂ gas.

Next, as shown in FIG. 1C, the first mask film 5 is removed using hydrofluoric acid. Although the patterned second mask film 7 remains by this operation, this mask film has a rectangular shape without tailing, and the dimensional change with respect to the original mask is small.

Subsequently, as shown in FIG. 1 (d), a plating film 8 is selectively formed with a thickness of 500 to 1500 nm on the exposed second conductive film 4 by an electrolytic gold plating method. At this time, the plating current flows through the lower first conductive film 3 to the second conductive film 4. Electrolytic gold plating has sulfuric acid, sodium gold sulfate, phosphoric acid, nitric acid, etc. as the main components, and a flattening agent, brightening agent, and pH stabilizer are added to this. Use the electrolytic gold plating solution. Plating temperature 40-60 ℃, current density 1-5m
It is preferable to carry out plating under the condition of A / cm ² .

Further, the second mask film 7 is removed by an ashing method using O ₂ plasma or a peeling method using an organic solvent, and the plating film is used as an etching mask.
The exposed first conductive film 3 is removed by a reactive ion etching method using a fluorine-based gas such as F ₄ or SF ₆ to form a wiring pattern. When the second mask film 7 is removed, not the second conductive film 4 which is hard to be reactively etched but the first conductive film 3 which is easily reactively etched is present in the lower layer, so that the generation of dust is significantly reduced. it can.

The wiring formed in this manner has a small dimensional change, is a rectangular shape without tailing, and produces very little dust during the process of removing unnecessary portions, so that it is more stable than conventional manufacturing methods. Fine wiring with characteristics can be obtained with high yield. The wiring structure of the semiconductor integrated circuit device of the present invention is applicable regardless of the type of semiconductor integrated device such as MOS and bipolar.

2 (a) to 2 (c) are sectional views of a semiconductor chip for explaining the second embodiment of the present invention.

First, as shown in FIG. 2A, a thickness 500 is formed on the semiconductor substrate 1 by using the same method as that of the first embodiment.
nm silicon oxide film 2, a first conductive film 3A made of 100 nm thick titanium nitride formed by a reactive sputtering method using N ₂ gas, and a selectively formed thickness of 20 to 50 nm. Second composed of thick copper
500 to 1 composed of conductive film 4A and photoresist
A structure composed of the second mask film 7 having a thickness of 500 nm is formed. Conventionally, reactive ion etching at a high temperature was required to remove copper without depositing residues or deposits. However, in the present embodiment, the second conductive film 4A is thin, and the residues and deposits are not removed before plating. It is not necessary because the position object can be removed.

Subsequently, as shown in FIG. 2B, a plating film 8A is selectively formed with a thickness of 500 to 15000 nm on the exposed second conductive film 4A by an electrolytic copper plating method. Electrolytic copper plating uses a plating solution containing sulfuric acid, copper sulfate, and chlorine as main components and additives such as a flattening agent and a pH stabilizer, and a plating temperature of 20 to 50 ° C. and a current density of 1
It is performed under the condition of 10 mA / cm ² .

Further, as shown in FIG. 2C, the second mask film 7 is removed by an ashing method using O ₂ plasma or a peeling method using an organic solvent, and CCl ₄ or the like is used with the plating film 8A as an etching mask. First conductive film 3 exposed by the reactive ion etching method using the chlorine-based gas
A is removed to form a wiring pattern. When the second mask film 7 is removed, only the first conductive film, not the second conductive film made of copper, which is difficult to reactively etch, is present in the lower layer, so that the etching is easy and the generation of dust is significantly increased. It can be reduced. Further, since the high temperature etching step of copper, which has been necessary in the past, is no longer necessary, the occurrence of corrosion can be suppressed. The wiring formed in this way has a small dimensional change, is a rectangular shape without tailing, and generates very little dust during the process of removing unnecessary parts, so it has a stable electrical characteristic compared with conventional manufacturing methods. Similar to the first embodiment, it is possible to obtain high-quality wiring with high yield.

[0030]

As described above, according to the method of manufacturing a semiconductor device of the present invention, the second mask film serving as an actual plating mask is patterned using the first mask film and the etching mask film formed thereabove. Therefore, it is possible to form fine plated wiring having a good shape, good dimensional controllability, and stable electrical characteristics without being affected by reflected light from the second conductive film existing in the lower layer. Further, since the unnecessary portion of the second conductive film is removed before forming the plated wiring, the generation of dust can be greatly reduced, and the generation of defects due to wiring short-circuiting can be significantly suppressed, so that the yield in the manufacturing process can be improved. There is.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a semiconductor chip showing a first embodiment of the present invention in the order of manufacturing steps.

FIG. 2 is a cross-sectional view of a semiconductor chip showing a second embodiment of the present invention in the order of manufacturing steps.

FIG. 3 is a cross-sectional view of a semiconductor chip showing a conventional semiconductor device manufacturing method in the order of manufacturing steps.

[Explanation of symbols]

 1 semiconductor substrate 2 silicon oxide film 3, 3A first conductive film 4, 4A second conductive film 5 first mask film 6 etching mask film 7 second mask film 8, 8A plating film

Claims (1)

[Claims] 1. A step of sequentially forming an insulating film, a barrier, a first conductive film for adhesion, a second conductive film for power supply, a first mask film and an etching mask film on a semiconductor substrate, and the etching mask film. Patterning to leave an unnecessary portion of the first mask film and the second conductive film after being left in the plating film formation region, and the entire surface including the exposed first mask film surface after removing the etching mask film A step of forming a second mask film on the first mask film, a step of etching back the second mask film to expose the head portion of the first mask film, and a step of removing the first mask film with the exposed head portion to remove the second mask film. And a step of selectively forming a plating film on the exposed second conductive film by performing electrolytic or electroless plating using the second mask film as a plating mask. Half A method for manufacturing a conductor device.