JPH0499051A - Film carrier mounting structure - Google Patents
Film carrier mounting structureInfo
- Publication number
- JPH0499051A JPH0499051A JP2208598A JP20859890A JPH0499051A JP H0499051 A JPH0499051 A JP H0499051A JP 2208598 A JP2208598 A JP 2208598A JP 20859890 A JP20859890 A JP 20859890A JP H0499051 A JPH0499051 A JP H0499051A
- Authority
- JP
- Japan
- Prior art keywords
- metal foil
- semiconductor chip
- resin
- substrate
- film carrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011888 foil Substances 0.000 claims abstract description 41
- 239000002184 metal Substances 0.000 claims abstract description 40
- 239000004065 semiconductor Substances 0.000 claims abstract description 36
- 239000011347 resin Substances 0.000 claims abstract description 29
- 229920005989 resin Polymers 0.000 claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 239000004642 Polyimide Substances 0.000 claims 1
- 229920001721 polyimide Polymers 0.000 claims 1
- 230000017525 heat dissipation Effects 0.000 abstract description 17
- 230000000694 effects Effects 0.000 abstract description 11
- 239000004020 conductor Substances 0.000 abstract description 7
- 230000001681 protective effect Effects 0.000 abstract description 3
- 230000005855 radiation Effects 0.000 description 9
- 239000011253 protective coating Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Wire Bonding (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は電子機器の半導体装に使用するフィルムキャリ
ア実装構造体に関し、とくに半導体チップの放熱構造の
改良に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a film carrier mounting structure used in a semiconductor package of an electronic device, and particularly relates to an improvement in a heat dissipation structure of a semiconductor chip.
従来の技術
近年、フィルムキャリアパッケージは電子機器の小形化
、薄形化の実装技術として広く使用されている。2. Description of the Related Art In recent years, film carrier packages have been widely used as a packaging technology for making electronic devices smaller and thinner.
以下に従来のフィルムキャリア実装構造体について説明
する。A conventional film carrier mounting structure will be described below.
第２図は従来のフィルムキャリアパッケージの基板への
実装状態における断面図を示すものである。FIG. 2 shows a cross-sectional view of a conventional film carrier package in a state where it is mounted on a board.
第２図において、３０は半導体チップ、３１はフィルム
キャリア、３２はインナーリード、３３は導体、３４は
基板への接続をするアウターリード、３５は半導体チッ
プ３ｏの表面保護樹脂、３６はフィルムキャリアパッケ
ージの保護コート樹脂、３７は基板である。In FIG. 2, 30 is a semiconductor chip, 31 is a film carrier, 32 is an inner lead, 33 is a conductor, 34 is an outer lead for connection to the substrate, 35 is a surface protection resin for the semiconductor chip 3o, and 36 is a film carrier package. 37 is a protective coating resin, and 37 is a substrate.
第３図は第２図のフィルムキャリアパッケージに放熱フ
ィンを取り付けた実装構造図を示し、３８はその放熱フ
ィン、３９は熱伝導樹脂である。FIG. 3 shows a mounting structure diagram in which a radiation fin is attached to the film carrier package of FIG. 2, 38 is the radiation fin, and 39 is a heat conductive resin.
以上のように構成されたフィルムキャリア実装構造体に
ついて、以下その放熱動作について説明する。The heat dissipation operation of the film carrier mounting structure configured as described above will be explained below.
半導体チップ３ｏで発生した熱は大別して３通シの熱伝
導によって放熱される。第１は半導体チップ３ｏから保
護コート樹脂３６を介して空気中に熱伝導される。第２
は半導体チップ３０に接続したインナーリード３２．導
体３３．アウターリード３４を介して基板の導体４０に
熱伝導される。The heat generated in the semiconductor chip 3o is roughly divided into three ways and radiated by heat conduction. First, heat is conducted from the semiconductor chip 3o into the air via the protective coating resin 36. Second
are inner leads 32 . connected to the semiconductor chip 30 . Conductor 33. Heat is conducted to the conductor 40 of the board via the outer lead 34.
第３は半導体チップ３０から半導体チップ３０の表面保
護樹脂３５．保護コート樹脂３６を介して、実装基板３
７に熱伝導される。The third is the surface protection resin 35 of the semiconductor chip 30. Mounting board 3 via protective coat resin 36
Heat is conducted to 7.
一方、放熱フィンを取り付けた第３図においては、前記
第１の熱伝導経路は半導体チップ３ｏから高熱伝導樹脂
３９．放熱フィン３８を介して放熱される。第２．第３
の放熱経路は放熱フィン３８を設けていないものと同じ
である。On the other hand, in FIG. 3 in which the radiation fins are attached, the first heat conduction path is from the semiconductor chip 3o to the high heat conductive resin 39. Heat is radiated via the heat radiating fins 38. Second. Third
The heat radiation path is the same as that without the radiation fins 38.
これらの熱伝導はおのおの単独に発生するものではなく
、複合的に発生し、その総合的な熱伝導によって半導体
チップ３０の放熱が行なわれる。These heat conductions do not occur individually, but occur in combination, and the heat dissipation of the semiconductor chip 30 is performed by the overall heat conduction.
一般的に放熱フィン３８を使用しない場合は、前記第２
のフィルムキャリア実装構造体リードからの熱伝導と前
記第３の実装基板への熱伝導とによる放熱経路が効果的
であり、放熱フィン３８を使用する場合は放熱フィン３
８を経由する第１の放熱が効果的である。Generally, when the radiation fins 38 are not used, the second
The heat radiation path by the heat conduction from the film carrier mounting structure lead and the heat conduction to the third mounting board is effective, and when the radiation fin 38 is used, the radiation fin 3
The first heat dissipation via 8 is effective.
発明が解決しようとする課題
しかしながら上記の従来の構成では、消費電力の大きい
半導体チップ３ｏの場合は十分でなく、その放熱のため
にフィルムキャリア実装構造体上に大きい放熱フィン３
８を取り付けねばならず、コストも高くなるばかシか、
その構造も複雑になるという欠点を有していた。Problems to be Solved by the Invention However, the above-mentioned conventional configuration is not sufficient for the semiconductor chip 3o, which consumes a large amount of power.
8 would have to be installed and the cost would be high, right?
The structure also had the disadvantage of being complicated.
本発明は上記従来の欠点を解決するもので、簡単な構成
で容易に放熱効果を高めることができ、放熱フィンをも
不要にすることが可能となる優れたフィルムキャリア実
装構造体を提供することを目的とする。The present invention solves the above-mentioned conventional drawbacks, and provides an excellent film carrier mounting structure that can easily improve the heat dissipation effect with a simple configuration and eliminate the need for heat dissipation fins. With the goal.
課題を解決するための手段
この目的を達成するために本発明のフィルムキャリア実
装構造体は、内層金属箔と表面に信号配線を持った基板
の表面に、少なくとも半導体チップの占有する面積以上
の面積を持った表面金属箔部を設け、この表面金属箔部
をフルーホールによって前記基板の前記内層金属箔に接
続し、フィルムキャリアパッケージの前記半導体チップ
と前記基板の前記基面金属箔部との間を高熱伝導樹脂に
よって充填する構成を有している。Means for Solving the Problems In order to achieve this object, the film carrier mounting structure of the present invention has an inner layer of metal foil and a surface area of a substrate having signal wiring on the surface, at least an area larger than the area occupied by the semiconductor chip. A surface metal foil portion having a surface metal foil portion is provided, and the surface metal foil portion is connected to the inner layer metal foil of the substrate through a full hole, and the surface metal foil portion is connected to the inner layer metal foil portion of the substrate, and the surface metal foil portion is connected to the inner layer metal foil portion of the substrate. It has a structure in which it is filled with high heat conductive resin.
作 用
この構成によって本発明のフィルムキャリア実装構造体
は、半導体チップで発生した熱が高熱伝導樹脂を介し、
基板表面に設けた表面金属箔部に伝導され、さらにスル
ーホールを介して内層金属箔に伝導される。この内層金
属箔は半導体チップに比べ著しく大きい面積を有してお
シ、非常に大きい放熱フィンとして機能することとなる
。Effect With this configuration, the film carrier mounting structure of the present invention allows heat generated in the semiconductor chip to pass through the high heat conductive resin.
It is conducted to the surface metal foil portion provided on the surface of the substrate, and is further conducted to the inner layer metal foil via the through hole. This inner layer metal foil has a significantly larger area than the semiconductor chip, and functions as a very large heat dissipation fin.
実施例
以下本発明の一実施例のフィルムキャリア実装構造体に
ついて、図面を参照しながら説明する。EXAMPLE Hereinafter, a film carrier mounting structure according to an example of the present invention will be described with reference to the drawings.
第１図は本発明の一実施例におけるフィルムキャリア実
装状態の断面図を示すものである。FIG. 1 shows a sectional view of a film carrier mounted state in an embodiment of the present invention.
第１図において、２１は基板表面の金属箔、２２ａ 、
２２ｂ 、２２ｃ 、２２ｄはスルーホーｐ。In FIG. 1, 21 is a metal foil on the surface of the substrate, 22a,
22b, 22c, and 22d are through holes p.
２３．２４は内層金属箔である。23 and 24 are inner layer metal foils.
以上のように構成されたライｌレムキャリア実装構造体
について、以下その動作について説明する。The operation of the rail carrier mounting structure configured as above will be described below.
半導体チップ１ｏで発生した熱は、半導体チップ１ｏの
表面保護樹脂１６．高熱伝導樹脂１９を介して基板１７
の表面導体２１に伝導される。熱はさらにスルーホール
２２ａ〜２２ｄを介して内層金属箔２３に伝導され、著
しく大きい面積を有する内層金属箔２３によシ放熱され
る。The heat generated in the semiconductor chip 1o is transferred to the surface protection resin 16. of the semiconductor chip 1o. Substrate 17 via high heat conductive resin 19
is conducted to the surface conductor 21 of. The heat is further conducted to the inner layer metal foil 23 via the through holes 22a to 22d, and is radiated by the inner layer metal foil 23 having a significantly large area.
この実施例による放熱経路も従来と同じく大別して３通
りあり、その経路は前述したとおりである。しかしなが
ら、本実施例による放熱効果は、第３の経路、すなわち
半導体チップ１００表面保護樹脂１６．高熱伝導樹脂１
９１表面導体２１゜スルーホー１ｖ２２ａ 〜２２ｄ、
内層金属箔２３の経路による放熱効果が他の経路に比べ
著しく大きい。特に半導体チップ１０の表面保護樹脂１
６゜高熱伝導樹脂１９を薄くすることによってその効果
は著しい。The heat dissipation paths according to this embodiment can be roughly divided into three types as in the conventional case, and the paths are as described above. However, the heat dissipation effect according to this embodiment is achieved through the third path, that is, the semiconductor chip 100 surface protection resin 16. High thermal conductivity resin 1
91 surface conductor 21° through hole 1v22a ~ 22d,
The heat dissipation effect through the path of the inner layer metal foil 23 is significantly greater than through other paths. In particular, the surface protection resin 1 of the semiconductor chip 10
By making the high heat conductive resin 19 thinner by 6°, the effect is remarkable.
以上のように本実施例によれば、内層金属箔２３を持っ
た基板１７の表面に少なくとも半導体装置プ１ｏの占有
する面積以上の面積を持った金属箔部２１を設け、この
金属箔部２１をスルーホール２２ａ〜２２ｄによって基
板１７の内層金属箔２３に接続し、フィルムキャリアパ
ッケージの半導体チップ１ｏと基板１７の表面金属箔部
２１との間を半導体チップの表面保護樹脂１５．高熱伝
導樹脂１９を充填する構成を設けることによシ、半導体
チップ１ｏで発生した熱を半導体チップ１０の表面保護
樹脂１５．高熱伝導樹脂１９．金属箔２１゜スルーホー
１ｖ２２ａ〜２２ｄを介して内層金属箔２３に伝導し、
半導体チップ１ｏの放熱効果を著しく向上せしめ、消費
電力の大きい半導体チップのフィルムキャリア実装構造
体を可能にするとともに、従来必要としていた放熱フィ
ンを不要にでき、低コスト化が実現できるものである。As described above, according to this embodiment, the metal foil portion 21 having an area at least larger than the area occupied by the semiconductor device plate 1o is provided on the surface of the substrate 17 having the inner layer metal foil 23, and this metal foil portion 21 are connected to the inner layer metal foil 23 of the substrate 17 through through holes 22a to 22d, and the surface protective resin 15. of the semiconductor chip is connected between the semiconductor chip 1o of the film carrier package and the surface metal foil portion 21 of the substrate 17. By providing a configuration in which the high heat conductive resin 19 is filled, the heat generated in the semiconductor chip 1o is transferred to the surface protection resin 15 of the semiconductor chip 10. High thermal conductive resin 19. Conducted to the inner layer metal foil 23 via the metal foil 21° through holes 1v22a to 22d,
This significantly improves the heat dissipation effect of the semiconductor chip 1o, enables a film carrier mounting structure for a semiconductor chip that consumes a large amount of power, and eliminates the need for heat dissipation fins, which were conventionally required, resulting in cost reduction.
発明の効果
以上の実施例の説明で明かなように本発明のフィルムキ
ャリア実装構造体によれば内層金属箔と表面配線金属箔
とを持った基板の表面に少なくとも半導体チップの占有
する面積以上の面積を持つた表面金属箔部が設けられ、
この表面金属箔部が複数個のヌル−ホールによって基板
の内層金属箔に接続され、前記フィルムキャリアパッケ
ージの前記半導体チップと前記基板の前記表面金属箔部
との間を高熱伝導樹脂によって充填する構成を設けるこ
とによシ前記半導体チップの放熱効果を著しく向上せし
め、消費電力の大きい半導体チップのフィルムキャリア
実装構造体を可能にするとともに、従来必要としていた
放熱フィンを不要にでき、低コスト化を実現できる優れ
たフィルムキャリア実装構造体を提供するものである。Effects of the Invention As is clear from the description of the embodiments above, the film carrier mounting structure of the present invention has an area on the surface of the substrate having the inner layer metal foil and the surface wiring metal foil that is at least as large as the area occupied by the semiconductor chip. A surface metal foil portion with an area is provided,
The surface metal foil portion is connected to the inner layer metal foil of the substrate through a plurality of null holes, and the space between the semiconductor chip of the film carrier package and the surface metal foil portion of the substrate is filled with a high heat conductive resin. By providing this, the heat dissipation effect of the semiconductor chip is significantly improved, making it possible to form a film carrier mounting structure for a semiconductor chip that consumes a large amount of power, and also eliminating the need for heat dissipation fins that were conventionally required, resulting in lower costs. This provides an excellent film carrier mounting structure that can be realized.
第１図は本発明の一実施例におけるフィルムキャリア実
装構造体の構成を示す断面図、第２図。
第３図は従来のフィルムキャリア実装構造体の構成を示
す断面図である。
１ｏ・・・・・・半導体チップ、１７・・・・・・基板
、１９・・・・・・高熱伝導樹脂、２１・・・・・・表
面金属箔部、２２ａ〜２２ｄ・・・・・・スルーホール
、２３・・・・・・内層金属箔。FIG. 1 is a cross-sectional view showing the structure of a film carrier mounting structure according to an embodiment of the present invention, and FIG. FIG. 3 is a sectional view showing the configuration of a conventional film carrier mounting structure. 1o...Semiconductor chip, 17...Substrate, 19...High heat conductive resin, 21...Surface metal foil portion, 22a-22d... -Through hole, 23...Inner layer metal foil.
Claims (1)
に取り付けた半導体チップで構成されるフィルムキャリ
アパッケージにおいて、前記基板の表面に少なくとも前
記半導体チップの占有する面積以上の面積を持った表面
金属箔部を設け、この表面金属箔部が複数個のスルーホ
ールによって前記基板の内層金属箔に接続され、前記フ
ィルムキャリアパッケージの前記半導体チップと前記基
板の前記表面金属箔部との間を高熱伝導樹脂によって充
填してなるフィルムキャリア実装構造体。In a film carrier package consisting of a semiconductor chip attached to a substrate made of a film carrier tape made of polyimide, a surface metal foil portion having an area at least larger than the area occupied by the semiconductor chip is provided on the surface of the substrate, and this surface A film in which a metal foil portion is connected to an inner layer metal foil of the substrate through a plurality of through holes, and a space between the semiconductor chip of the film carrier package and the surface metal foil portion of the substrate is filled with a high heat conductive resin. Carrier mounting structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2208598A JP2861322B2 (en) | 1990-08-06 | 1990-08-06 | Film carrier mounting structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2208598A JP2861322B2 (en) | 1990-08-06 | 1990-08-06 | Film carrier mounting structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0499051A true JPH0499051A (en) | 1992-03-31 |
| JP2861322B2 JP2861322B2 (en) | 1999-02-24 |
Family
ID=16558858
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2208598A Expired - Fee Related JP2861322B2 (en) | 1990-08-06 | 1990-08-06 | Film carrier mounting structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2861322B2 (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5844310A (en) * | 1996-08-09 | 1998-12-01 | Hitachi Metals, Ltd. | Heat spreader semiconductor device with heat spreader and method for producing same |
| US5930117A (en) * | 1996-05-07 | 1999-07-27 | Sheldahl, Inc. | Heat sink structure comprising a microarray of thermal metal heat channels or vias in a polymeric or film layer |
| WO1999059205A1 (en) * | 1998-05-12 | 1999-11-18 | Mitsubishi Gas Chemical Company, Inc. | Semiconductor plastic package and method for producing printed wiring board |
| US6265772B1 (en) | 1998-06-17 | 2001-07-24 | Nec Corporation | Stacked semiconductor device |
| KR100391093B1 (en) * | 2001-01-04 | 2003-07-12 | 삼성전자주식회사 | Ball Grid Array package mounting heat sink |
| US6898084B2 (en) * | 2003-07-17 | 2005-05-24 | The Bergquist Company | Thermal diffusion apparatus |
| KR100474193B1 (en) * | 1997-08-11 | 2005-07-21 | 삼성전자주식회사 | BG Package and Manufacturing Method |
| US7760507B2 (en) | 2007-12-26 | 2010-07-20 | The Bergquist Company | Thermally and electrically conductive interconnect structures |
| CN106647114A (en) * | 2016-12-02 | 2017-05-10 | 北京小米移动软件有限公司 | Camera module |
-
1990
- 1990-08-06 JP JP2208598A patent/JP2861322B2/en not_active Expired - Fee Related
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5930117A (en) * | 1996-05-07 | 1999-07-27 | Sheldahl, Inc. | Heat sink structure comprising a microarray of thermal metal heat channels or vias in a polymeric or film layer |
| US5844310A (en) * | 1996-08-09 | 1998-12-01 | Hitachi Metals, Ltd. | Heat spreader semiconductor device with heat spreader and method for producing same |
| US6032362A (en) * | 1996-08-09 | 2000-03-07 | Hitachi Metals, Ltd. | Method for producing a heat spreader and semiconductor device with a heat spreader |
| KR100474193B1 (en) * | 1997-08-11 | 2005-07-21 | 삼성전자주식회사 | BG Package and Manufacturing Method |
| WO1999059205A1 (en) * | 1998-05-12 | 1999-11-18 | Mitsubishi Gas Chemical Company, Inc. | Semiconductor plastic package and method for producing printed wiring board |
| US6350952B1 (en) | 1998-05-12 | 2002-02-26 | Mitsubishi Gas Chemical Company, Inc. | Semiconductor package including heat diffusion portion |
| US6265772B1 (en) | 1998-06-17 | 2001-07-24 | Nec Corporation | Stacked semiconductor device |
| KR100391093B1 (en) * | 2001-01-04 | 2003-07-12 | 삼성전자주식회사 | Ball Grid Array package mounting heat sink |
| US6898084B2 (en) * | 2003-07-17 | 2005-05-24 | The Bergquist Company | Thermal diffusion apparatus |
| US7760507B2 (en) | 2007-12-26 | 2010-07-20 | The Bergquist Company | Thermally and electrically conductive interconnect structures |
| CN106647114A (en) * | 2016-12-02 | 2017-05-10 | 北京小米移动软件有限公司 | Camera module |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2861322B2 (en) | 1999-02-24 |
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