JPH0497545A - Semiconductor device with built-in fuse - Google Patents

Semiconductor device with built-in fuse

Info

Publication number
JPH0497545A
JPH0497545A JP21600590A JP21600590A JPH0497545A JP H0497545 A JPH0497545 A JP H0497545A JP 21600590 A JP21600590 A JP 21600590A JP 21600590 A JP21600590 A JP 21600590A JP H0497545 A JPH0497545 A JP H0497545A
Authority
JP
Japan
Prior art keywords
fuse
polycrystalline silicon
silicon film
bent
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21600590A
Other languages
Japanese (ja)
Inventor
Kazuhiro Suzuki
鈴木 一寛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC IC Microcomputer Systems Co Ltd filed Critical NEC IC Microcomputer Systems Co Ltd
Priority to JP21600590A priority Critical patent/JPH0497545A/en
Publication of JPH0497545A publication Critical patent/JPH0497545A/en
Pending legal-status Critical Current

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  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce a fusing current and to enable use of a part excepting a bent part as a wiring by providing a recessed part in a field insulating film to a polycrystalline silicon film to come into contact with an internal angle of one or more bent parts and by thinning the film partially. CONSTITUTION:At least one or more bent parts are provided to a part which becomes a fuse of a polycrystalline silicon film 3. A field insulating film 5 is partially provided with a recessed part to come into contact with an internal angle of the bent part. Thereby, current concentration effect in the bent part and partial reduction in polycrystalline silicon film thickness due to a foundation step enable blow out of fuse with a small current. The partial reduction in thickness makes it possible to fuse only the bent part and to use the polycrystalline silicon film in other fuse constitution parts as a wiring.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、ヒユーズ内蔵型半導体装置に関し、特に、多
結晶シリコン配線からなるヒユーズの構造に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device with a built-in fuse, and particularly to a structure of a fuse made of polycrystalline silicon wiring.

〔従来の技術〕[Conventional technology]

従来、内部の抵抗などをトリミングする為又は冗長回路
用のヒユーズを内蔵した、ヒユーズ内蔵型半導体装置は
、多結晶シリコン膜からなるヒユーズを、同一の厚さか
らなるフィールド絶縁膜上に設けた構造となっていた。
Conventionally, semiconductor devices with a built-in fuse, which have a built-in fuse for trimming internal resistance or for redundant circuits, have a structure in which a fuse made of a polycrystalline silicon film is provided on a field insulating film of the same thickness. It became.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のヒユーズ内蔵型半導体装置は、第2図に
示すように同一厚のフィールド絶縁膜5上に多結晶シリ
コン膜3からなるヒユーズをアルミニウム配線2間に設
け、コンタクト7を介して接続している。さらに熱によ
る破壊を防ぐ為、ヒユーズ上部の眉間絶縁膜4及びパッ
シベーション膜9を一部除いて窓8を設けた構造となっ
ている。この構造では、ヒユーズを形成している部分の
多結晶シリコン配線が溶断される為、単にヒユーズとし
ての機能を有するのみであり、配線として使用する事が
出来ないという欠点が有る。
In the conventional fuse-embedded semiconductor device described above, as shown in FIG. ing. Further, in order to prevent damage due to heat, a window 8 is provided by partially removing the glabella insulating film 4 and passivation film 9 above the fuse. This structure has the disadvantage that since the polycrystalline silicon wiring in the portion forming the fuse is blown out, it merely functions as a fuse and cannot be used as wiring.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のヒユーズ内蔵型半導体装置は、ヒユーズ材料と
して多結晶シリコン膜を用い、かつ、ヒユーズに一箇所
以上の屈曲部を有し、その屈曲部のかどに、そのかどの
内角に接するようにフィールド絶縁膜に凹部を設ける事
により、段差をもたせ、多結晶シリコン膜の厚さを部分
的に薄くする手段を有している。従って、通常の多結晶
シリコン配線よりも溶断電流が小さく、かつ溶断部が屈
曲部である為、屈曲部以外の多結晶シリコン膜は配線と
して使用することが可能となる。
A semiconductor device with a built-in fuse of the present invention uses a polycrystalline silicon film as a fuse material, has one or more bent portions on the fuse, and has a field formed at a corner of the bent portion so as to be in contact with an inner corner of the bent portion. By providing a concave portion in the insulating film, a step is provided and a means for partially reducing the thickness of the polycrystalline silicon film is provided. Therefore, the fusing current is smaller than that of a normal polycrystalline silicon wiring, and since the fusing part is a bent part, the polycrystalline silicon film other than the bent part can be used as a wiring.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。第1図
(a)は、本発明の一実施例の平面図、第1図(b)は
、第1図(a)のA−A線断面図である。
Next, the present invention will be explained with reference to the drawings. FIG. 1(a) is a plan view of one embodiment of the present invention, and FIG. 1(b) is a sectional view taken along the line A--A in FIG. 1(a).

3は、多結晶シリコン膜で、ヒユーズとなる部分に少な
くとも1力所以上の屈曲部を持たせ、屈曲部の内角に接
するように、部分的にフィールド絶縁wA5に凹所を設
ける。以上の手段を用いることにより、屈曲部における
電流集中の効果と、下地段差による多結晶シリコン膜の
厚さの部分的減少により通常の多結晶シリコン溶断電流
よりも小さい電流にてヒユーズの切断を可能としている
Reference numeral 3 denotes a polycrystalline silicon film, which has at least one bent portion in a portion that will become a fuse, and a recess is partially provided in the field insulation wA5 so as to be in contact with an inner corner of the bent portion. By using the above method, it is possible to cut the fuse with a current smaller than the normal polycrystalline silicon fusing current due to the effect of current concentration at the bend and the partial reduction in the thickness of the polycrystalline silicon film due to the step difference in the base. It is said that

なおフィールド絶縁膜5の凹所の厚さが十分でない場合
、屈曲部下方の半導体基板6に、導電型の異なる拡散層
1(例えばN型基板の場合は、Pウェル)を設けてフィ
ールド絶縁膜5のクラックなどによる絶縁不良を防止し
ておく。
Note that if the thickness of the recess in the field insulating film 5 is not sufficient, a diffusion layer 1 of a different conductivity type (for example, a P well in the case of an N-type substrate) is provided on the semiconductor substrate 6 below the bend, and the field insulating film 5 is Insulation failure due to cracks, etc. in step 5 should be prevented.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明は多結晶シリコン膜をヒユ
ーズ材料とし、屈曲部を設け、かつ電流の集中及び下地
の段差による多結晶シリコン膜の厚さの部分的削減によ
り、屈曲部だけを溶断し、他のヒユーズ構成部分の多結
晶シリコン膜を配線として用いることが出来る効果が有
る。
As explained above, the present invention uses a polycrystalline silicon film as a fuse material, provides a bent part, and partially reduces the thickness of the polycrystalline silicon film due to current concentration and step differences in the base, so that only the bent part is fused. However, there is an advantage that the polycrystalline silicon film of other fuse constituent parts can be used as wiring.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)は本発明の一実施例を示す半導体チップの
平面図、第1図(b)は第1図(a)のA−A線断面図
、第2図(a)は、従来例を示す半導体チップの平面図
、第2図(b)は、第2図(a)のA−A線断面図であ
る。 1・・・拡散層、2・・・アルミニウム配線、3・・・
多結晶シリコン膜、4・・・層間絶縁膜、5・・・フィ
ールド絶縁膜、6・・・半導体基板、7・・・コンタク
ト、8・・・パッシベーション膜。
FIG. 1(a) is a plan view of a semiconductor chip showing an embodiment of the present invention, FIG. 1(b) is a cross-sectional view taken along line A-A in FIG. 1(a), and FIG. 2(a) is a FIG. 2(b), which is a plan view of a conventional semiconductor chip, is a sectional view taken along the line A--A in FIG. 2(a). 1... Diffusion layer, 2... Aluminum wiring, 3...
Polycrystalline silicon film, 4... Interlayer insulating film, 5... Field insulating film, 6... Semiconductor substrate, 7... Contact, 8... Passivation film.

Claims (1)

【特許請求の範囲】[Claims]  半導体基板の一主面に形成されたフィールド絶縁膜上
に設けられた多結晶シリコン膜からなる電流で溶断する
ヒューズを有し、前記ヒューズは一箇所以上の屈曲部を
有し、前記屈曲部の少なくとも内角部下方において前記
フィールド絶縁膜に凹部が設けられていることを特徴と
するヒューズ内蔵型半導体装置。
It has a fuse that is made of a polycrystalline silicon film provided on a field insulating film formed on one main surface of a semiconductor substrate and is blown by a current, and the fuse has one or more bent portions, and the fuse has one or more bent portions. A semiconductor device with a built-in fuse, characterized in that a recess is provided in the field insulating film at least below an inner corner.
JP21600590A 1990-08-16 1990-08-16 Semiconductor device with built-in fuse Pending JPH0497545A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21600590A JPH0497545A (en) 1990-08-16 1990-08-16 Semiconductor device with built-in fuse

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21600590A JPH0497545A (en) 1990-08-16 1990-08-16 Semiconductor device with built-in fuse

Publications (1)

Publication Number Publication Date
JPH0497545A true JPH0497545A (en) 1992-03-30

Family

ID=16681819

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21600590A Pending JPH0497545A (en) 1990-08-16 1990-08-16 Semiconductor device with built-in fuse

Country Status (1)

Country Link
JP (1) JPH0497545A (en)

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