JPH0481820A - Active matrix substrate and liquid crystal display element using the same - Google Patents
Active matrix substrate and liquid crystal display element using the sameInfo
- Publication number
- JPH0481820A JPH0481820A JP2194888A JP19488890A JPH0481820A JP H0481820 A JPH0481820 A JP H0481820A JP 2194888 A JP2194888 A JP 2194888A JP 19488890 A JP19488890 A JP 19488890A JP H0481820 A JPH0481820 A JP H0481820A
- Authority
- JP
- Japan
- Prior art keywords
- picture element
- active matrix
- film
- matrix substrate
- liquid crystal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 36
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 14
- 239000011159 matrix material Substances 0.000 title claims description 29
- 239000002245 particle Substances 0.000 claims abstract description 14
- 229910003437 indium oxide Inorganic materials 0.000 claims abstract description 7
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 claims abstract description 7
- 229920005989 resin Polymers 0.000 claims abstract description 6
- 239000011347 resin Substances 0.000 claims abstract description 6
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 claims description 2
- 229910001887 tin oxide Inorganic materials 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 15
- 239000011248 coating agent Substances 0.000 abstract description 11
- 238000000576 coating method Methods 0.000 abstract description 11
- 239000000463 material Substances 0.000 abstract description 7
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 abstract description 6
- 230000007547 defect Effects 0.000 abstract description 5
- ZNQVEEAIQZEUHB-UHFFFAOYSA-N 2-ethoxyethanol Chemical compound CCOCCO ZNQVEEAIQZEUHB-UHFFFAOYSA-N 0.000 abstract description 2
- RWCCWEUUXYIKHB-UHFFFAOYSA-N benzophenone Chemical compound C=1C=CC=CC=1C(=O)C1=CC=CC=C1 RWCCWEUUXYIKHB-UHFFFAOYSA-N 0.000 abstract description 2
- 239000012965 benzophenone Substances 0.000 abstract description 2
- 229920000642 polymer Polymers 0.000 abstract description 2
- POWFTOSLLWLEBN-UHFFFAOYSA-N tetrasodium;silicate Chemical compound [Na+].[Na+].[Na+].[Na+].[O-][Si]([O-])([O-])[O-] POWFTOSLLWLEBN-UHFFFAOYSA-N 0.000 abstract description 2
- 239000002562 thickening agent Substances 0.000 abstract 1
- 239000010408 film Substances 0.000 description 54
- 239000011651 chromium Substances 0.000 description 9
- 238000004544 sputter deposition Methods 0.000 description 6
- 239000010409 thin film Substances 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000005530 etching Methods 0.000 description 4
- 238000007639 printing Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 229910052804 chromium Inorganic materials 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- SVONRAPFKPVNKG-UHFFFAOYSA-N 2-ethoxyethyl acetate Chemical compound CCOCCOC(C)=O SVONRAPFKPVNKG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229920002845 Poly(methacrylic acid) Polymers 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 210000002858 crystal cell Anatomy 0.000 description 1
- 238000001723 curing Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- -1 etc. Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000013007 heat curing Methods 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000011344 liquid material Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
Landscapes
- Liquid Crystal (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はマトリクス状に配置した複数のスイッチング素
子と、これら素子の各電極に接続する配線及び画素電極
からなるアクティブマトリクス基板及び該アクティブマ
トリクス基板を用いた液晶表示素子に関する。Detailed Description of the Invention [Field of Industrial Application] The present invention relates to an active matrix substrate comprising a plurality of switching elements arranged in a matrix, wirings and pixel electrodes connected to each electrode of these elements, and the active matrix substrate. This invention relates to a liquid crystal display element using.
液晶表示装置用アクティブマトリクス基板の例として+
JaPan Display’ 89p510−5
13に示されるようなものがあり、一画素分の平面図を
第2図に、その薄膜トランジスタ部の断面図を第3図に
、その製造工程を第4図に示す。As an example of active matrix substrate for liquid crystal display device +
Japan Display' 89p510-5
13, a plan view of one pixel is shown in FIG. 2, a sectional view of its thin film transistor portion is shown in FIG. 3, and its manufacturing process is shown in FIG. 4.
図において、ガラス基板等の絶縁性基板1上に、クロム
(Cr)等の金属膜からなるゲート電極2とシリコン窒
化膜等からなるゲート絶縁膜3と、非晶質シリコン膜等
からなる半導体膜4と、クロム(Cr)やアルミニウム
(Al)等の金属膜からなるドレイン電極5及びソース
電極6と、透明導電膜からなる画素電極7と、シリコン
窒化膜等からなる保護膜8が順次形成されている。アク
ティブマトリクス基板では、ゲート電極2は走査線9に
、ドレイン電極5は信号線10に、ソース電極6は液晶
セルの一方の電極となる画素電極7に、それぞれ接続さ
れている。In the figure, on an insulating substrate 1 such as a glass substrate, a gate electrode 2 made of a metal film such as chromium (Cr), a gate insulating film 3 made of a silicon nitride film, etc., and a semiconductor film made of an amorphous silicon film etc. 4, a drain electrode 5 and a source electrode 6 made of a metal film such as chromium (Cr) or aluminum (Al), a pixel electrode 7 made of a transparent conductive film, and a protective film 8 made of a silicon nitride film or the like are sequentially formed. ing. In the active matrix substrate, the gate electrode 2 is connected to a scanning line 9, the drain electrode 5 is connected to a signal line 10, and the source electrode 6 is connected to a pixel electrode 7, which is one electrode of a liquid crystal cell.
このような従来のアクティブマトリクス基板の画素電極
に用いる透明導電膜には、フラットパネルデイスプレィ
’ 90p257−263に示されるように、スパッタ
法によって形成した酸化インジウム・スズ(ITO)透
明導電膜が用いられている。The transparent conductive film used for the pixel electrode of such a conventional active matrix substrate is an indium tin oxide (ITO) transparent conductive film formed by sputtering, as shown in Flat Panel Display' 90p.257-263. It is being
上記の従来技術においては画素電極用のIT○透明導電
膜をスパッタ法で形成するためスパッタ電力、基板温度
等の成膜条件の変動によって、得られるIT○透明導電
膜の結晶性が変動し易い。In the above-mentioned conventional technology, since the IT○ transparent conductive film for the pixel electrode is formed by sputtering, the crystallinity of the obtained IT○ transparent conductive film tends to change due to fluctuations in film forming conditions such as sputtering power and substrate temperature. .
このIT○透明導電膜の結晶性の変動によって■To透
明導電膜のエツチング性が変動し、基板内でエツチング
残りが生じやすい。そしてエツチング残りはデータ配線
と画素電極との間での短絡を生じさせ、スイッチング素
子の状態にかかわらずデータ配線の信号が画素電極に伝
わり、液晶表示素子として点欠陥となり、ショート欠陥
が生じるという問題があった。また、画素電極用のIT
○透明導電膜をスパッタ法で形成すると、急峻な段差部
でのIT○透明導電膜のつきまわり性が悪く。This fluctuation in the crystallinity of the IT○ transparent conductive film causes the etching properties of the ■To transparent conductive film to fluctuate, and etching remains are likely to occur within the substrate. The etching residue causes a short circuit between the data wiring and the pixel electrode, and the signal from the data wiring is transmitted to the pixel electrode regardless of the state of the switching element, resulting in a point defect in the liquid crystal display element and a short circuit defect. was there. In addition, IT for pixel electrodes
○ When a transparent conductive film is formed by sputtering, the throwing power of the IT ○ transparent conductive film is poor at steep stepped portions.
ソース電極の段差部においてITO透明導電膜が段切れ
し、アクティブマトリクス基板において画素電極とソー
ス電の電気的接続に不良が生しるという問題があった。There is a problem in that the ITO transparent conductive film is broken at the step portion of the source electrode, resulting in a defective electrical connection between the pixel electrode and the source electrode in the active matrix substrate.
本発明の目的は、画素電極と信号線とのショート欠陥が
なくてかつ画素電極とソース電極との電気的接続性に優
れたアクティブマトリクス基板及び該アクティブマトリ
クス基板を用いた欠陥のない液晶表示素子を提供するこ
とにある。An object of the present invention is to provide an active matrix substrate that is free from short-circuit defects between pixel electrodes and signal lines and has excellent electrical connectivity between pixel electrodes and source electrodes, and a defect-free liquid crystal display element using the active matrix substrate. Our goal is to provide the following.
上記目的を達成するために、アクティブマトリクス基板
の画素電極の形成において、導電性粒子を樹脂中に含有
したものをパターン印刷あるいは塗布、加熱硬化後、パ
ターン状に加工する方法で形成し、その膜厚を0.1〜
3μmとなるようにした。In order to achieve the above objective, in forming pixel electrodes of active matrix substrates, conductive particles are formed in a resin by pattern printing or coating, heat curing, and processing into a pattern. Thickness 0.1~
The thickness was set to 3 μm.
本発明では、画素電極の形成に導電性粒子と樹脂からな
る液体状の材料を印刷法やスピンナー法等を用いて塗布
するため、塗膜は流動して平坦化し易く、ソース電極の
段差部に対してもカバレージ性が良く、ソース電極と良
好な電極的接続が得られる6なお、硬化後の膜厚が0.
1μmより薄くなるとソース電極との接続抵抗が高くな
る傾向があり、また、3μmより厚くしすぎると、液晶
表示素子とするための液晶配向膜の印刷精度が低下し、
表示素子の画質の低下を招く。In the present invention, a liquid material made of conductive particles and resin is applied using a printing method, a spinner method, etc. to form a pixel electrode, so the coating film flows easily and becomes flat, and the step part of the source electrode is easily coated. It also has good coverage even with respect to the source electrode, and a good electrode connection with the source electrode can be obtained6.The film thickness after curing is 0.
If it becomes thinner than 1 μm, the connection resistance with the source electrode tends to increase, and if it becomes too thick than 3 μm, the printing accuracy of the liquid crystal alignment film for forming a liquid crystal display element decreases.
This results in a decrease in the image quality of the display element.
このため、膜厚は0.1μm〜3μmであることが好ま
しい。For this reason, the film thickness is preferably 0.1 μm to 3 μm.
また、本発明では導電性粒子と樹脂からなる塗膜は印刷
法でパターン状に形成したり、樹脂を感光性のものとし
、塗布後に露光、現像でパターン化することができるた
め、ITO膜の加工で生じるようなエツチング残りが生
じにくく、画素電極と信号線とのショートが発生しにく
い。In addition, in the present invention, the coating film made of conductive particles and resin can be formed into a pattern by a printing method, or the resin can be made photosensitive and patterned by exposure and development after coating. Etching residues that occur during processing are less likely to occur, and short circuits between pixel electrodes and signal lines are less likely to occur.
更に、本発明で用いる導電性粒子としては、スズを含有
する酸化インジウム、アンチモンを含む酸化スズ等があ
るが、スズを含有する酸化インジウムが最も抵抗値の低
い塗膜が得られることから適している。なお、その粒径
は50nm以下とするとソース電極と画素電極の接続抵
抗、塗膜のシート抵抗が低くなり好ましい。Further, as the conductive particles used in the present invention, there are indium oxide containing tin, tin oxide containing antimony, etc., but indium oxide containing tin is suitable because it provides a coating film with the lowest resistance value. There is. Note that it is preferable that the particle size is 50 nm or less because this reduces the connection resistance between the source electrode and the pixel electrode and the sheet resistance of the coating film.
〔実施例1〕
本発明の実施例を第1図により説明する。第1図は、本
発明を実施したアクティブマトリクス基板の薄膜トラン
ジスタ部の断面構造を製造工程順に示したもので、次の
(1)〜(7)のプロセスによって形成した。[Example 1] An example of the present invention will be described with reference to FIG. FIG. 1 shows the cross-sectional structure of a thin film transistor portion of an active matrix substrate according to the present invention in the order of manufacturing steps, which were formed by the following processes (1) to (7).
(1)透明ガラス基板等の絶縁性基板1上に、クロム(
Cr)等の金属膜をスパッタリング法により成膜する。(1) Chromium (
A metal film such as Cr) is formed by a sputtering method.
次いで、通常のホトエツチング工程によりゲート電極2
のパターンを形成する(第1図(a))。Next, the gate electrode 2 is formed by a normal photoetching process.
A pattern is formed (FIG. 1(a)).
(2)プラズマCVD法により、ゲート絶縁膜や層間絶
縁膜として用いるシリコン窒化膜(SiliconNi
tride)からなるゲート絶縁膜3と、半導体膜及び
眉間絶縁膜として用いる非晶質シリコン膜4 ’ (a
morphous 5ilicon、以下a−5i膜と
呼ぶ)と、電極部コンタクトとして用いるリン(P)を
ドーピングしたa−3i膜(n−type a−5i膜
、以下n+BSx膜と呼ぶ、図示せず)とを反応室の真
空を破ることなく順次連続成膜する(第1図(b))。(2) Silicon nitride film (SiliconNi) used as gate insulating film and interlayer insulating film is made by plasma CVD method
amorphous silicon film 4 used as a semiconductor film and a glabellar insulation film.
morphous 5ilicon (hereinafter referred to as a-5i film) and a phosphorus (P)-doped a-3i film (n-type a-5i film, hereinafter referred to as n+BSx film, not shown) used as an electrode contact. Films are formed one after another without breaking the vacuum in the reaction chamber (Fig. 1(b)).
(3)通常のホトリソグラフィ工程とドライエツチング
により、a−5i膜を素子分離し、半導体膜4のアイラ
ンドを形成する(第1図(C))。(3) The a-5i film is separated into elements by normal photolithography and dry etching to form islands of the semiconductor film 4 (FIG. 1(C)).
(4)ドレイン電極、ソース電極及び信号線として用い
るCr膜21及びA1膜22をスパッタリング法により
順次成膜する(第1図(d))。(4) A Cr film 21 and an A1 film 22 to be used as a drain electrode, a source electrode, and a signal line are sequentially formed by sputtering (FIG. 1(d)).
(5)通常のホトエツチング工程により、A1膜とCr
膜のエツチングを行い、薄膜トランジスタのドレイン電
極5とソース電極6及び信号線(図示せず)を形成する
。(5) A1 film and Cr
The film is etched to form a drain electrode 5, a source electrode 6, and a signal line (not shown) of the thin film transistor.
次いで、薄膜トランジスタのチャネル上のn+a−5i
膜をドライエツチング等で除去し、薄膜トランジスタを
得る(第1図(e))。Then, n+a-5i on the channel of the thin film transistor
The film is removed by dry etching or the like to obtain a thin film transistor (FIG. 1(e)).
(6)次に本発明と関連するアクティブマトリクス基板
の画素電極を形成する(第1図(f)、(g))。(6) Next, pixel electrodes of the active matrix substrate related to the present invention are formed (FIGS. 1(f) and (g)).
(7)エポキシ樹脂等により薄膜トランジスタの保護膜
8を形成し、アクティブマトリクス基板が完成する(第
1図(h))。(7) A protective film 8 for the thin film transistor is formed using epoxy resin or the like, and the active matrix substrate is completed (FIG. 1(h)).
上記(6)の画素電極の形成の詳細な製造工程は次の方
法で行った。The detailed manufacturing process for forming the pixel electrode in (6) above was performed in the following manner.
形成材料として平均粒径が20nmで、5 at。The forming material has an average particle size of 20 nm and 5 at.
mic%のスズを含む酸化インジウム粒子40重量部、
ベンゾフェノン系増加剤2.5wt%を含むポリメタク
リル酸ポリマ30重量部をエチルセロソルブに分散、溶
解し、粘度を25cpsとしたものを用いた。40 parts by weight of indium oxide particles containing mic% tin;
30 parts by weight of a polymethacrylic acid polymer containing 2.5 wt % of a benzophenone type increaser was dispersed and dissolved in ethyl cellosolve to give a viscosity of 25 cps.
この材料をスピンナ法で、(5)までの工程で得た基板
上に塗布した後(第1図(f−1))、100℃で15
分間乾燥した(第1図(f−2))。次に通常の方法で
画素電極パターン状に露光を行い、オルトケイ酸ソーダ
系現像液を用いて未露光部の塗膜を現像除去した後水洗
し、180℃で30分間熱処理することにより、画素電
極を形成した(第1図(g))。After coating this material on the substrate obtained in steps up to (5) using a spinner method (Fig. 1 (f-1)), it was heated at 100°C for 15
It was dried for a minute (FIG. 1 (f-2)). Next, the pixel electrode pattern is exposed to light using a normal method, and the coating film in the unexposed areas is developed and removed using a sodium orthosilicate developer, washed with water, and heat-treated at 180°C for 30 minutes. was formed (Fig. 1(g)).
上記の方法で製造したアクティブマトリクス基板を調べ
た結果、画素電極と信号線とのショートの発生はなかっ
た。また、画素電極とソース電極との接続抵抗値を調べ
た結果、8〜10にΩであり、良好な結果となった。さ
らに、このアクティブマトリクス基板を用いて液晶表示
素子を作り、点灯試験を行って画質を調べた結果、各画
素の明るさは均一であった。As a result of examining the active matrix substrate manufactured by the above method, there was no occurrence of short circuit between the pixel electrode and the signal line. Further, as a result of examining the connection resistance value between the pixel electrode and the source electrode, it was found to be 8 to 10 Ω, which was a good result. Furthermore, a liquid crystal display element was manufactured using this active matrix substrate, and a lighting test was conducted to examine the image quality. As a result, the brightness of each pixel was uniform.
〔実施例2〕
画素電極形成については次の方法とし、他は実施例1と
同一の方法でアクティブマトリクス基板及び液晶表示素
子を作成した。[Example 2] An active matrix substrate and a liquid crystal display element were produced in the same manner as in Example 1, except that the pixel electrodes were formed using the following method.
画素電極形成材料として、平均粒径がIonmで5 a
tomic%のスズを含む酸化インジウム粒子40重量
部、透明エポキシ樹脂30重量部をエチルセロソルブア
セテートに分散、溶解し、粘度を25cpsとしたもの
を用いた。この材料をスピンナ法で実施例1の(5)ま
での工程で得た基板上に塗布した後、150”Cで30
分間加熱した。次にこの塗膜上に市販のポジ型レジスト
を用い、通常の方法で画素電極パターン状にホトレジス
トを形成し、酸素プラズマによって露出部の透明エポキ
シ樹脂を分解した後、スプレー水洗によって残留するス
ズを含む酸化インジウム粒子を除去した。次にポジ型ホ
トレジストを通常の方法で剥離し、洗浄、乾燥して画素
電極を得た。As a pixel electrode forming material, the average particle size is Ionm and 5 a
40 parts by weight of indium oxide particles containing tomic% tin and 30 parts by weight of a transparent epoxy resin were dispersed and dissolved in ethyl cellosolve acetate to give a viscosity of 25 cps. This material was applied onto the substrate obtained in the steps up to (5) of Example 1 using a spinner method, and then heated at 150"C for 30 minutes.
Heated for minutes. Next, using a commercially available positive resist on this coating film, a photoresist is formed in the shape of a pixel electrode pattern using the usual method, and after decomposing the exposed transparent epoxy resin with oxygen plasma, the remaining tin is removed by spray washing with water. The indium oxide particles contained therein were removed. Next, the positive photoresist was peeled off in a conventional manner, washed, and dried to obtain a pixel electrode.
上記の方法で画素電極を形成したアクティブマトリクス
基板を調べた結果1画素電極と信号線とのショートの発
生はなかった。また、画素電極とソース電極との接続抵
抗値7〜IOKΩであり、良好な結果となった。さらに
、このアクティブマトリクス基板を用いて液晶表示素子
を作り、点灯試験を行って画質を調べた結果、各画素の
明るさは均一であった。As a result of examining an active matrix substrate on which pixel electrodes were formed using the above method, no short circuit occurred between one pixel electrode and a signal line. Further, the connection resistance value between the pixel electrode and the source electrode was 7 to IOKΩ, which was a good result. Furthermore, a liquid crystal display element was manufactured using this active matrix substrate, and a lighting test was conducted to examine the image quality. As a result, the brightness of each pixel was uniform.
本発明によれば、画素電極と信号線とのショート欠陥が
なく、画素電極とソース電極との接続性に優れたアクテ
ィブマトリクス基板を歩留り良く製造することができ、
このアクティブマトリクス基板を用い、画質の良好な液
晶素子を得ることができる。According to the present invention, an active matrix substrate having no short-circuit defects between pixel electrodes and signal lines and excellent connectivity between pixel electrodes and source electrodes can be manufactured with high yield.
Using this active matrix substrate, a liquid crystal element with good image quality can be obtained.
第1図は、本発明によるアクティブマトリクス基板の実
施例の製造工程を示す工程図、第2図及び第3図は、従
来のアクティブマトリクス基板の一部分を示す平面及び
断面図、第4図は、従来のアクティブマトリクス基板の
製造工程である。
1・・・絶縁性基板、 2・・ゲート電極、3
・・・ゲート絶縁膜、 4・・・半導体膜、5・・
・ドレイン電極、 6・・・ソース電極、7・・
・画素電極、 8・・・保護膜、9・・走査
線、 10・・・信号線、21− Cr膜
、 21=Al膜。
70・・・透明導電膜。
第
3圀
+j) 透真月411.升シに覧
一一二
ブカー11に3月1テ[シh)鳴
−二一占q%===FIG. 1 is a process diagram showing the manufacturing process of an embodiment of an active matrix substrate according to the present invention, FIGS. 2 and 3 are plan and cross-sectional views showing a part of a conventional active matrix substrate, and FIG. This is a conventional active matrix substrate manufacturing process. 1... Insulating substrate, 2... Gate electrode, 3
...Gate insulating film, 4...Semiconductor film, 5...
・Drain electrode, 6... Source electrode, 7...
- Pixel electrode, 8... Protective film, 9... Scanning line, 10... Signal line, 21- Cr film, 21=Al film. 70...Transparent conductive film. 3rd area + j) Toumatsuki 411. March 1 te [shih] sound - 21 fortune q% ===
Claims (1)
これら素子の各電極に接続する配線及び画素電極からな
るアクティブマトリクス基板において、画素電極として
導電性粒子と樹脂からなる0.1〜3μm膜厚の透明導
電膜を用いたことを特徴とするアクティブマトリクス基
板。 2、前記導電性粒子が酸化インジウムに酸化スズを添加
したものであることを特徴とする請求項1記載のアクテ
ィブマトリクス基板。 3、請求項1又は2記載のアクティブマトリクス基板を
用いたことを特徴とする液晶表示素子。[Claims] 1. In an active matrix substrate consisting of a plurality of switching elements arranged in a matrix, wiring connected to each electrode of these elements, and a pixel electrode, the pixel electrode is made of conductive particles and resin. An active matrix substrate characterized by using a transparent conductive film with a thickness of ~3 μm. 2. The active matrix substrate according to claim 1, wherein the conductive particles are indium oxide added with tin oxide. 3. A liquid crystal display element using the active matrix substrate according to claim 1 or 2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2194888A JPH0481820A (en) | 1990-07-25 | 1990-07-25 | Active matrix substrate and liquid crystal display element using the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2194888A JPH0481820A (en) | 1990-07-25 | 1990-07-25 | Active matrix substrate and liquid crystal display element using the same |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0481820A true JPH0481820A (en) | 1992-03-16 |
Family
ID=16331997
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2194888A Pending JPH0481820A (en) | 1990-07-25 | 1990-07-25 | Active matrix substrate and liquid crystal display element using the same |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0481820A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR950019865A (en) * | 1993-03-07 | 1995-07-24 | 카나이 쯔또무 | LCD and its manufacturing method |
WO2000059040A1 (en) * | 1999-03-30 | 2000-10-05 | Seiko Epson Corporation | Method of manufacturing thin-film transistor |
WO2000059041A1 (en) * | 1999-03-30 | 2000-10-05 | Seiko Epson Corporation | Method of manufacturing thin-film transistor |
US7075614B2 (en) | 2000-06-02 | 2006-07-11 | Sharp Kabushiki Kaisha | Method of making active matrix substrate with pixel electrodes of photosensitive conductive material |
US8154699B2 (en) * | 2008-05-29 | 2012-04-10 | Hitachi Displays, Ltd. | Liquid crystal display device |
-
1990
- 1990-07-25 JP JP2194888A patent/JPH0481820A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR950019865A (en) * | 1993-03-07 | 1995-07-24 | 카나이 쯔또무 | LCD and its manufacturing method |
WO2000059040A1 (en) * | 1999-03-30 | 2000-10-05 | Seiko Epson Corporation | Method of manufacturing thin-film transistor |
WO2000059041A1 (en) * | 1999-03-30 | 2000-10-05 | Seiko Epson Corporation | Method of manufacturing thin-film transistor |
US6514801B1 (en) | 1999-03-30 | 2003-02-04 | Seiko Epson Corporation | Method for manufacturing thin-film transistor |
US6767775B1 (en) | 1999-03-30 | 2004-07-27 | Seiko Epson Corporation | Method of manufacturing thin-film transistor |
US7075614B2 (en) | 2000-06-02 | 2006-07-11 | Sharp Kabushiki Kaisha | Method of making active matrix substrate with pixel electrodes of photosensitive conductive material |
US8154699B2 (en) * | 2008-05-29 | 2012-04-10 | Hitachi Displays, Ltd. | Liquid crystal display device |
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