JPH047911A - Phase locked loop oscillating circuit - Google Patents

Abstract

PURPOSE:To keep the accuracy of a frequency of an output clock signal even after interruption of an input clock signal by providing a constant voltage supply circuit to a voltage controlled oscillator and giving a control voltage to the voltage supply circuit when the interruption of the input clock signal is detected. CONSTITUTION:So long as a predetermined clock signal is inputted to a terminal 1 of a switch 14, the switch 14 is closed by a control signal of a clock interruption detection circuit 17 and a switch 18 is opened. An output of a low pass filter 13 is inputted as it is to a voltage control input terminal of a voltage controlled oscillator 15 and a clock signal having an oscillating frequency corresponding to the input control voltage is outputted from a terminal 2. When a detection circuit 17 detects interruption of the input clock signal, the switch 18 is closed at first to connect itself to the constant voltage supply circuit 20. Then the input voltage of the oscillator 15 is filed to a prescribed value by allowing the detection circuit 17 to open the switch 14 and the output of the oscillator 16 outputs the clock signal consecutively at a prescribed frequency without causing rapid disturbance.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention is applied to a phase synchronized oscillation circuit that outputs a clock signal that is phase synchronized with an input clock signal. In particular, the present invention relates to a phase-locked oscillator circuit that maintains the accuracy of the output frequency when the input clock signal is interrupted.

〔overview〕

The present invention provides a phase-locked oscillator circuit in which a voltage controlled oscillator is provided with a constant voltage supply circuit that generates a control voltage whose oscillation frequency becomes a predetermined frequency, and the generated control voltage is supplied when disconnection of an input clock signal is detected. This makes it possible to maintain the accuracy of the frequency of the output clock signal even when the input clock signal is disconnected.

[Conventional technology]

FIG. 2 is a block diagram of a conventional phase-locked oscillation circuit.

Conventionally, in a phase-locked oscillator circuit, when the input clock signal is disconnected, the first method is to leave the circuit output frequency to the free run of the voltage controlled oscillator, and the second method is as shown in Figure 2. There was a method of incorporating a crystal oscillator with the same frequency as the input clock, and then switching the clock input to the built-in crystal oscillator when an input clock disconnection was detected.

[Problem that the invention seeks to solve]

However, in such a conventional phase-locked oscillator circuit, the first method leaves the output frequency of the circuit to the free run of the voltage controlled oscillator, so the range of the output frequency spreads over the entire control range of the voltage controlled oscillator. There was a drawback that good accuracy could not be obtained. In addition, the second method selects the output of the crystal oscillator as the input clock signal in order to avoid free running of the voltage controlled oscillator when the clock signal is interrupted, so it is possible to maintain the accuracy of the frequency of the clock signal. Since the output timing of the frequency divider circuit 11 shown in FIG. 2 is disrupted due to the interruption of the input clock signal, the subsequent phase synchronization circuit detects the loss of synchronization and the output clock signal is disrupted while performing the synchronization pull-in operation. There were drawbacks that occurred.

SUMMARY OF THE INVENTION The present invention aims to solve the above-mentioned drawbacks, and aims to provide a phase-locked oscillator circuit that can maintain the accuracy of the frequency of an output clock signal even when input and link signals are disconnected.

[Means for solving problems]

The present invention provides a clock disconnection detection circuit that detects whether an input clock signal is disconnected, a voltage controlled oscillator that outputs a signal with a frequency corresponding to an input control voltage, and an output signal of the voltage controlled oscillator. Phase comparison means for generating a voltage corresponding to the phase difference with the input clock signal;
In the phase synchronized oscillator circuit equipped with a low-pass filter that removes high frequency components of the output voltage of the phase comparison means,
a constant voltage supply circuit that supplies the voltage controlled oscillator with a control voltage whose oscillation frequency becomes a predetermined frequency; and an impedance of a specified value connected to the output of the constant voltage supply circuit;
Based on the negative result of the clock disconnection detection circuit, the output voltage of the low-pass filter is applied to the voltage controlled oscillator. Based on the positive result, the control voltage supplied by the constant voltage supply circuit is controlled through the impedance of the specified value. The present invention is characterized by comprising a switching means for supplying the signal to the oscillator.

Further, in the present invention, the impedance of the specified value is sufficiently smaller than the input impedance of the voltage controlled oscillator that limits a transient current due to a potential difference between the output of the constant voltage supply circuit and the input of the voltage controlled oscillator. It is desirable to have a resistive impedance of value.

Furthermore, in the present invention, the switching means switches the control voltage supplied by the constant voltage supply circuit to the voltage controlled oscillator prior to disconnecting the output voltage of the low-nox filter based on a positive result of the clock disconnection detection circuit. It is desirable to include means for applying the output voltage of the low-pass filter to the voltage controlled oscillator prior to cutting off the control voltage supplied by the constant voltage supply circuit based on the negative result.

[Operation] The constant voltage supply circuit generates a control voltage for the voltage controlled oscillator so that its oscillation frequency becomes a predetermined frequency. The switching means applies the output voltage of the low-pass filter to the voltage controlled oscillator based on the negative result of the clock disconnection detection circuit, and based on the positive result, applies the control voltage generated by the constant voltage supply circuit to the voltage controlled oscillator via the impedance of a specified value. .

In addition, the specified value impedance is a resistive impedance that is sufficiently smaller than the input impedance of the voltage controlled oscillator, and is a resistive impedance that suppresses transient current due to the potential difference between the output of the voltage supply circuit and the input of the voltage controlled oscillator. Restrict.

Furthermore, the switching means applies the control voltage supplied by the constant voltage supply circuit to the voltage controlled oscillator prior to disconnecting the output voltage of the low-pass filter based on the positive result of the clock disconnection detection circuit, and the switching means applies the control voltage supplied by the constant voltage supply circuit to the voltage controlled oscillator based on the negative result. Prior to cutting off the supplied limiting voltage, the output voltage of the low-pass filter is applied to the voltage controlled oscillator to eliminate disturbances in the output clock signal at the time of switching.

As a result of the above, the accuracy of the frequency of the output clock signal can be maintained even when the input clock signal is interrupted.

〔Example〕

Embodiments of the present invention will be described with reference to the drawings. 1st
The figure is a block diagram of a phase-locked oscillation circuit according to an embodiment of the present invention. In FIG. 1, the phase synchronized oscillator circuit includes a clock disconnection detection circuit 17 that detects whether or not a clock signal input through a clock input terminal 1 is disconnected, and a clock disconnection detection circuit 17 that detects whether or not a clock signal input via a clock input terminal 1 is disconnected, and a clock disconnection detection circuit 17 that detects whether a clock signal input via a clock input terminal 1 is disconnected or not, and a clock disconnection detection circuit 17 that detects whether a clock signal input via a clock input terminal 1 is disconnected. A voltage controlled oscillator 15 to output, a frequency dividing circuit 11, 16 and a phase comparator 12 as phase comparison means for generating a voltage corresponding to the phase difference between the output signal of the voltage controlled oscillator 15 and the input clock signal, and a phase A low-pass filter 13 that removes high frequency components of the output voltage of the comparator 12, and a voltage controlled oscillator 15.
and a clock output terminal 2 that outputs an output signal.

Here, the feature of the present invention is that the voltage controlled oscillator 1
5, a constant voltage supply circuit 20 that supplies a control voltage whose oscillation frequency becomes a predetermined frequency; A switch 14.18 serves as a switching means for applying the output voltage of the filter 13 to the voltage controlled oscillator 15 and, based on the affirmative result, applying the control voltage supplied by the constant voltage supply circuit 20 to the voltage controlled oscillator 15 via the impedance of the specified value. The reason is that we have prepared the following.

In addition, the impedance of the above specified value is the constant voltage supply circuit 2
The resistance 19 has a value sufficiently smaller than the input impedance of the voltage controlled oscillator 15 that limits transient current due to the potential difference between the output of the voltage controlled oscillator 15 and the input of the voltage controlled oscillator 15.

Furthermore, the switches 14 and 18 are connected to the clock disconnection detection circuit 17.
Based on the affirmative result, the control voltage supplied by the constant voltage supply circuit 20 is applied to the voltage controlled oscillator 15 prior to cutting off the output voltage of the low-pass filter 13. Based on the negative result, the control voltage supplied by the constant voltage supply circuit 20 is cut off. It includes means for applying the output voltage of the low-pass filter 13 to the voltage controlled oscillator 15 prior to disconnection.

The operation of the phase-locked oscillator circuit having such a configuration will be explained. In FIG. 1, first, a normal case where a clock signal is input to clock input terminal 1 will be described. A clock signal input to the clock input terminal 1 is frequency-divided by a frequency dividing circuit 11 and input to a phase comparator 12 as a reference clock. On the other hand, the output of the clock output terminal 2 from which the output of this circuit is obtained is the output of the frequency dividing circuit 1.
6, and its frequency-divided output is input to the phase comparator 12. The phase comparator 12 compares the phase of the reference clock with the phase of the output signal of the frequency divider circuit 16, and outputs a signal for controlling the phase of the output of the frequency divider circuit 16.

The low-pass filter 13 functions to convert the output signal of the phase comparator 12 into a DC signal representing voltage information.

As long as a predetermined clock signal is input to the clock input terminal 1, the switch 14 is closed by the control signal from the tally disconnection detection circuit 17. At this time, the switch 18 is opened by a control signal from the tarlock disconnection detection circuit 17. Therefore, the output of the low-pass filter 13 is directly input to the voltage control input terminal of the voltage control oscillator 15, and a clock signal having an oscillation frequency corresponding to the input control voltage of the voltage control oscillator 15 is output to the clock output terminal 2. Further, the output signal of the voltage controlled oscillator 15 is fed back to the phase comparator 12 via the frequency dividing circuit 16, so that the clock signal is inputted to the clock input terminal 1 and the clock signal outputted to the clock output terminal 2. Synchronous operation including phase is performed.

Next, the operation when the input clock signal is disconnected will be explained. When the clock disconnection detection circuit 17 detects disconnection of the input clock signal, it first closes the switch 18 and connects it to the constant voltage supply circuit 20. At this time, the resistor 1
At 9, the output of the constant voltage supply circuit 20 and the voltage controlled oscillator 15
limits transient currents due to potential differences that exist between the input terminals of the Here, assuming that the input pedance of the voltage controlled oscillator 150 is sufficiently larger than the impedance of the resistor 19, then the clock loss detection circuit 1
7 opens the voltage controlled oscillator 1 by opening the switch 14.
50 input voltage is fixed at a predetermined value, and the output of the voltage controlled oscillator 15 can continue to output a clock signal at a predetermined frequency without sudden disturbance.

When the input clock signal is restored, when the clock loss detection circuit 17 detects the restoration, it closes the switch 14 in the reverse order of the input clock loss, and then closes the switch 1.
By opening 8, the circuit starts a phase synchronization operation with respect to the clock signal.

As described above, this embodiment can maintain the accuracy of the frequency of the output clock signal including the phase even when the input clock signal is interrupted.

In addition, by adopting this embodiment in the clock section of a node device of a digital network, even if a clock signal disconnection occurs on the receiving line from the upper station, the processing within the node device will not suddenly become abnormal, and there will be ample margin. This enables troubleshooting for this clock signal disconnection.

Furthermore, by using this embodiment and supplying a predetermined control voltage to the voltage controlled oscillator in advance, a stable output clock signal can be obtained. It is possible to supply a highly accurate clock signal for

〔Effect of the invention〕

As described above, the present invention has the excellent effect of maintaining the accuracy of the frequency of the output clock signal, including the phase, even when the input clock signal is interrupted.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a phase-locked oscillator circuit according to an embodiment of the present invention. FIG. 2 is a block diagram of a conventional phase-locked oscillator circuit. 1... Clock input terminal, 2... Clock output terminal, 11.16... Frequency divider circuit, 12 phase comparator, 13
...Low pass filter, 14.18...Switch,
15... Voltage controlled oscillator, 17... Clock disconnection detection circuit, 19... Resistor, 2o... Constant voltage supply circuit, 2
1...Crystal oscillator, 22...Selection circuit.

Claims (1)

[Claims] 1. A clock disconnection detection circuit that detects whether an input clock signal is disconnected, a voltage controlled oscillator that outputs a signal with a frequency corresponding to an input control voltage, and this voltage controlled oscillator. A phase synchronized oscillation circuit comprising a phase comparison means for generating a voltage corresponding to the phase difference between the output signal of the output signal and the input clock signal, and a low-pass filter for removing a high frequency component of the output voltage of the phase comparison means, a constant voltage supply circuit that supplies the voltage controlled oscillator with a control voltage whose oscillation frequency becomes a predetermined frequency; and an impedance of a specified value connected to the output of the constant voltage supply circuit;
Based on the negative result of the clock disconnection detection circuit, the output voltage of the low-pass filter is applied to the voltage controlled oscillator. Based on the positive result, the control voltage supplied by the constant voltage supply circuit is controlled through the impedance of the specified value. 1. A phase synchronized oscillator circuit comprising: switching means for supplying to an oscillator. 2. The impedance of the specified value has a resistance value sufficiently smaller than the input impedance of the voltage controlled oscillator that limits transient current due to the potential difference between the output of the constant voltage supply circuit and the input of the voltage controlled oscillator. 2. The phase-locked oscillator circuit according to claim 1, wherein the impedance is . 3. The switching means applies the control voltage supplied by the constant voltage supply circuit to the voltage controlled oscillator prior to cutting off the output voltage of the low-pass filter based on the positive result of the clock disconnection detection circuit, and based on the negative result. 2. The phase-locked oscillator circuit according to claim 1, further comprising means for applying the output voltage of the low-pass filter to the voltage controlled oscillator prior to cutting off the control voltage supplied by the constant voltage supply circuit.