JPH0478043B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application This invention relates to an amplifier in which an arbitrary offset can be set.

BACKGROUND ART Conventionally, when adjusting the offset of an operational amplifier, an offset generation circuit is installed at the input section of the operational amplifier, and an arbitrary offset is set outside the operational amplifier.

Problems to be Solved by the Invention This type of circuit requires an offset generation circuit in addition to the operational amplifier, and has drawbacks such as low reliability of the set offset.

Furthermore, it has been difficult to construct this type of offset generation circuit for external connection using a semiconductor integrated circuit together with an operational amplifier.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide an amplifier which is suitable for semiconductor integrated circuits, can set an arbitrary offset, and has improved reliability of the set offset.

Means for Solving the Problems The amplifier of the present invention includes a first transistor 6 and a second transistor 8 having a common emitter.
A third transistor 12 is installed on the emitter side of the first and second transistors.
are connected in series, a first current mirror circuit consisting of fourth and fifth transistors 24 and 26 is connected as an active load to the collector sides of the first and second transistors, and the base of the third transistor is connected as an active load to the collector sides of the first and second transistors. A constant current is supplied to the first differential pair to supply an operating current to the first differential pair, and an input signal to be amplified is supplied to the base of the first transistor.
an amplification section (operational amplifier 2) comprising a differential amplifier that connects a voltage source 20 to the base of the first transistor to apply a constant bias voltage, and takes out the amplified output of the input signal from the collector side of the first transistor; , a second differential pair consisting of sixth and seventh transistors 42 and 44 having a common emitter is installed, and a second current mirror circuit (transistors 46 and 48) is installed as an active load. An eighth transistor 56 is installed to which an output taken out from the seventh transistor side is added as a base current in accordance with a control voltage applied to the base of the seventh transistor, and a current flows through the eighth transistor. A ninth transistor is installed through which a base current flows and draws the base currents of the fourth and fifth transistors, and a voltage generated across a resistor 64 connected in series with the ninth transistor 58 is applied to the sixth transistor. The present invention is characterized in that it includes a current control circuit (offset setting circuit 4) that is added to the base of the control voltage and sets an arbitrary offset in the amplifying section according to the control voltage.

Operation A constant current is supplied as an operating current to the first differential pair of the amplifier, and the input signal applied to the base of the first transistor is amplified according to the bias voltage applied to the base of the second transistor. The amplified output is taken out through the first current mirror circuit.

On the other hand, in the current control circuit, the output of the second differential pair consisting of the sixth and seventh transistors is taken out from the seventh transistor side according to the control voltage, and the output is taken out from the base of the eighth transistor. A current corresponding to the base current flows through the eighth transistor. This current becomes the base current of the ninth transistor, and a current corresponding to the base current flows through the ninth transistor.
As a result, the ninth transistor
The current flowing through the current mirror circuit, ie, the base current of the fourth and fifth transistors, is drawn in, and this sets an offset for the amplification section.

And the current flowing through the ninth transistor is
A voltage is developed across a resistor connected in series with the ninth transistor, and this voltage is applied to the base of the sixth transistor. That is, in the current control circuit, the second differential pair compares the control voltage and the voltage generated in the resistor, and the current obtained in the seventh transistor depends on the magnitude relationship between the two. There is.

Embodiments Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings.

FIG. 1 shows an embodiment of the amplifier of the invention.

In FIG. 1, this amplifier has an operational amplifier section 2 composed of a differential amplifier, and an offset setting circuit 4 as a current control circuit for setting an arbitrary offset to the differential amplifier.

In the operational amplifier section 2, first and second transistors 6 and 8 having a common emitter are installed as a first differential pair, and a ground terminal (GND) 10 is formed with the emitters of these transistors 6 and 8. A transistor 12 is installed between the reference potential line and a differential amplifier. The transistor 14 constitutes a current mirror circuit with the third transistor 12, and a constant current flowing through the constant current source 16 flows to the transistors 6 and 8 as an operating current.

An input terminal 18 is formed at the base of the transistor 6 to which a signal to be amplified is applied, and a voltage source 20 is connected to the base of the transistor 8 to apply a predetermined bias.

Further, between the collectors of each transistor 6 and 8 and the positive potential line where the power supply terminal 22 is formed,
Fourth and fifth transistors 2 constituting a first current mirror circuit as an active load of a differential amplifier
4 and 26 are installed, and the transistor 6
The differential output is taken out from the collector side.
That is, the output circuit includes transistors 28, 3
0, 32, and 34, the base current of the transistor 28 is drawn in accordance with the current flowing to the transistor 6, and the current flowing to the transistor 28 and the current from the constant current source 16 flowing to the transistor 30 are accordingly The current flowing through the transistor 32 and the constant current from the constant current source 16 flowing through the transistor 34 are combined, and the output voltage Vo due to the combined current flows from the output terminal 36. It is now being taken outside.

The offset setting circuit 4 converts the control voltage Vc set to the control input terminal 38 into a current, and also transmits the current to the transistors 24 and 26 that constitute the active load of the differential amplifier of the operational amplifier section 2.
and set an arbitrary offset in the amplifying section 2. That is, the offset setting circuit 4
The transistors 46, 48, 50, 52, the eighth transistor 56, the ninth transistor 58, and the resistor 6, together with the sixth and seventh transistors 42 and 44 having a common emitter, forming a differential pair.
It consists of 0, 62, 64. Transistors 42, 44 and resistor 60 form a differential amplifier, transistors 46, 48 form a second current mirror circuit to provide an active load to the differential amplifier, and transistors 50, 52 form a level shift circuit. Configure.

Also, transistors 56, 58 and resistor 6
2 and 64 are transistors 24 and 26 depending on the current taken out from the collector of transistor 44.
A current control circuit is configured to allow current to flow through the transistor 50 and to feed back the current to the base of the transistor 50. That is, a base current is applied to the transistor 56 according to the current flowing through the transistor 52, a base current is applied to the transistor 58 according to the current flowing through the transistor 56, and current flows from the transistor 58 to the transistors 24 and 26. The current flowing through transistor 58 causes a voltage drop across resistor 64, and this voltage drop is fed back to the base of transistor 50.

Based on the above configuration, its operation will be explained with reference to FIG.

When the current flowing through the constant current source 16 is 2I, the current flowing through the transistor 6 is I ₂ and the current flowing through the transistor 8 is I ₁ , the current 2I flows through the transistor 12 due to the current mirror effect, so the following equation is established. do.

I ₁ + I ₂ = 2I ... (1) Also, if the control voltage applied to the control input terminal 38 is Vc, and the resistance value of the resistor 64 is Rx, the control current Ic flowing from the transistors 24 and 26 to the transistor 58 is offset Due to the operation of the full feedback amplifier that constitutes the setting circuit 4, Ic=Vc/Rx (2) is established. Therefore, assuming that the resistance value Rx is constant, the control current Ic increases or decreases in proportion to the control voltage Vc.

Then, the control current Ic flows from the transistor 24 to the transistor 6, and is added to the current I ₂ flowing through the transistor 6. As a result, the offset V _{IN (pffset)} set in the differential amplifier of the amplifier section 2 is V _{IN (pffset )} = 26In(I ₂ + Ic) / (I ₁ − Ic) ...(3) is given.

Therefore, a ramp waveform input V _IN is applied to the input terminal 18 so that the voltage level increases with the passage of time as shown in A in FIG.
As shown in B in FIG. 2, the voltage level increases over time in sections B ₁ , B ₃ , B ₅ and in sections B ₂ and B ₄ in which the voltage level remains constant regardless of the passage of time. Assuming that a control voltage Vc whose level is set to rise in stages is applied, an offset is set in the differential amplifier constituted by transistors 6 and 8 of the amplification section 2 by this control voltage Vc, resulting in the following: As is clear from the comparison between C in FIG. 2 and A and B in FIG. _B1 , _B3 , _B5
A pulse-like output Vo is generated in which the signal is at a high level and the other sections B ₂ and B ₄ are at a low level. That is,
As a result of setting the offset according to the control voltage Vc, an output corresponding to the offset can be obtained.

Effects of the Invention As explained above, according to the present invention, by controlling the current of the current mirror circuit, which is an active load of the amplification section, according to the control voltage, an arbitrary offset can be applied to the amplification section according to the control voltage. Furthermore, the current control circuit that sets or controls the offset has the same element configuration as the amplifier section, such as transistors, and does not require an external load circuit, so it can be easily realized using a semiconductor integrated circuit. can.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the amplifier of the present invention, and FIG. 2 is an explanatory diagram showing its differential waveform. 2... operational amplifier section (amplification section), 4... offset setting circuit (current control circuit), 6... first transistor (first differential pair), 8... second transistor (first differential pair), 12... third transistor, 20... voltage source, 24... fourth transistor (first current mirror circuit), 26... fifth transistor
transistor (first current mirror circuit), 42
...Sixth transistor (second differential pair), 44
...Seventh transistor (second differential pair), 46,
48...transistor (second current mirror circuit),
56...Eighth transistor, 58...Ninth transistor, 64...Resistor.

Claims (1)

[Claims] 1. A first differential pair consisting of a first and a second transistor having a common emitter is installed, and a third transistor is connected in series on the emitter side of the first and second transistors. A first current mirror circuit consisting of fourth and fifth transistors is connected as an active load to the collector sides of the first and second transistors, and a constant current is caused to flow into the base of the third transistor. Said first
While passing an operating current through the differential pair, the input signal to be amplified is connected to the base of the first transistor, and a voltage source is connected to the base of the second transistor to apply a constant bias voltage. A second differential pair consisting of an amplifier having a differential amplifier that takes out the amplified output from the collector side of the first transistor, and a sixth and seventh transistor having a common emitter is installed, and an active load. A second current mirror circuit is installed as a second current mirror circuit, and an eighth transistor is installed to which an output taken out from the seventh transistor side is added as a base current in accordance with a control voltage applied to the base of the seventh transistor, This eighth
A ninth transistor is installed in which a base current flows in accordance with the current flowing through the transistor and draws the base currents of the fourth and fifth transistors, and a voltage is generated in a resistor connected in series with the ninth transistor. is added to the base of the sixth transistor, and a current control circuit that sets an arbitrary offset to the amplification section according to the control voltage.