JP2532900Y2 - Limiter circuit - Google Patents

Description

[Detailed description of the invention]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a limiter circuit for limiting a signal amplitude.

[0002]

2. Description of the Related Art Hitherto, a limiter circuit has been used to limit the amplitude of a signal. Conventional limiter circuits include, for example, those using a diode and those using an operational amplifier.

FIG. 4A shows a configuration of a limiter circuit using a diode. The signal output from the signal source 10 via the resistor R in the circuit shown in FIG.
As shown in (b), the + V ₁ voltage source 12 and the forward diode 14 limit the + side voltage amplitude to + V ₁ , the −V ₂ voltage source 16 and the reverse diode 18.
Limits the − side voltage amplitude to −V ₂ .

FIG. 5A shows a configuration of a limiter circuit using an operational amplifier. In the circuit shown in the figure, the amplitude of the signal output from the signal source 10 is limited by the high gain amplification of the operational amplifier 20, as shown in FIG. That is, the signal output from the signal source 10 is ±
Is input to the inverting input terminal of the operational amplifier 20 operating at a power supply voltage of V _cc, is amplified and output. Gain is set by resistors R ₁ and R ₂ in the high gain, the output signal of the operational amplifier 20 is limited to _{± (V cc -V (sat)} ). V
_(sat) is the output saturation voltage of the operational amplifier 20.

[0005]

Among these conventional circuits, in the circuit of FIG. 4, the characteristics of the diodes 14 and 18 appear at the amplitude limiting level. Limit level (+ V ₁ ,-
V ₂ ) is unbalanced. In the circuit of FIG. 5, such an imbalance does not occur, but the amplitude limit level is the power supply voltage _Vcc and the output saturation voltage V of the operational amplifier 20.
_(sat) , the amplitude limit level fluctuates due to variations in _Vcc and V _(sat) and temperature characteristics.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to provide a limiter circuit whose amplitude limit level is temperature-independent without depending on the power supply voltage. I do.

[0007]

In order to achieve such an object, the present invention provides first and second transistors which are differentially connected, and two transistors which are connected to the emitter of each transistor.
A first transistor including a plurality of emitter resistors, a constant current source for supplying a current to each transistor via the emitter resistor, and a current mirror circuit for equalizing an emitter current of the first transistor and an emitter current of the second transistor; A differential amplifier circuit that takes in the signal voltage from the base of the
An operational amplifier having input terminals connected to a base and a collector of the second transistor, and a feedback resistor connected between an output terminal of the operational amplifier and a collector of the second transistor; The amplitude of the voltage is limited by the product of the current value of the constant current source and the resistance value of the feedback resistor.

[0008]

[Action]

In the present invention, a signal voltage is inputted to a base of a first transistor among transistors constituting a differential amplifier circuit. Since the emitter currents of the first and second transistors have the same value due to the current mirror circuit, a current corresponding to the difference between the collector currents of the first transistor and the second transistor flows from the output terminal of the operational amplifier to the feedback resistor. Through the collector of the second transistor. As a result, voltage feedback is applied to the differential amplifier. Since the collector currents of the first and second transistors are limited by the current value from the constant current source, the output voltage from the operational amplifier is limited by the product of the current value of the constant current source and the resistance value of the feedback resistor. You. Therefore, the amplitude limit level does not depend on the power supply voltage. Also, since voltage feedback is applied to the operational amplifier by the emitter resistance and feedback resistance,
The voltage gain of the circuit is determined by the ratio between the two, and a circuit having a level adjusting function is realized.

[0010]

【Example】

[0011] below, it will be described with reference to the drawings the preferred embodiments of the present invention.

FIG. 1A shows a configuration of a limiter circuit according to a first embodiment of the present invention. This example is
Generally, it comprises a differential amplifier 22 and an operational amplifier 24.

The differential amplifier 22 includes a pair of transistors Q
It is equipped with a _1, Q _2. These transistors Q ₁ , Q ₂
Is connected to a constant current source I ₀ via resistors R _E1 and R _E2 . The collectors of the transistors Q ₁ and Q ₂ are connected to a current mirror circuit including current sources I _C3 and I _C4 .

The base of the transistor Q ₂ is connected to the non-inverting input terminal of the operational amplifier 24. Operational amplifier 2
Inverting input terminal of the 4 is connected to the collector of the transistor Q _2, it is further output terminal of the operational amplifier 24 and between the inverting input terminal is connected a feedback resistor R _L is.

[0015] In this example, if you enter the base to the signal source 10 from the signal voltage V _IN of the transistor Q _1, was added V _REF as a bias voltage, the transistors Q _1,
Collector current I _C1, I _C2 of Q ₂ are the input voltage V _IN -V _REF of the differential amplifier 22 is expressed as follows.

I _C1 = I ₀ / [1 + exp {−q / kT (V _IN −V _REF )}] (1) I _C2 = I ₀ / [1 + exp ｛+ q / kT (V _IN −V _REF )}] (2) I ₀ = I _C1 + I _C2 (3) where q = 1.6 × 10 ⁻¹⁹ [C], k = 1.38 ×
10 ^-23 [J / K], T is an absolute temperature. On the other hand, the collector current I _C1 of the transistor Q ₁ is serves as an input current of the current mirror circuit is active load, the current mirror circuit that the following formula is valid.

I _C3 = I _C4 = I _C1 (4) The current I _L = I _C2 −I _C4 flowing through the feedback resistor _RL is obtained from the equations (3) and (4). Since the equation (2) using the _{I L = 2I 0 / [1} + exp {+ q / kT (V IN -V REF)}] - represented I ₀ ... (5). The output voltage V ₀ of the operational amplifier 24 is expressed as V ₀ = V _REF + I _{L RL} . ... (6) As is clear from equation (5), the input voltage V _IN -V _REF =
In the case of 0, the load current I _L = 0 and V ₀ = V _REF . The collector current I _C1, I _C2 is because never exceed I _0, the saturation current of the load current I _L becomes ± I _0. Therefore, the amplitude limiting level V at the output of the operational amplifier 24
_LIMIT is V _LIMIT = _RL × (± I ₀ ). That is, the output voltage V ₀ of the operational amplifier 24 becomes V ₀ = V _REF + V _LIMIT = V _REF ± R _L I ₀ .

As described above, in the present embodiment, the amplitude limit level V _LIMIT does not depend on the power supply voltage V _cc , and R _L , I _L
It can be set arbitrarily by _0, and the variation of the amplitude limit level V _LIMIT due to the variation of the power supply voltage and the temperature characteristic is reduced. In addition, the feedback resistor _RL and the emitter resistor R _E (= R _E1 =
R _E2 ) determines the voltage gain A _V as R _L / R _E ,
By appropriately setting both resistors R _L and R _E , both a limiter amplifier (A _V > 1) and a limiter attenuator (A _V <1) can be realized. This eliminates the need for a separate level adjustment circuit.

FIG. 2A shows the configuration of a limiter circuit according to a second embodiment of the present invention. In this embodiment, the transistors Q ₁ and Q ₂ in the first embodiment are PN
This is different from the P transistor in that it is an NPN transistor. Moreover, they are different positions of the constant current source I ₀ and a current mirror circuit in response thereto. Also in this embodiment, as shown in FIG.
The same output, operation and effect as in the embodiment can be obtained.

FIG. 3 shows the configuration of a temperature compensation circuit for stabilizing I ₀ in temperature. This circuit is particularly suitable when the circuit of the present invention is integrated into an IC.

[0021] In this circuit, the transistor Q ₃ of the short circuit between the base and the collector is used as a temperature compensating transistor. The emitter of the transistor Q ₃ are is connected to a voltage source V _BIAS, the collector of the transistor Q ₄ is connected to the collector. This transistor Q
₄ even short between the base and the collector, the resistance R _B is connected to its emitter. The base of the transistor Q _3, Q _4, a current supplied from the constant current source 2I _B. The base of transistor Q ₄ are connected to the base of the transistor Q _5, the emitter of the transistor Q ₅ is resistor R ₀ is connected. Transistor Q ₅ is a constant current source I
₀ is the output transistor of conjunction with transistor Q _4, a current mirror circuit.

When this circuit is formed on an IC substrate, the transistors Q ₃ , Q ₄ and Q ₅ can have the same characteristics. Therefore, when the voltage between the base and the emitter of each of the transistors Q ₃ , Q ₄ and Q ₅ fluctuates with the temperature or when the power supply voltage V _cc
There even when fluctuation, the voltage applied to the emitter resistance R ₀ of the transistor Q ₅ is constant V _BIAS. Therefore, the current output I ₀ becomes V _BIAS / R ₀ . Since the temperature characteristic of R _{0 and} the temperature characteristic of the feedback resistor _RL can be made substantially equal by the use of an IC, V _LIMIT has no temperature characteristic, and a more temperature stable amplitude limit level V _LIMIT can be obtained.

Further, since the temperature coefficients of the resistors _RE and _RL can be matched by using an IC, the voltage gain A _V
Becomes stable in temperature.

[0024]

[Effects of the Invention] As described above, according to the present invention,
Since the differential amplifier and the operational amplifier are used to limit the output voltage from the operational amplifier by the product of the current value of the constant current source and the resistance value of the feedback resistor, the amplitude limit level does not depend on the power supply voltage, Since voltage feedback is applied to the operational amplifier by the emitter resistor and the feedback resistor, the voltage gain of the circuit can be set by the ratio between the two, and the level adjustment circuit is not required.

[0025]

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration and an output waveform of a limiter circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration and an output waveform of a limiter circuit according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram showing a configuration of a temperature compensation circuit.

FIG. 4 is a circuit diagram showing a configuration and an output waveform of a limiter circuit according to a first conventional example.

FIG. 5 is a circuit diagram showing a configuration and an output waveform of a limiter circuit according to a second conventional example.

[Explanation of symbols]

22 differential amplifier Q _1, Q ₂ transistor R _E1, R _E2 transistor Q _1, the emitter resistance or resistance thereof Q ₂ I ₀ a constant current source or a current value I _C1, I _C2 collector of the transistor Q _1, Q ₂ Currents I _C3 , I _C4 Current sources constituting the current mirror circuit or their current values V _IN signal voltage 24 Operational amplifier R _L Feedback resistance I _L Load current V ₀ Output voltage of operational amplifier V _LIMIT amplitude limit level A _V voltage gain

Claims (1)

(57) [Scope of request for utility model registration] 1. A differentially connected first and second transistor, two emitter resistors connected to the emitter of each transistor, a constant current source for supplying a current to each transistor via the emitter resistor, and the emitter current of the second transistor comprises a current mirror circuit made equal to the emitter current of the first transistor, and a differential amplifier circuit for taking a signal voltage from the base of the first transistor, the base and collector of the second transistor An operational amplifier having input terminals connected thereto, and a feedback resistor connected between an output terminal of the operational amplifier and a collector of the second transistor. The amplitude of the output voltage from the operational amplifier is A limiter circuit characterized by limiting by a product of a current value and a resistance value of a feedback resistor.