JPH0472633U - - Google Patents

Info

Publication number
JPH0472633U
JPH0472633U JP1990116179U JP11617990U JPH0472633U JP H0472633 U JPH0472633 U JP H0472633U JP 1990116179 U JP1990116179 U JP 1990116179U JP 11617990 U JP11617990 U JP 11617990U JP H0472633 U JPH0472633 U JP H0472633U
Authority
JP
Japan
Prior art keywords
semiconductor device
notch
package
seal member
metal seal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1990116179U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990116179U priority Critical patent/JPH0472633U/ja
Publication of JPH0472633U publication Critical patent/JPH0472633U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の実施例を示す半導体装置の分
解斜視図、第2図は本考案の実施例を示す半導体
装置の分解断面図、第3図は従来の半導体装置の
製造工程図、第4図は本考案の他の実施例を示す
半導体装置の製造工程図、第5図は本考案の他の
実施例の変形例を示す半導体装置の部分拡大断面
図である。 10,30,40……パツケージ、11,31
,41……外部リード、12,32,42……切
欠部、13,35……半導体素子、14,36…
…金属細線、20……金属シール部材、21……
隆起した収納部、22……鍔状部、23……係合
片、25……シール樹脂、33,43……スルー
ホール、34,35……配線端子、37,46…
…導電性接着材、44……配線。
FIG. 1 is an exploded perspective view of a semiconductor device showing an embodiment of the present invention, FIG. 2 is an exploded sectional view of a semiconductor device showing an embodiment of the invention, and FIG. 3 is a manufacturing process diagram of a conventional semiconductor device. 4 is a manufacturing process diagram of a semiconductor device showing another embodiment of the present invention, and FIG. 5 is a partially enlarged sectional view of a semiconductor device showing a modification of the other embodiment of the present invention. 10, 30, 40...Package, 11, 31
, 41... External lead, 12, 32, 42... Notch, 13, 35... Semiconductor element, 14, 36...
...Thin metal wire, 20...Metal sealing member, 21...
Raised storage portion, 22... Flange-shaped portion, 23... Engaging piece, 25... Seal resin, 33, 43... Through hole, 34, 35... Wiring terminal, 37, 46...
...Conductive adhesive, 44...Wiring.

Claims (1)

【実用新案登録請求の範囲】 (1) 主表面に配線された半導体素子を固着し、
配線端子と半導体素子の外部接続電極とを電気的
に導通させたパツケージをシールする半導体装置
において、 (a) 前記パツケージの少なくとも対向する2
辺にテーパ面を有する切欠部と、 (b) 該切欠部に対応する係合片を形成した金
属シール部材とを具備する半導体装置。 (2) 前記パツケージの切欠部に配線端子を形成
し、該配線端子に前記金属シール部材を接続し、
前記金属シール部材を接地し、配線部材として構
成することを特徴とする請求項1記載の半導体装
置。
[Scope of claims for utility model registration] (1) Fixing a semiconductor element wired on the main surface,
In a semiconductor device that seals a package in which a wiring terminal and an external connection electrode of a semiconductor element are electrically connected, (a) at least two opposing electrodes of the package are provided;
A semiconductor device comprising: a notch having tapered sides; and (b) a metal seal member having an engaging piece formed therein corresponding to the notch. (2) forming a wiring terminal in the notch of the package, connecting the metal seal member to the wiring terminal;
2. The semiconductor device according to claim 1, wherein the metal seal member is grounded and configured as a wiring member.
JP1990116179U 1990-11-07 1990-11-07 Pending JPH0472633U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990116179U JPH0472633U (en) 1990-11-07 1990-11-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990116179U JPH0472633U (en) 1990-11-07 1990-11-07

Publications (1)

Publication Number Publication Date
JPH0472633U true JPH0472633U (en) 1992-06-26

Family

ID=31863997

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990116179U Pending JPH0472633U (en) 1990-11-07 1990-11-07

Country Status (1)

Country Link
JP (1) JPH0472633U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010109140A (en) * 2008-10-30 2010-05-13 Nec Electronics Corp Electronic device and lid

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010109140A (en) * 2008-10-30 2010-05-13 Nec Electronics Corp Electronic device and lid

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