JPH0469581A - Test circuit for semiconductor integrated circuit - Google Patents
Test circuit for semiconductor integrated circuitInfo
- Publication number
- JPH0469581A JPH0469581A JP2182378A JP18237890A JPH0469581A JP H0469581 A JPH0469581 A JP H0469581A JP 2182378 A JP2182378 A JP 2182378A JP 18237890 A JP18237890 A JP 18237890A JP H0469581 A JPH0469581 A JP H0469581A
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- circuit
- test
- capacitance value
- semiconductor integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 28
- 239000004065 semiconductor Substances 0.000 title claims description 5
- 239000003990 capacitor Substances 0.000 claims abstract description 57
- 230000001052 transient effect Effects 0.000 abstract description 5
- 238000007599 discharging Methods 0.000 description 7
- 238000005259 measurement Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 238000004904 shortening Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業−４−の利用分野）
本発明は、半導体集積回路の試験回路に関し、特にコン
デンサーの充放電特性を利用する試験回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Application in Industry-4-] The present invention relates to a test circuit for semiconductor integrated circuits, and particularly to a test circuit that utilizes the charging and discharging characteristics of a capacitor.
［従来の技術］
従来、定バイアスの回路、例えば直流電源の交流成分の
除去等を目的どするコンデンサーを付加した回路におい
て電気的特性の測定試験を短時間で行う場合、接続する
容量は測定値に大きな影響を及ぼさない範囲でできる限
り小さい容量値を選択し、さらに試験を行う前に、例え
ば第３図、第４図に示すようにコンデンサー２２又は２
６に電流バッファ２０、あるいはバイアス用ｉｊ７変電
源２５を切換器２１又は２４を通して接続して急速にコ
ンデンサー２２又は２６を充電し、試験時には切換器２
１又は２４にてコンデンサー２２又は２６を充電回路よ
り切り放すことにより、コンデンサー２２又は２６の過
渡現象による出力応答の立ち」−がりの遅延を小さくし
て試験時間の短縮を図るという方法がとられている。[Prior Art] Conventionally, when conducting a short-time measurement test of electrical characteristics in a constant bias circuit, for example, a circuit with a capacitor added for the purpose of removing the alternating current component of a direct current power supply, the connected capacitance is the measured value. Select a capacitance value as small as possible without significantly affecting the
A current buffer 20 or a bias ij7 transformer 25 is connected to the switch 21 or 24 to rapidly charge the capacitor 22 or 26.
By disconnecting the capacitor 22 or 26 from the charging circuit at 1 or 24, a method is used to reduce the delay in the rise of the output response due to the transient phenomenon of the capacitor 22 or 26, thereby shortening the test time. ing.
図中、１８．２３は試験回路端子、＋９はコンデンサー
２２を端子１８に切替接続する切換器である。ところで
、コンデンサーの充放電特性を利用している回路におい
てはこのような方法は適用することができない。そのた
め、コンデンサーの充放電特性を利用している回路につ
いては効果的な方法は示されていない。In the figure, 18 and 23 are test circuit terminals, and +9 is a switch that switches and connects the capacitor 22 to the terminal 18. However, such a method cannot be applied to a circuit that utilizes the charging and discharging characteristics of a capacitor. Therefore, no effective method has been shown for circuits that utilize the charging and discharging characteristics of capacitors.
電気回路において短時間で電気的特性を試験する場合、
接続されているコンデンサーの充放電による過渡現象に
より入力信号に対する出力信号の応答が遅くなる。その
結果として試験時間の伸長を招く。従来ではこのような
欠点を改善すべく、前述のような方法が用いられている
が、コンデンサーの充放電特性を利用する回路、例えば
フィルター回路などについては従来のコンデンサーを強
制的に充電する方法は用いることができないため、試験
時間短縮の効果的な方法は示されていない。When testing electrical characteristics in an electrical circuit in a short time,
The response of the output signal to the input signal becomes slow due to transient phenomena caused by charging and discharging of the connected capacitor. As a result, the test time will be extended. In the past, methods such as those described above have been used to improve these drawbacks, but for circuits that utilize the charging and discharging characteristics of capacitors, such as filter circuits, the conventional method of forcibly charging a capacitor is Therefore, no effective method for shortening test time has been shown.
本発明の目的はコンデンサーの充放電特性を利用する回
路においても短時間での測定試験を可能にした半導体集
積回路の試験回路を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a test circuit for semiconductor integrated circuits that enables measurement tests in a short time even in circuits that utilize the charging and discharging characteristics of capacitors.
［課題を解決するための手段］
前記目的を達成するため、本発明に係る半導体集積回路
の試験回路においては、容量の異なるコンデンサーの対
と、切換器とを有する半導体集積回路の試験回路であっ
て、
大容量のコンデンサーは、回路特性上本来接続すべきコ
ンデンサーとして用いるものであり、小容量のコンデン
サーは、大容量のコンデンサーに並列に配置され、試験
時に付加するものであり、
切換器は、大容量のコンデンサーと小容量のコンデンサ
ーとを任意に切替えるものである。[Means for Solving the Problems] In order to achieve the above object, a test circuit for a semiconductor integrated circuit according to the present invention includes a pair of capacitors with different capacities and a switching device. The large capacity capacitor is used as a capacitor that should originally be connected due to the circuit characteristics, and the small capacity capacitor is placed in parallel with the large capacity capacitor and is added during testing. The capacitor can be arbitrarily switched between a large capacity capacitor and a small capacity capacitor.
本発明について添付図面を参照して説明する。 The present invention will be described with reference to the accompanying drawings.
（実施例１） 第１図は本発明の実施例１を示すブロック図である。(Example 1) FIG. 1 is a block diagram showing a first embodiment of the present invention.
第１図の回路ブロック２は、入力端子１から入力された
交流信号が多少変動しても出力端子３に現われる交流信
号はある一定の周波数に固定されるという回路である。Circuit block 2 in FIG. 1 is a circuit in which even if the alternating current signal input from input terminal 1 fluctuates somewhat, the alternating current signal appearing at output terminal 3 is fixed at a certain constant frequency.
抵抗４には大きな容量値を持つ回路特性上本来接続して
おくべきコンデンサー７と、コンデンサー７より小さい
容量値を持つ試験付加用コンデンサー６が切換器５を通
して接続される。本実施例では、測定上、１μＦ以上の
コンデンサーを大容量のコンデンサー７とする。A capacitor 7 having a large capacitance value and which should be originally connected due to circuit characteristics, and a test additional capacitor 6 having a smaller capacitance value than the capacitor 7 are connected to the resistor 4 through a switch 5. In this embodiment, a capacitor of 1 μF or more is defined as a large-capacity capacitor 7 for measurement purposes.
８はコンデンサーである。第１図の回路においては、ど
の位の周波数の変動まで出力が固定されるかは、コンデ
ンサー７の値によって決まる。他のブロック測定の際に
は発振周波数の正確な発振器を使用するため、この回路
の入力信号の周波数のずれはほとんどない。したがって
、入力信号に対する出力周波数の調整範囲は狭くてよく
、切換器５は容量値の小さいコンデンサー６側に切り換
えておくことにより過渡応答による出力応答の遅れを、
コンデンサー７を接続したときよりも短くすることがで
き、測定時間の短縮が図れる。また、この回路ブロック
２の入力信号に対する出力周波数の調整範囲を測定する
ときには、切換器５をコンデンサー７側に切り換えてお
くことにより本来の特性を測定することができる。8 is a capacitor. In the circuit shown in FIG. 1, the value of the capacitor 7 determines how much frequency variation the output is fixed. When measuring other blocks, an oscillator with an accurate oscillation frequency is used, so there is almost no deviation in the frequency of the input signal to this circuit. Therefore, the adjustment range of the output frequency with respect to the input signal may be narrow, and by switching the switch 5 to the capacitor 6 side with a smaller capacitance value, the delay in output response due to transient response can be reduced.
The measurement time can be shorter than when the capacitor 7 is connected, and the measurement time can be shortened. Furthermore, when measuring the adjustment range of the output frequency for the input signal of the circuit block 2, the original characteristics can be measured by switching the switch 5 to the capacitor 7 side.
（実施例２） 第２図は本発明の実施例２を示すブロック図である。(Example 2) FIG. 2 is a block diagram showing a second embodiment of the present invention.
第２図の回路はよく使われる増幅器である。増幅器は、
演算増幅器１６と、前記演算増幅器１６の非反転入力端
子に接続された抵抗１５と、前記演算増幅器１６の反転
入力端子と入力端子９の間に接続された抵抗１０と、出
力端子１７と前記演算増幅器１６の反転入力端子の間に
接続された帰還抵抗１４で構成され、前記帰還抵抗１４
には、並列に接続された特性上必要とされる容量値を持
つコンデンサー１３と、これに並列に接続された小さい
容量値を持つコンデンサー１２と、切換器１１とを有す
る。本実施例では、測定上、１μＦ以上のコンデンサー
を大容量のコンデンサー１３とする。第２図の増幅回路
の周波数特性は、帰還抵抗１４の抵抗値と、帰還抵抗１
４に接続されたコンデンサーの容量値によって決定され
る。周波数特性に関係する試験以外では、切換器１１を
容量値の小さいコンデンサー１２側にして試験を行うこ
とによりコンデンサーの過渡応答による出力応答の遅れ
を小さくし試験時間を短縮することができる。周波数特
性に関係する試験においては、切換器１１を本来特性上
必要とされる容量値を持つ″７ンデンサー１３側に切り
換λることにより本来の特性を試験することがｉｉｙ能
となる。The circuit shown in Figure 2 is a commonly used amplifier. The amplifier is
an operational amplifier 16; a resistor 15 connected to the non-inverting input terminal of the operational amplifier 16; a resistor 10 connected between the inverting input terminal of the operational amplifier 16 and the input terminal 9; It consists of a feedback resistor 14 connected between the inverting input terminal of the amplifier 16, and the feedback resistor 14
The capacitor 13 has a capacitor 13 connected in parallel and having a capacitance value required for the characteristics, a capacitor 12 having a small capacitance value connected in parallel thereto, and a switching device 11. In this embodiment, a capacitor of 1 μF or more is defined as a large-capacity capacitor 13 for measurement purposes. The frequency characteristics of the amplifier circuit in FIG. 2 are determined by the resistance value of the feedback resistor 14 and the feedback resistor 1.
It is determined by the capacitance value of the capacitor connected to 4. For tests other than those related to frequency characteristics, by conducting the test with the switch 11 on the side of the capacitor 12 with a small capacitance value, the delay in output response due to the transient response of the capacitor can be reduced and the test time can be shortened. In tests related to frequency characteristics, it becomes possible to test the original characteristics by switching the switch 11 to the side of the capacitor 13 having the capacitance value originally required for the characteristics.
［発明の効果１
以上説明したように本発明によれ５ば、コンデン勺・−
の充放電特性を利用する回路ζ、おいても短時間（・・
の測定試験がｑ能であり、か°、）試験回路も簡１ｔな
構成のイ＼］加回路を有する回路で構成できるという効
果を治”する。[Effect of the invention 1 As explained above, according to the present invention, condensate
A circuit ζ that utilizes the charging and discharging characteristics of
The measurement test can be performed with high efficiency, and the test circuit can also be constructed with a circuit having a simple configuration and an adder circuit.
第１図は本発明の実施例１を示寸ゾ［〕ツク図、第２図
は本発明の実施例２を示すブ［ｌツク図、第：３図及び
第４図は従来例を示−イブロック図である。
１、！Ｊ・・・入力端子・ ２・・・回路ゾＤ
ツク３．１７・・・出力端子 ４．１０．１５・
・・ｉｔ抗５、 ＩＩ、 ＋９．２１．．２４・・・切
換器６．１２・・・小容量の試験用付加コンデンリ・−
２０・・・電流バッファFig. 1 is a block diagram showing Embodiment 1 of the present invention, Fig. 2 is a block diagram showing Embodiment 2 of the invention, and Figs. 3 and 4 show conventional examples. - is a block diagram. 1,! J...Input terminal 2...Circuit D
Tsuk3.17...Output terminal 4.10.15.
...it anti-5, II, +9.21. ．． 24...Switcher 6.12...Additional condenser for small capacity testing -
20...Current buffer
Claims (1)
する半導体集積回路の試験回路であって、大容量のコン
デンサーは、回路特性上本来接続すべきコンデンサーと
して用いるものであり、小容量のコンデンサーは、大容
量のコンデンサーに並列に配置され、試験時に付加する
ものであり、 切換器は、大容量のコンデンサーと小容量のコンデンサ
ーとを任意に切替えるものであることを特徴とする半導
体集積回路の試験回路。(1) A semiconductor integrated circuit test circuit that has a pair of capacitors with different capacities and a switching device, where the large capacity capacitor is used as the capacitor that should be connected due to the circuit characteristics, and the small capacity capacitor is used as the capacitor that should be connected due to the circuit characteristics. is placed in parallel with a large-capacity capacitor and added during testing, and the switch is a device that arbitrarily switches between a large-capacity capacitor and a small-capacity capacitor. Test circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2182378A JP2982236B2 (en) | 1990-07-10 | 1990-07-10 | Test circuit for semiconductor integrated circuits |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2182378A JP2982236B2 (en) | 1990-07-10 | 1990-07-10 | Test circuit for semiconductor integrated circuits |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0469581A true JPH0469581A (en) | 1992-03-04 |
| JP2982236B2 JP2982236B2 (en) | 1999-11-22 |
Family
ID=16117267
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2182378A Expired - Fee Related JP2982236B2 (en) | 1990-07-10 | 1990-07-10 | Test circuit for semiconductor integrated circuits |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2982236B2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004088365A (en) * | 2002-08-26 | 2004-03-18 | Murata Mfg Co Ltd | Dc amplifier circuit and method for measuring dc voltage of dc amplifier circuit |
| JP2004151035A (en) * | 2002-10-31 | 2004-05-27 | Sharp Corp | Inspection method and device of semiconductor device |
| US8374460B2 (en) | 2008-07-29 | 2013-02-12 | Ricoh Company, Ltd. | Image processing unit, noise reduction method, program and storage medium |
| CN107861042A (en) * | 2017-10-25 | 2018-03-30 | 北京国联万众半导体科技有限公司 | A kind of method of testing for Wide Bandgap Semiconductor Power Devices |
| JP2018060887A (en) * | 2016-10-04 | 2018-04-12 | ローム株式会社 | Semiconductor integrated circuit device and screening method thereof and operational amplifier |
-
1990
- 1990-07-10 JP JP2182378A patent/JP2982236B2/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004088365A (en) * | 2002-08-26 | 2004-03-18 | Murata Mfg Co Ltd | Dc amplifier circuit and method for measuring dc voltage of dc amplifier circuit |
| JP2004151035A (en) * | 2002-10-31 | 2004-05-27 | Sharp Corp | Inspection method and device of semiconductor device |
| US8374460B2 (en) | 2008-07-29 | 2013-02-12 | Ricoh Company, Ltd. | Image processing unit, noise reduction method, program and storage medium |
| JP2018060887A (en) * | 2016-10-04 | 2018-04-12 | ローム株式会社 | Semiconductor integrated circuit device and screening method thereof and operational amplifier |
| CN107861042A (en) * | 2017-10-25 | 2018-03-30 | 北京国联万众半导体科技有限公司 | A kind of method of testing for Wide Bandgap Semiconductor Power Devices |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2982236B2 (en) | 1999-11-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |