JPH0468484U - - Google Patents
Info
- Publication number
- JPH0468484U JPH0468484U JP11165690U JP11165690U JPH0468484U JP H0468484 U JPH0468484 U JP H0468484U JP 11165690 U JP11165690 U JP 11165690U JP 11165690 U JP11165690 U JP 11165690U JP H0468484 U JPH0468484 U JP H0468484U
- Authority
- JP
- Japan
- Prior art keywords
- output voltage
- input
- output
- error amplifier
- converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims description 3
- 230000010355 oscillation Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Dc-Dc Converters (AREA)
Description
第１図は本考案の一実施例に係るＤＣ／ＤＣコ
ンバータ装置の回路構成図、第２図は本考案のコ
ンバータ装置を用いて並列運転を行う場合の構成
例を示す図、第３図は従来のＤＣ／ＤＣコンバー
タ装置の回路構成図である。
１……入力端子、２……コンバータ、３……出
力端子、４……入力電流検出回路、５……発振回
路、６……駆動回路、７……ＰＷＭコンパレータ
、８……出力電圧誤差増幅器、８ａ……出力制御
端子、９……基準電圧、１０……出力電流バラン
ス用誤差増幅器、１０ａ……負側入力端子、１０
ｂ……負側入力端子。
Fig. 1 is a circuit configuration diagram of a DC/DC converter device according to an embodiment of the present invention, Fig. 2 is a diagram showing a configuration example when performing parallel operation using the converter device of the present invention, and Fig. 3 is a diagram showing a configuration example when performing parallel operation using the converter device of the present invention. FIG. 2 is a circuit configuration diagram of a conventional DC/DC converter device. 1... Input terminal, 2... Converter, 3... Output terminal, 4... Input current detection circuit, 5... Oscillation circuit, 6... Drive circuit, 7... PWM comparator, 8... Output voltage error amplifier , 8a...Output control terminal, 9...Reference voltage, 10...Output current balance error amplifier, 10a...Negative side input terminal, 10
b... Negative input terminal.
Claims (1)
生する入力電流検出回路と、 一定周期でクロツク信号を出力する発振回路と 前記コンバータの出力電圧と基準電圧との差分
を増幅して出力する出力電圧誤差増幅器と、 前記入力電流検出回路の出力電圧と前記出力電
圧誤差増幅器の出力電圧とを入力とするＰＷＭコ
ンパレータと、 前記発振回路から出力されたクロツク信号と前
記ＰＷＭコンパレータの出力電圧とを入力とし、
前記コンバータへ駆動信号を出力する駆動回路と 前記出力電圧誤差増幅器の出力電圧を入力とす
る第１の入力端子と外部からの入力電圧を入力と
する２つの第２の入力端子とを有し、前記出力電
圧誤差増幅器へ出力電流バランス動作用の制御信
号を出力する出力電流バランス用誤差増幅器 とを具備したことを特徴とするＤＣ／ＤＣコンバ
ータ装置。 ２ 前記出力電流バランス用誤差増幅器は、さら
に第１の入力端子に接続された外部出力端子を有
してなる請求項１記載のＤＣ／ＤＣコンバータ装
置。[Claims for Utility Model Registration] 1. A converter, an input current detection circuit that generates a voltage proportional to the input current of the converter, an oscillation circuit that outputs a clock signal at a constant cycle, and an output voltage and a reference voltage of the converter. an output voltage error amplifier that amplifies and outputs the difference between the two; a PWM comparator that receives as input the output voltage of the input current detection circuit and the output voltage of the output voltage error amplifier; and a clock signal output from the oscillation circuit. and the output voltage of the PWM comparator as input,
a drive circuit that outputs a drive signal to the converter; a first input terminal that receives the output voltage of the output voltage error amplifier; and two second input terminals that receive an external input voltage; A DC/DC converter device comprising: an output current balance error amplifier that outputs a control signal for output current balance operation to the output voltage error amplifier. 2. The DC/DC converter device according to claim 1, wherein the output current balancing error amplifier further has an external output terminal connected to the first input terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11165690U JP2534168Y2 (en) | 1990-10-26 | 1990-10-26 | DC / DC converter device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11165690U JP2534168Y2 (en) | 1990-10-26 | 1990-10-26 | DC / DC converter device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0468484U true JPH0468484U (en) | 1992-06-17 |
| JP2534168Y2 JP2534168Y2 (en) | 1997-04-30 |
Family
ID=31859126
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11165690U Expired - Lifetime JP2534168Y2 (en) | 1990-10-26 | 1990-10-26 | DC / DC converter device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2534168Y2 (en) |
-
1990
- 1990-10-26 JP JP11165690U patent/JP2534168Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP2534168Y2 (en) | 1997-04-30 |
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