JPS62117616U - - Google Patents

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Publication number
JPS62117616U
JPS62117616U JP460786U JP460786U JPS62117616U JP S62117616 U JPS62117616 U JP S62117616U JP 460786 U JP460786 U JP 460786U JP 460786 U JP460786 U JP 460786U JP S62117616 U JPS62117616 U JP S62117616U
Authority
JP
Japan
Prior art keywords
circuit
output
signal
peak value
stabilized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP460786U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP460786U priority Critical patent/JPS62117616U/ja
Publication of JPS62117616U publication Critical patent/JPS62117616U/ja
Pending legal-status Critical Current

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  • Control Of Electrical Variables (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例を示す回路のブロ
ツク図、第2図は従来の安定化交流信号を得るた
めの一実施例を示す回路のブロツク図である。図
において、3は乗算回路、4は交流出力増巾回路
、6はピーク値検出回路、8は基準直流電圧発生
回路、9は比較の為の減算回路、11は誤差増巾
回路である。なお、図中同一あるいは相当部分に
は同一符号を付して示してある。
FIG. 1 is a block diagram of a circuit showing an embodiment of this invention, and FIG. 2 is a block diagram of a circuit showing an embodiment of the conventional method for obtaining a stabilized alternating current signal. In the figure, 3 is a multiplication circuit, 4 is an AC output amplification circuit, 6 is a peak value detection circuit, 8 is a reference DC voltage generation circuit, 9 is a subtraction circuit for comparison, and 11 is an error amplification circuit. It should be noted that the same or corresponding parts in the drawings are designated by the same reference numerals.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 出力交流信号のピーク値を検出する、交流信号
ピーク値検出回路と、その出力を帰還信号として
、基準直流電圧発生回路で発生する直流電圧と比
較し、その差を積分及び増巾する誤差増巾回路と
、その出力及び本回路に入力される非安定交流信
号とを乗算、あるいは振巾変調するための回路、
及び、その出力を増巾するための交流出力増巾回
路を含み、各回路が開閉路で構成される事により
、安定化交流信号を得ることを特徴とする交流信
号安定化回路。
An AC signal peak value detection circuit that detects the peak value of the output AC signal, and an error amplification circuit that uses the output as a feedback signal to compare with the DC voltage generated by the reference DC voltage generation circuit, and integrates and amplifies the difference. A circuit for multiplying or amplitude modulating a circuit, its output, and an unstable AC signal input to the circuit;
and an AC output amplification circuit for amplifying its output, each circuit comprising an open/close circuit to obtain a stabilized AC signal.
JP460786U 1986-01-17 1986-01-17 Pending JPS62117616U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP460786U JPS62117616U (en) 1986-01-17 1986-01-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP460786U JPS62117616U (en) 1986-01-17 1986-01-17

Publications (1)

Publication Number Publication Date
JPS62117616U true JPS62117616U (en) 1987-07-25

Family

ID=30785421

Family Applications (1)

Application Number Title Priority Date Filing Date
JP460786U Pending JPS62117616U (en) 1986-01-17 1986-01-17

Country Status (1)

Country Link
JP (1) JPS62117616U (en)

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