JPH0464456B2 - - Google Patents

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Publication number
JPH0464456B2
JPH0464456B2 JP28156384A JP28156384A JPH0464456B2 JP H0464456 B2 JPH0464456 B2 JP H0464456B2 JP 28156384 A JP28156384 A JP 28156384A JP 28156384 A JP28156384 A JP 28156384A JP H0464456 B2 JPH0464456 B2 JP H0464456B2
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JP
Japan
Prior art keywords
type
layer
solution
liquid phase
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP28156384A
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Japanese (ja)
Other versions
JPS61159725A (en
Inventor
Hiroyuki Kano
Masafumi Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyota Central R&D Labs Inc
Original Assignee
Toyota Central R&D Labs Inc
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Priority to JP59281563A priority Critical patent/JPS61159725A/en
Publication of JPS61159725A publication Critical patent/JPS61159725A/en
Publication of JPH0464456B2 publication Critical patent/JPH0464456B2/ja
Granted legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02463Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/02546Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02576N-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02623Liquid deposition
    • H01L21/02625Liquid deposition using melted materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02623Liquid deposition
    • H01L21/02628Liquid deposition using solutions

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第2図は本発明の液相成長法によ
るGeドープAlyGa1-yAsの特性を示すグラフ、第
3図A,Bは本発明の液相成長の一実施例を示す
グラフアイトボートの断面図、第3図CはGa溶
液の加熱方法の一例を示すグラフ。第4図は本発
明の一実施例により成長した結晶の断面模式図、
第5図A〜Cは本発明の液相成長の他の実施例を
示すグラフアイトボートの断面図、第6図は本発
明の他の実施例により成長した結晶の断面模式
図、第7図は従来のAlGaAsのp−n接合を説明
するための結晶の断面模式図である。 図中、11……n形GaAs基板、12……n形
AlxGa1-xAs層、13……Zn拡散によりできたp
形AlxGa1-xAs層、14……p形AlyGa1-yAs層、
15……p−n接合界面、16……当初のp形層
とn形層の接合界面、30,50……グラフアイ
トボート、31,51……ふた、32,52……
スライダ、33,53……基板ホルダー、34,
54−1,54−2……Ga溶液、35,55…
…基板、36,56,57……成長したAlGaAs
層。
Figures 1 and 2 are graphs showing the characteristics of Ge-doped AlyGa 1-y As produced by the liquid phase growth method of the present invention, and Figures 3A and B are graphite graphs showing an example of the liquid phase growth method of the present invention. A cross-sectional view of the boat, and FIG. 3C is a graph showing an example of a method of heating a Ga solution. FIG. 4 is a schematic cross-sectional view of a crystal grown according to an embodiment of the present invention;
5A to 5C are cross-sectional views of graphite boats showing other embodiments of liquid phase growth of the present invention, FIG. 6 is a schematic cross-sectional view of crystals grown according to other embodiments of the present invention, and FIG. 7 is a schematic cross-sectional view of a crystal for explaining a conventional p-n junction of AlGaAs. In the figure, 11... n-type GaAs substrate, 12... n-type
AlxGa 1-x As layer, 13...P formed by Zn diffusion
Type AlxGa 1-x As layer, 14...p type AlyGa 1-y As layer,
15... p-n junction interface, 16... original p-type layer and n-type layer bonding interface, 30, 50... graphite boat, 31, 51... lid, 32, 52...
Slider, 33, 53...Substrate holder, 34,
54-1, 54-2...Ga solution, 35,55...
...substrate, 36,56,57...grown AlGaAs
layer.

Claims (1)

【特許請求の範囲】 1 pまたはn形AlyGa1-yAs(0≦y<1)層を
有する基板を、ゲルマニウム(Ge)を不純物と
して含みアルミニウム(Al)および砒素(As)
を含有するガリウム(Ga)溶液と接触させるこ
とにより、上記基板上に結晶層を液相成長させる
にあたり、 上記ガリウム溶液のAl量を適宜変化させるこ
とにより、上記基板上にp形AlyGa1-yAs(0≦y
<1)層またはn形AexGa1-xAs(0<x<1)
層(ここで、xとyとは0≦y<X<1の関係に
ある)を液相成長させることを特徴とする化合物
半導体液相成長法。 2 基板上に、p形AlyGa1-yAs(0≦y<1)層
とn形AexGa1-xAs(0<x<1)層とを継続的
に液相成長させてp−n接合を形成することを特
徴とする特許請求の範囲第1項記載の化合物半導
体液相成長法。 【特許請求の範囲】 〔産業上の利用分野〕 本発明は、半導体レーザなどに有用な、アルミ
ニウムガリウム砒素系化合物半導体の液相成長法
による製造方法に関するものである。 〔従来の技術〕 溶融ガリウム(Ga)溶液に、高温でガリウム
砒素(GaAs)、アルミニウム(Al)および不純
物を溶解させ、アルミニウムガリウム砒素
(AlGaAs)の飽和溶液を作り、この飽和Ga溶液
をGaAsまたはAlGaAs基板上に接触させ、徐冷
することによりAlGaAs結晶を成長させる化合物
半導体液相成長法においては、このGa溶液に溶
解させる不純物としてゲルマニウム(Ge)を使
用した場合、従来はp形AlGaAsしか形成できな
かつた。 化合物半導体の液相成長法において、p−n接
合を形成するには、一般にp形不純物とn形不純
物をそれぞれ添加した溶液から形成するか、また
はp形およびn形伝導性の両方を示す両性不純物
を添加して形成する方法があり、GaAsの液相成
長法では珪素(Si),Geは両性不純物であるとさ
れている。しかしながら、AlGaAsの場合にはGe
は上記のようにp形のみしか従来は形成しないと
されていた。 一方、GaAsの液相成長法では、不純物として
Siを使用することによつて、n形GaAsとp形
GaAsを成長させることができ、こうして同一不
純物によりp−n接合を形成することにより、液
相成長中や成長後の高温処理によつてもp−n接
合界面が移動しない良質のp−n接合が設計どお
り形成できた。しかし、Alが含まれるAlGaAsの
液相成長法では、不純物Siはp形、n形を示す
が、高いキヤリア濃度とならないため実際には使
用されていない。 上記の理由から、従来AlGaAsのホモp−n接
合、ヘテロp−n接合を液相成長法により形成す
るときは、n形不純物およびp形不純物を使用す
る方法によつている。この方法は第7図に示すよ
うに、n形GaAs基板11上にn形不純物Teをド
ープしたn形AlGa1-xAs層12をエピタキシヤル
成長させ、次にp形不純物Znをドープしたp形
AlyGa1-yAs層14を同じくエピタキシヤル成長
させている。しかしながら、p形AlyGa1-yAs層
14の結晶成長中に不純物Znの拡散による移動
がおきて、p−n接合面が当初の接合面16から
n形AlxGa1-xAs層12中へと移動する。移動し
た接合面15を破線で示す。このため、n形
AlxGa1-xAs層12とp形AlyGa1-yAs層14の
ヘテロ界面16とp−n接合界面15がずれてし
まう。この現象はx≠yのヘテロ接合のとき問題
で、ヘテロp−n接合を作つたつもりが、実はp
形AlxGa1-xAs層13とn形AlxGa1-xAs層12
とのホモp−n接合となるため、発光素子などと
したときキヤリアのとじ込め効果、少数キヤリア
の注入効率が減少し、発光効率が悪くなる。ま
た、トランジスタの場合では、Znをドープした
p形AlGaAsをベースとすると、n形エミツタ、
コレクタ側にZnが拡散してベース巾が広くなり、
周波数特性が低下するという問題を生ずる。 〔発明が解決しようとする問題点〕 上記において、p形およびn形不純物として同
一のGeなどの不純物を使用すると拡散係数が小
さくしかも、Al組成によりp形かn形かが変る
ためp−n接合界面の熱処理による移動がほとん
どおこらない利点を示す。 本発明は、同一不純物Geを使用して、p形
AlyGa1-yAs(0≦y<1)とn形AlxGa1-xAs
(0<x<1)のp−n接合が形成でき、しかも
形成されるp−n接合界面が液相成長中や成長後
の熱処理によつて移動しない、良質のp−n接合
を設計どおり形成することができる化合物半導体
液相成長法を提供せんとするものである。 〔問題点を解決するための手段〕 本発明者らは、従来p形AlGaAsを作るのに使
用されていたGe不純物について注目し、該不純
物の詳細なドーピング実験を行つた結果、
AlGaAsの液相成長法において、結晶成長温度、
Ga溶液中へのGeの添加量を一定にしたとき、Al
の添加量つまり成長するAlyGa1-yAsのyが増加
するにつれて、成長するAlyGa1-yAsが従来知ら
れているp形からn形に変わることを見出して本
発明を完成した。 すなわち、本発明の化合物半導体の液相成長法
は、pまたはn形AlyGa1-yAs(0≦y<1)層を
有する基板を、ゲルマニウム(Ge)を不純物と
して含みアルミニウム(Al)および砒素(As)
を含有するガリウム(Ga)溶液と接触させるこ
とにより、上記基板上に結晶層を液相成長させる
にあたり、 上記ガリウム溶液のAl量を適宜変化させるこ
とにより、上記基板上にp形AlyGa1-yAs(0≦y
<1)層またはn形AlxGa1-xAs(0<x<1)層
(ここで、xとyとは0≦y<x<1の関係にあ
る)を液相成長させることを特徴とする。 本発明の液相成長法は、GaAs基板または
AlGaAs基板上にn形AlxGa1-xAs(0<x<1)
層を形成してもよく、また基板上に形成したp形
AlyGa1-yAs(0≦y<1)層にn形AlxGa1-xAs
(0<x<1)層を形成してもよく、更にはp−
n接合が複数形成されるようにp形、n形を多段
に形成してもよい。 以下に、本発明をより具体的に説明する。 従来液相成長法でp形AlyGa1-yAsをうると
き、所定量のGaAsとAlを含有するGa溶液(溶
融液)中にGa1gにつきGeを約0.01g程度入れて
いた。本発明者らは、このGeの添加量を従来よ
りも少くした条件、例えばGa1gにつき0.005g
とか、0.002gとしたときについて、AlyGa1-yAs
をGaAs基板上にAl組成すなわちyの値を種々変
化させて、800℃の飽和温度で液相成長させたと
ころ、第1図に示すようにGeの添加量が同一で
も、Al組成yを増加させると、すなわちGa溶液
へのAlの添加量を増加させると、結晶成長する
AlyGa1-yAsが従来知られているp形から今まで
形成されていなかつたn形に変ることを見出し
た。このp,n反転のyの値は、不純物Geの添
加量の減少により減少する。第1図に示すよう
に、Ge0.002gのとき0.005gの添加量のときより
もAlAsのモル分率は小さい。また、第2図に示
すように、Ga溶液中のGe添加量を一定としたと
き、p,n反転のyの値は飽和温度の上昇により
減少する。なお、飽和温度はほぼ結晶成長温度に
等しいため成長温度と考えてもよい。 以上述べた液相成長法で、不純物としてGeを
添加したAlyGa1-yAsの成長特性から、Ga溶液中
のGeの添加量およびAlの添加量、さらにはGa溶
液の飽和温度(ほぼ成長温度に等しい)の条件を
選定することにより、同一不純物Geを添加して
n形およびp形AlyGa1-yAsを成長させることが
できる。 上記の説明からわかるように、p形AlyGa1-y
As(0≦y<1)とn形AlxGa1-xAs(0<x<
1)においてXとyとは0≦y<x<1との関係
にある。 Ga溶液へのGeの添加量は特に限定されず、従
来のGa1gに対して0.01g添加する量でもよい
が、好ましくは0.001〜0.008gの添加量でp,n
反転が顕著に認められる。第1図の結果からわか
るように、Geの添加量をn形層とp形層とで変
えることにより、AlyGa1-yAsのホモp−n接合
も可能である。 本発明によれば、p形AlyGa1-yAsとn形
AlxGa1-xAsとを継続的に液相成長させてp−n
接合を形成することができる。 〔実施例〕 以下、本発明の実施例を図面により説明する。 実施例 1 第3図Aに示すような、ふた31、Ga溶液だ
めをもつスライダー32および基板ホルダ33か
らなるグラフアイトボート30に、GaAs基板3
5およびGa1g、GaAs0.018g、Al0.0026g、
Ge0.002gからなる原料を入れ、H2ガス雰囲気中
で第3図Cに示す如き温度プログラムで、まず
T1=830℃まで昇温して原料をGaに溶解させた
Ga溶液34を作り、次にT2=800℃まで降温さ
せて、飽和Ga溶液とする。しかるのち、この800
℃からΔT=0.3℃/分の速度で徐冷を開始して、
数℃降温したところでスライダ32を操作して、
第3図Bに示すようにGa溶液34をGaAs基板3
5上に接触させると、過飽和のAlyGa1-yAs(y
=0.7)層36が基板35上に成長する。このよ
うにして、適当な厚さ(3〜5μm)に層36を成
長させた後、例えば第3図Aの配置にもどすこと
によつてGa溶液をスライダ34により取除き、
冷却して、基板35を取出す。 こうしてできた結晶は、第4図に示すように、
GaAs基板35上にエピタキシヤル成長したn形
(n=1.5×1017cm-3)のAlyGa1-yAs(y=0.7)層
36を有するものである。本例において、基板3
5はGaAsに限らずp形AlyGa1-yAs(0<y<
1)でもよい。 実施例 2 第5図は、本発明の他の実施例を示す図で、ふ
た51,Ga溶液だめをもつスライダー52およ
び基板ホルダ53からなるグラフアイトボート5
0に、p形GaAs基板55、Ga溶液54−1(Ga1
g,GaAs0.037g,Al0.00048g,Ge0.002gを入
れたもの)、Ga溶液54−2(Ga1g,GaAs0.0018
g,Al0.0026g,Ge0.002gを入れたもの)を第
3図Cの温度プログラムによつて、まずH2中で
T1=830℃まで昇温させて原料をGaに溶解させ
たGa溶液54−1および54−2を作る。次に温度
をT2=800℃まで降温させて、飽和Ga溶液とす
る。しかるのち、800℃からΔT=0.3℃/分の速
度で徐冷を開始して、数℃降温したところで、ス
ライダー52を操作して、Ga溶液54−1をまず
p形GaAs基板55上に第5図Bに示すようにし
て接触させると、過飽和のAlyGa1-yAs(y=0.2)
層56が基板55上に成長する。次に、適当な厚
さ(例えば数μm)に層56が成長した後、スラ
イダー52を操作してGa溶液を54−2を前記
AlyGa1-yAs層56第5図Cのように接触させる
と、過飽和のAlxGa1-xAs(x=0.7)層57が前
記層56上に成長する。層57が成長した後、
Ga溶液54−2を層56上から、スライダー52
の操作により取除き、冷却したのち基板55を取
出す。 このようにしてできた結晶は第6図に示すよう
に、p形GaAs基板55上にエピタキシヤル成長
したp形(p=3×1017cm-3)のAlyGa1-yAs(y
=0.2)層56とn形(n=1.5×1017cm-3)の
AlxGa1-xAs(x=0.7)層57のヘテロp−n接
合58を有する層を形成する。 上記で得られた結晶は、電子顕微鏡の測定によ
ると、ヘテロ界面とp−n接合界面はよく一致し
ていた。 以上2層を結晶成長したものの例を示したが、
同様にしてもつと多層の成長も可能である。 〔効果〕 本発明では1種類の不純物Geを添加すること
により、p形およびn形のAlGaAs結晶を液相形
成法により形成できることにより、n形の
AlxGa1-xAsとp形のAlyGa1-yAsのヘテロ接合
とp−n接合界面が一致した設計どおりのヘテロ
p−n接合を形成することができる。このこと
は、AlGaAs/GaAs,AlGaAs/AlGaAsなどの
組合せでヘテロp−n接合を有する半導体レー
ザ、発光ダイオード、発光素子およびトランジス
タとしても、結晶成長中および成長後の高温処理
でもp−n接合位置とヘテロ接合位置が変化しな
いため、高効率の少数キヤリア注入、高効率のキ
ヤリアとじ込めができ、発光素子の場合では発光
効率の高効率化、発光素子では暗電流の低下、ト
ランジスタでは高増巾率および高周波化をはかる
ことができる。 例えば、第7図に示す従来例のものでは、ヘテ
ロ接合の位置とp−n接合の位置がずれたダイオ
ードが形成される。そのためヘテロp−n接合に
より例えば電子のp形層への注入効率をあげると
ころが、従来例ではホモ接合になつてしまつてい
るため、注入効率の改善がなされず、発光ダイオ
ードとしたとき発光効率があがらない。 上記に対し、第6図に示す本発明によるヘテロ
p−n接合では、ヘテロ接合界面とp−n接合界
面が一致しているため、設計どおり少数キヤリア
の注入効率をあげることができ、発光ダイオード
としたとき発光効率を向上させることができる。 上記したとおり、本発明では1種類の不純物
Geを用いることにより、p−n接合が得られ、
しかもこのp−n接合が安定しているため、上記
の種々の優れた効果を奏する。
[Claims] 1. A substrate having a p- or n-type Al y Ga 1-y As (0≦y<1) layer containing germanium (Ge) as an impurity and containing aluminum (Al) and arsenic (As).
In liquid phase growth of a crystal layer on the substrate by contacting with a gallium (Ga) solution containing p-type Al y Ga 1 on the substrate, by appropriately changing the amount of Al in the gallium solution. -y As(0≦y
<1) layer or n-type Ae x Ga 1-x As (0<x<1)
A compound semiconductor liquid phase growth method characterized by growing a layer (where x and y have a relationship of 0≦y<X<1) in a liquid phase. 2. On the substrate, a p-type Al y Ga 1-y As (0≦y<1) layer and an n-type Ae x Ga 1-x As (0<x<1) layer are continuously grown in liquid phase. The compound semiconductor liquid phase growth method according to claim 1, characterized in that a pn junction is formed. [Scope of Claims] [Industrial Application Field] The present invention relates to a method for producing an aluminum gallium arsenide compound semiconductor, which is useful for semiconductor lasers and the like, by a liquid phase growth method. [Prior art] Gallium arsenide (GaAs), aluminum (Al), and impurities are dissolved in a molten gallium (Ga) solution at high temperature to create a saturated solution of aluminum gallium arsenide (AlGaAs), and this saturated Ga solution is used to dissolve GaAs or In the compound semiconductor liquid phase epitaxy method, in which AlGaAs crystals are grown by contacting the AlGaAs substrate with slow cooling, conventionally only p-type AlGaAs was formed when germanium (Ge) was used as an impurity dissolved in the Ga solution. I couldn't do it. In the liquid phase growth method of compound semiconductors, to form a p-n junction, it is generally formed from a solution to which p-type impurities and n-type impurities are added, or an amphoteric material that exhibits both p-type and n-type conductivity is used. There is a method of forming it by adding impurities, and silicon (Si) and Ge are considered to be amphoteric impurities in the GaAs liquid phase growth method. However, in the case of AlGaAs, Ge
As mentioned above, it was conventionally thought that only p-type was formed. On the other hand, in the liquid phase growth method of GaAs, as an impurity
By using Si, n-type GaAs and p-type
By growing GaAs and forming a p-n junction with the same impurities, a high-quality p-n junction is created in which the p-n junction interface does not move even during liquid phase growth or during high-temperature treatment after growth. was formed as designed. However, in the liquid phase growth method of AlGaAs containing Al, the impurity Si exhibits p-type and n-type, but it is not actually used because it does not result in a high carrier concentration. For the above reasons, conventional AlGaAs homo p-n junctions and hetero p-n junctions are formed by liquid phase growth using a method using n-type impurities and p-type impurities. As shown in FIG. 7, this method involves epitaxially growing an n-type AlGa 1-x As layer 12 doped with n-type impurity Te on an n-type GaAs substrate 11, and then growing a p-type AlGa 1-x As layer 12 doped with p-type impurity Zn on an n-type GaAs substrate 11. shape
The AlyGa 1-y As layer 14 is also epitaxially grown. However, during the crystal growth of the p-type AlxGa 1-y As layer 14, impurity Zn moves due to diffusion, and the p-n junction surface moves from the original junction surface 16 into the n-type AlxGa 1-x As layer 12. Moving. The moved joint surface 15 is shown by a broken line. For this reason, n-type
The hetero interface 16 between the AlxGa 1-x As layer 12 and the p-type AlyGa 1-y As layer 14 and the pn junction interface 15 are misaligned. This phenomenon is a problem when you have a heterojunction where x≠y, and you thought you were creating a heteropn junction, but in reality it is p
Type AlxGa 1-x As layer 13 and n-type AlxGa 1-x As layer 12
Since it becomes a homo p-n junction with , the carrier confinement effect and minority carrier injection efficiency decrease when used as a light emitting device, resulting in poor luminous efficiency. In the case of transistors, if Zn-doped p-type AlGaAs is used as the base, n-type emitter,
Zn is diffused to the collector side and the base width becomes wider.
A problem arises in that the frequency characteristics deteriorate. [Problems to be solved by the invention] In the above, if the same impurity such as Ge is used as the p-type and n-type impurities, the diffusion coefficient will be small, and since the p-type or n-type changes depending on the Al composition, the p-n This shows the advantage that there is almost no movement of the bonding interface due to heat treatment. The present invention uses the same impurity Ge to produce p-type
AlyGa 1-y As (0≦y<1) and n-type AlxGa 1-x As
A high-quality p-n junction can be formed as designed, in which a p-n junction (0 < x < 1) can be formed, and the formed p-n junction interface does not move during liquid phase growth or during post-growth heat treatment. The object of the present invention is to provide a liquid phase growth method for forming compound semiconductors. [Means for solving the problem] The present inventors focused on the Ge impurity conventionally used to make p-type AlGaAs, and as a result of conducting detailed doping experiments with the impurity,
In the liquid phase growth method of AlGaAs, the crystal growth temperature,
When the amount of Ge added to the Ga solution is kept constant, Al
The present invention was completed by discovering that as the amount of added AlyGa 1-y As, that is, y of the growing AlyGa 1-y As increases, the growing AlyGa 1-y As changes from the conventionally known p-type to n-type. That is, in the liquid phase growth method of compound semiconductors of the present invention, a substrate having a p- or n-type Al y Ga 1-y As (0≦y<1) layer is grown using aluminum (Al) containing germanium (Ge) as an impurity. and arsenic (As)
In liquid phase growth of a crystal layer on the substrate by contacting with a gallium (Ga) solution containing p-type Al y Ga 1 on the substrate, by appropriately changing the amount of Al in the gallium solution. -y As(0≦y
<1) layer or n-type Al Features. The liquid phase growth method of the present invention uses a GaAs substrate or
n-type AlxGa 1-x As (0<x<1) on AlGaAs substrate
A p-type layer may also be formed on the substrate.
AlyGa 1-y As (0≦y<1) layer with n-type AlxGa 1-x As
(0<x<1) layer may be formed, and further p-
P-type and n-type may be formed in multiple stages so that a plurality of n-junctions are formed. The present invention will be explained in more detail below. Conventionally, when p-type AlyGa 1-y As was obtained using a liquid phase growth method, about 0.01 g of Ge was added to 1 g of Ga in a Ga solution (molten liquid) containing a predetermined amount of GaAs and Al. The present inventors developed conditions in which the amount of Ge added was smaller than before, for example, 0.005 g per 1 g of Ga.
Or, when it is 0.002g, AlyGa 1-y As
was grown on a GaAs substrate in a liquid phase at a saturation temperature of 800°C with various Al compositions, that is, the value of y. As shown in Figure 1, even with the same amount of Ge added, the Al composition y increased. In other words, when the amount of Al added to the Ga solution is increased, crystal growth occurs.
We found that AlyGa 1-y As changes from the conventionally known p-type to the n-type, which has not been formed until now. The value of y of this p, n inversion decreases as the amount of impurity Ge added decreases. As shown in FIG. 1, when Ge is 0.002 g, the mole fraction of AlAs is smaller than when the amount added is 0.005 g. Furthermore, as shown in FIG. 2, when the amount of Ge added to the Ga solution is kept constant, the value of y for p, n inversion decreases as the saturation temperature increases. Note that since the saturation temperature is approximately equal to the crystal growth temperature, it may be considered as the growth temperature. In the liquid phase growth method described above, from the growth characteristics of AlyGa 1-y As with Ge added as an impurity, it is possible to determine the amount of Ge added and the amount of Al added in the Ga solution, as well as the saturation temperature of the Ga solution (approximately the growth temperature). By selecting the conditions (equal to ), it is possible to grow n-type and p-type AlyGa 1-y As by adding the same impurity Ge. As can be seen from the above explanation, p-type AlyGa 1-y
As (0≦y<1) and n-type AlxGa 1-x As (0<x<
In 1), X and y have a relationship of 0≦y<x<1. The amount of Ge added to the Ga solution is not particularly limited, and may be added in an amount of 0.01g per 1g of conventional Ga, but preferably in the amount of 0.001 to 0.008g, p, n
Reversal is clearly observed. As can be seen from the results in FIG. 1, by changing the amount of Ge added between the n-type layer and the p-type layer, a homopn junction of AlyGa 1-y As is also possible. According to the present invention, p-type AlyGa 1-y As and n-type
By continuous liquid phase growth of AlxGa 1-x As, p-n
A bond can be formed. [Example] Hereinafter, an example of the present invention will be described with reference to the drawings. Example 1 A GaAs substrate 3 is placed in a graphite boat 30 consisting of a lid 31, a slider 32 with a Ga solution reservoir, and a substrate holder 33 as shown in FIG. 3A.
5 and Ga1g, GaAs0.018g, Al0.0026g,
First, a raw material consisting of 0.002 g of Ge was introduced and heated under a temperature program as shown in Figure 3C in an H 2 gas atmosphere.
The temperature was raised to T 1 = 830℃ to dissolve the raw material in Ga.
A Ga solution 34 is prepared, and then the temperature is lowered to T 2 =800° C. to obtain a saturated Ga solution. Afterwards, this 800
Start slow cooling from ℃ at a rate of ΔT = 0.3℃/min,
When the temperature has dropped a few degrees Celsius, operate the slider 32 to
As shown in FIG. 3B, the Ga solution 34 is applied to the GaAs substrate 3.
5, supersaturated AlyGa 1-y As (y
=0.7) layer 36 is grown on substrate 35. After growing the layer 36 to a suitable thickness (3 to 5 μm) in this manner, the Ga solution is removed by the slider 34, for example by returning to the arrangement shown in FIG.
After cooling, the substrate 35 is taken out. The crystals thus formed are as shown in Figure 4.
It has an n-type (n=1.5×10 17 cm −3 ) AlyGa 1-y As (y=0.7) layer 36 epitaxially grown on a GaAs substrate 35 . In this example, the substrate 3
5 is not limited to GaAs but p-type AlyGa 1-y As (0<y<
1) is also acceptable. Embodiment 2 FIG. 5 is a diagram showing another embodiment of the present invention, in which a graphite boat 5 consisting of a lid 51, a slider 52 with a Ga solution reservoir, and a substrate holder 53 is shown.
0, p-type GaAs substrate 55, Ga solution 54-1 (Ga1
g, GaAs0.037g, Al0.00048g, Ge0.002g), Ga solution 54-2 (Ga1g, GaAs0.0018g)
g, Al0.0026g, Ge0.002g) was first heated in H2 according to the temperature program shown in Figure 3C.
Ga solutions 54-1 and 54-2 are prepared by raising the temperature to T 1 =830° C. and dissolving the raw material in Ga. Next, the temperature is lowered to T 2 =800°C to form a saturated Ga solution. After that, slow cooling is started from 800°C at a rate of ΔT = 0.3°C/min, and when the temperature has dropped by several degrees, the slider 52 is operated to first deposit the Ga solution 54-1 onto the p-type GaAs substrate 55. When contacted as shown in Figure 5B, supersaturated AlyGa 1-y As (y=0.2)
A layer 56 is grown on substrate 55. Next, after the layer 56 has grown to an appropriate thickness (for example, several μm), the slider 52 is operated to apply the Ga solution 54-2 to the
When AlyGa 1-y As layer 56 is contacted as shown in FIG. 5C, a supersaturated AlxGa 1-x As (x=0.7) layer 57 grows on said layer 56. After layer 57 has grown,
Apply the Ga solution 54-2 from above the layer 56 to the slider 52.
After cooling, the substrate 55 is removed. As shown in FIG. 6, the crystal thus formed is a p-type (p=3×10 17 cm -3 ) AlyGa 1-y As (y
= 0.2) layer 56 and n-type (n = 1.5×10 17 cm -3 )
A layer having a hetero pn junction 58 of an AlxGa 1-x As (x=0.7) layer 57 is formed. In the crystal obtained above, according to measurement using an electron microscope, the hetero interface and the pn junction interface were in good agreement. The above is an example of two layers grown as crystals, but
It is also possible to grow multiple layers in the same way. [Effect] In the present invention, by adding one type of impurity Ge, p-type and n-type AlGaAs crystals can be formed by a liquid phase formation method.
It is possible to form a heterojunction between AlxGa 1-x As and p-type AlyGa 1-yAs and a designed heterojunction in which the pn junction interface matches. This means that even in semiconductor lasers, light-emitting diodes, light-emitting devices, and transistors that have hetero p-n junctions using combinations such as AlGaAs/GaAs and AlGaAs/AlGaAs, the p-n junction position can be maintained even during and after crystal growth during high-temperature treatment. Since the position of the heterojunction does not change, highly efficient minority carrier injection and highly efficient carrier confinement are possible, resulting in higher luminous efficiency in light emitting devices, lower dark current in light emitting devices, and higher amplification in transistors. rate and frequency can be increased. For example, in the conventional example shown in FIG. 7, a diode is formed in which the position of the heterojunction and the position of the pn junction are shifted. For this reason, the injection efficiency of electrons into the p-type layer is increased by a hetero p-n junction, but in the conventional example, it becomes a homojunction, so the injection efficiency cannot be improved and the luminous efficiency decreases when used as a light emitting diode. It doesn't rise. In contrast to the above, in the hetero p-n junction according to the present invention shown in FIG. 6, since the hetero junction interface and the p-n junction interface coincide, the injection efficiency of minority carriers can be increased as designed, and the light emitting diode When this is done, luminous efficiency can be improved. As mentioned above, in the present invention, one type of impurity
By using Ge, a p-n junction can be obtained,
Furthermore, since this pn junction is stable, the various excellent effects described above are achieved.
JP59281563A 1984-12-29 1984-12-29 Liquid phase growth method of compound semiconductor Granted JPS61159725A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59281563A JPS61159725A (en) 1984-12-29 1984-12-29 Liquid phase growth method of compound semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59281563A JPS61159725A (en) 1984-12-29 1984-12-29 Liquid phase growth method of compound semiconductor

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JPS61159725A JPS61159725A (en) 1986-07-19
JPH0464456B2 true JPH0464456B2 (en) 1992-10-15

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4911467A (en) * 1972-05-30 1974-01-31
JPS5325633A (en) * 1976-08-21 1978-03-09 Sumitomo Metal Ind Granulation method of melted blast furnace slag
JPS5531610A (en) * 1978-08-28 1980-03-06 Nissan Motor Co Ltd Structure of bumper
JPS5797665A (en) * 1980-12-10 1982-06-17 Oki Electric Ind Co Ltd Manufacture of npn transistor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4911467A (en) * 1972-05-30 1974-01-31
JPS5325633A (en) * 1976-08-21 1978-03-09 Sumitomo Metal Ind Granulation method of melted blast furnace slag
JPS5531610A (en) * 1978-08-28 1980-03-06 Nissan Motor Co Ltd Structure of bumper
JPS5797665A (en) * 1980-12-10 1982-06-17 Oki Electric Ind Co Ltd Manufacture of npn transistor

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Publication number Publication date
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