JPH0457108B2 - - Google Patents
Info
- Publication number
- JPH0457108B2 JPH0457108B2 JP59247608A JP24760884A JPH0457108B2 JP H0457108 B2 JPH0457108 B2 JP H0457108B2 JP 59247608 A JP59247608 A JP 59247608A JP 24760884 A JP24760884 A JP 24760884A JP H0457108 B2 JPH0457108 B2 JP H0457108B2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- film
- layer
- chips
- contact film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 abstract description 3
- 238000003475 lamination Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 25
- 235000012431 wafers Nutrition 0.000 description 6
- 230000000694 effects Effects 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000008602 contraction Effects 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/2405—Shape
- H01L2224/24051—Conformal with the semiconductor or solid-state device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59247608A JPS61129835A (ja) | 1984-11-22 | 1984-11-22 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59247608A JPS61129835A (ja) | 1984-11-22 | 1984-11-22 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61129835A JPS61129835A (ja) | 1986-06-17 |
JPH0457108B2 true JPH0457108B2 (pl) | 1992-09-10 |
Family
ID=17166034
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59247608A Granted JPS61129835A (ja) | 1984-11-22 | 1984-11-22 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61129835A (pl) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2817553B2 (ja) * | 1992-10-30 | 1998-10-30 | 日本電気株式会社 | 半導体パッケージ構造及びその製造方法 |
DE102010039824B4 (de) * | 2010-08-26 | 2018-03-29 | Semikron Elektronik Gmbh & Co. Kg | Leistungsbaugruppe mit einer flexiblen Verbindungseinrichtung |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5146874A (en) * | 1974-10-18 | 1976-04-21 | Mitsubishi Electric Corp | Handotaisochino seizohoho |
JPS5734777U (pl) * | 1980-07-31 | 1982-02-24 | ||
JPS5734777A (en) * | 1980-08-08 | 1982-02-25 | Mitsubishi Electric Corp | Inverter device |
JPS59205747A (ja) * | 1983-05-09 | 1984-11-21 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
-
1984
- 1984-11-22 JP JP59247608A patent/JPS61129835A/ja active Granted
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5146874A (en) * | 1974-10-18 | 1976-04-21 | Mitsubishi Electric Corp | Handotaisochino seizohoho |
JPS5734777U (pl) * | 1980-07-31 | 1982-02-24 | ||
JPS5734777A (en) * | 1980-08-08 | 1982-02-25 | Mitsubishi Electric Corp | Inverter device |
JPS59205747A (ja) * | 1983-05-09 | 1984-11-21 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
JPS61129835A (ja) | 1986-06-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |