JPH045640U - - Google Patents
Info
- Publication number
- JPH045640U JPH045640U JP1990045235U JP4523590U JPH045640U JP H045640 U JPH045640 U JP H045640U JP 1990045235 U JP1990045235 U JP 1990045235U JP 4523590 U JP4523590 U JP 4523590U JP H045640 U JPH045640 U JP H045640U
- Authority
- JP
- Japan
- Prior art keywords
- wire bonding
- metal plate
- showing
- semiconductor device
- view
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims 1
- 239000000919 ceramic Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 238000005219 brazing Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990045235U JPH045640U (US06815460-20041109-C00097.png) | 1990-04-27 | 1990-04-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990045235U JPH045640U (US06815460-20041109-C00097.png) | 1990-04-27 | 1990-04-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH045640U true JPH045640U (US06815460-20041109-C00097.png) | 1992-01-20 |
Family
ID=31559228
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990045235U Pending JPH045640U (US06815460-20041109-C00097.png) | 1990-04-27 | 1990-04-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH045640U (US06815460-20041109-C00097.png) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008244399A (ja) * | 2007-03-29 | 2008-10-09 | Nichia Corp | 発光装置 |
-
1990
- 1990-04-27 JP JP1990045235U patent/JPH045640U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008244399A (ja) * | 2007-03-29 | 2008-10-09 | Nichia Corp | 発光装置 |
