JPH0456353A - Semiconductor memory device - Google Patents

Abstract

PURPOSE:To prevent generation of ununiformity of grain size in a capacitor for memory cell by providing word lines arranged bypassing memory cell regions and not passing on the adjacent memory cells. CONSTITUTION:Since word lines 6 indicated by oblique lines are provided bypassing racket type field active regions 9 which are manufactured by diffusing impurity such as arsenic, etc., into a substrate, these are arranged as the gates of transistors 4 for selecting cells and thereaftrer these are bent and arranged in a constant angle. Accordingly, the capacitor electrode covering the active region in the substrate for cell is all oxidized and uniformity of grain size can be ensured, without allowing generation of an event that only the lower part of word line 6 is not oxidized during the heat processing in the post- processing and the grain size is kept unchanged, while the other part is oxidized and grains grow. Therefore, stress applied on an insulated oxide film for capacitor is perfectly equalized in anywhere on the capacitor and high reliability can be reserved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a dynamic semiconductor memory device that requires periodic rewriting of information.

2. Description of the Related Art] FIG. 2 is a plan view showing a random access memory having a structure called a special Niflenar type memory cell in a dynamic semiconductor memory device, and FIG.
4 is an enlarged view of section B shown in FIG. 3. In the figure, (1) is the substrate, (2) is the diffusion region,
(3) is an oxide film, (4) is a selection transistor, (5
) is a cell plate, (6) Howard line, (7) habit line, (8) is polysilicon for cell plate (5), (
9) is a field active region, and (10) is a grain. After forming a diffusion region (2) in which an impurity such as hisso is implanted in the P5 semiconductor substrate (1), and further depositing an oxide film (3) which is an insulating film for a capacitor, a cell selection transistor (4) is formed. Polysilicon (8
), etc., and then deposit a gate oxide film for the transistor (4) to form the gate of the cell selection transistor (4). It was placed in

As shown in the figure, a rice scoop-shaped substrate in which part 0 is a semiconductor (1)
It is chemically deposited through an insulating film made of oxide film (3) or nitride film so as to completely cover the diffusion region (2), which is the impurity diffusion region (2) formed inside and stores memory information. One memory cell is constituted by an electrode for a cell plate (5) made of polysilicon (8).

Next, the operation will be explained.

As mentioned above, the impurity diffusion region (2) is the node that stores electrical information, the polysilicon (8) chisel electrode is fixed at a constant potential, and the oxide film (3) and nitride film keep the two together. It is insulated and acts as a capacitor.

One memory cell is selected by the gate of a transistor (4) made of polysilicon (8) called word M (61), and the charge stored in the cell is transferred to a high melting point called bit line (7). The data is read out to a wiring layer made of metal silicide or the like.

As shown in the figure, word lines (6) and bit lines (7) are generally arranged so as to be perpendicular to each other.

As can be seen from the figure, the word line (6) is arranged so as to cross directly above the adjacent memory cell capacitor region in a straight line.

[Problem to be solved by the invention]

Since the conventional semiconductor memory device is constructed as described above, a word line for selecting an adjacent cell runs above the cell plate, as shown in section B shown in FIG.

For this reason, the polysilicon that is the cell plate below this word line is further oxidized in areas other than the word line due to the heat treatment after the word line polysilicon debo and the impurity implantation of the transistor source and drain diffusion layers. 4th
As shown in the figure, even though the grains grow and become larger, they remain at their original small grain size.At this time, the stress generated in the polysilicon film of the cell plate is It is conceivable that an imbalance will occur at the boundary, resulting in l', EJ.

If an imbalance occurs, the stress on the extremely thin oxide film used to insulate the capacitor will also become unbalanced.
It's easy to think of.

If there is an imbalance in the stress applied to the oxide film as described above, it is thought that the reliability of the insulating oxide film will be greatly affected.

For example, there have been problems in that it can become a factor that accelerates bit defects that occur during continuous use of a product, and can even become a factor that determines the lifespan of the product.

The purpose of this invention was to solve the above-mentioned problems.The purpose of this invention was to make the grain size of the polysilicon that is the cell plate uniform, and to uniformize the stress applied to the oxide film, thereby creating a highly reliable semiconductor memory. The purpose is to obtain equipment.

[Means to solve the problem]

In the semiconductor memory device according to the present invention, the conventional word line arrangement is changed, and the word line arrangement is such that the word line bypasses the memory cell area and does not pass over the adjacent memory cell. Prevent imbalances from occurring.

[Operation] The semiconductor memory device according to the present invention is arranged so that the word line does not pass over the capacitor electrode for the memory cell, so that only the portion under the conventional p word line is subjected to subsequent processing. During the heat treatment, all the capacitor electrodes covering the active area in the substrate for the cell are oxidized, without being oxidized and maintaining the same grain size, and without causing the rate of oxidation and grain growth in other parts. Align to the same grain size.

Therefore, the stress applied to the insulating oxide film for the capacitor is completely uniform everywhere on the capacitor, and high reliability can be ensured.

[Example] An embodiment of the present invention will be described below.

In FIG. 1, (4), (6) to (9) are the same as those shown in the conventional example of FIG. 2, and therefore their explanations will be omitted.

Next, the operation will be explained. Word line (6) shown with diagonal lines
is placed as the gate of the cell selection transistor (4) in order to bypass the rice scoop-shaped field active region (9) created by implanting impurities such as Hin into the substrate, and then bent at a certain angle. and placed.

The manufacturing method is the same as that shown in the conventional example shown in FIG. 2, and the same steps may be used.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to obtain a semiconductor memory device whose reliability is significantly improved compared to conventional semiconductor memory devices without adding any process.

[Brief explanation of drawings]

FIG. 1 shows lSl! of a memory cell portion of a semiconductor memory device which is an embodiment of the present invention. 2 is a plan view showing the arrangement of the memory cell portion of a conventional semiconductor memory device, FIG. 3 is a cross-sectional view taken along line A-A shown in FIG. 2, and FIG. It is an enlarged view of part B shown. In the figure, (4) is a function block, (6) is a word line, (7) is a bit line, (8) is polysilicon, and (9) is a field active region. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Agent Dai Iwa Masu Yutan 2 Figure 1 Field j Ancient P Rainbow 41! Figure 3 and Figure 4 grains on the soil

Claims (1)

[Claims] In a dynamic semiconductor memory device that requires periodic rewriting of information, a conductive wiring layer, which is the transistor gate for cell selection, is arranged so as to bypass the capacitor region created in the substrate that becomes the cell. A semiconductor memory device characterized by: