JPH0451859B2 - - Google Patents
Info
- Publication number
- JPH0451859B2 JPH0451859B2 JP62285651A JP28565187A JPH0451859B2 JP H0451859 B2 JPH0451859 B2 JP H0451859B2 JP 62285651 A JP62285651 A JP 62285651A JP 28565187 A JP28565187 A JP 28565187A JP H0451859 B2 JPH0451859 B2 JP H0451859B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- bit
- bus
- main processor
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Hardware Redundancy (AREA)
- Bus Control (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP86430056A EP0273081B1 (en) | 1986-12-30 | 1986-12-30 | Improved duplicated circuit arrangement for fast transmission and repairability |
| EP86430056.1 | 1986-12-30 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63168737A JPS63168737A (ja) | 1988-07-12 |
| JPH0451859B2 true JPH0451859B2 (enExample) | 1992-08-20 |
Family
ID=8196416
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62285651A Granted JPS63168737A (ja) | 1986-12-30 | 1987-11-13 | 複式回路配列体 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4856000A (enExample) |
| EP (1) | EP0273081B1 (enExample) |
| JP (1) | JPS63168737A (enExample) |
| DE (1) | DE3688139T2 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0444774A3 (en) * | 1990-01-29 | 1991-09-11 | Raytheon Company | Method and apparatus for driving a digital bus |
| US5263034A (en) * | 1990-10-09 | 1993-11-16 | Bull Information Systems Inc. | Error detection in the basic processing unit of a VLSI central processor |
| GB2251099B (en) * | 1990-12-19 | 1994-08-03 | Motorola Inc | Bus system |
| US5422837A (en) * | 1993-12-14 | 1995-06-06 | Bull Hn Information Systems Inc. | Apparatus for detecting differences between double precision results produced by dual processing units operating in parallel |
| JP6710142B2 (ja) * | 2016-10-26 | 2020-06-17 | 株式会社日立製作所 | 制御システム |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3395396A (en) * | 1965-11-23 | 1968-07-30 | Bell Telephone Labor Inc | Information-dependent signal shifting for data processing systems |
| CA947694A (en) * | 1970-11-13 | 1974-05-21 | Xerox Corporation | Male electroforming mandrel |
| GB1317714A (en) * | 1971-01-28 | 1973-05-23 | Ibm | Data handling systems |
| GB1380983A (en) * | 1971-05-12 | 1975-01-22 | Siemens Ag | Data processing systems |
| US4099234A (en) * | 1976-11-15 | 1978-07-04 | Honeywell Information Systems Inc. | Input/output processing system utilizing locked processors |
| FR2371734A1 (fr) * | 1976-11-23 | 1978-06-16 | Matra | Systeme numerique de traitement de donnees, notamment pour vaisseau spatial |
| US4071890A (en) * | 1976-11-29 | 1978-01-31 | Data General Corporation | CPU-Synchronous parallel data processor apparatus |
| US4270167A (en) * | 1978-06-30 | 1981-05-26 | Intel Corporation | Apparatus and method for cooperative and concurrent coprocessing of digital information |
| US4351025A (en) * | 1979-07-06 | 1982-09-21 | Hall Jr William B | Parallel digital computer architecture |
| CH651950A5 (de) * | 1980-10-20 | 1985-10-15 | Inventio Ag | Multiprozessoranordnung. |
| JPS57168319A (en) * | 1981-04-09 | 1982-10-16 | Fujitsu Ltd | Parallel output buffer circuit |
| US4453215A (en) * | 1981-10-01 | 1984-06-05 | Stratus Computer, Inc. | Central processing apparatus for fault-tolerant computing |
| JPS5945558A (ja) * | 1982-09-07 | 1984-03-14 | Mitsubishi Electric Corp | 2重系デ−タ処理装置 |
| DE3334792A1 (de) * | 1983-09-26 | 1984-11-08 | Siemens AG, 1000 Berlin und 8000 München | Zentralsteuereinheit eines vermittlungssystems insbesondere fernsprech-vermittlungssystems |
-
1986
- 1986-12-30 EP EP86430056A patent/EP0273081B1/en not_active Expired - Lifetime
- 1986-12-30 DE DE86430056T patent/DE3688139T2/de not_active Expired - Fee Related
-
1987
- 1987-09-08 US US07/096,569 patent/US4856000A/en not_active Expired - Fee Related
- 1987-11-13 JP JP62285651A patent/JPS63168737A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63168737A (ja) | 1988-07-12 |
| DE3688139T2 (de) | 1993-10-07 |
| EP0273081A1 (en) | 1988-07-06 |
| DE3688139D1 (de) | 1993-04-29 |
| EP0273081B1 (en) | 1993-03-24 |
| US4856000A (en) | 1989-08-08 |
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