JPH0448649A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To increase a capacity of a capacitor, by growing in succession a conductive film of a second layer and a silicon nitride film through covering the pattern of a conductive film of a first layer with them, and by growing a conductive film for forming an opposed electrode after oxidizing slightly the surface of the silicon nitride film, and by forming the capacitor through patterning simultaneously the conductive film for forming an opposed electrode, the silicon nitride film, and the conductive film of a second layer. CONSTITUTION:A polysilicon film is grown. By patterning this film, the pattern of a conductive film 16A of the first layer of an accumulation electrode and a bit line 19 are formed. Then, on the whole surface of a substrate, as a conductive film 16B of the second layer of the accumulation electrode, a polysilicon film doped with phosphorus is grown, and a silicon nitride (Si3N4) film 17 is grown insuccession, keeping a vacuum state. Then, by a thermal oxidation, SiO2 is formed on the surface of the Si3N4 film 17, and a dielectric film of the two-layer structure of SiO2/Si3N4 is formed. On the whole surface of the substrate, a polysilicon film 18 for forming an opposed electrode is grown, and phosphorus is doped therein. Then, a resist film 21 applied to a capacitor region is formed as an etching mask. Then, the capacitor is formed, patterning simultaneously the polysilicon film 18, the dielectric film 17, and the conductive film 16B of the second layer of the accumulation electrode by using the resist film 21 as a mask.

Description

[Detailed Description of the Invention] [Summary] DI? AM (Dynamic Random Access Memory)
The present invention relates to a method for manufacturing a capacitor for a memory cell.

The aim is to increase capacity and reduce soft errors while maintaining the current simple stack structure.

A step of opening a contact window on the surface of the semiconductor substrate (11) on which the interlayer insulating film (20) is deposited so as to expose the surface of the semiconductor substrate (11); , forming a first layer conductive film (16A) extending from the surface of the semiconductor substrate (11) to the surface of the interlayer insulating film (2o) through the contact window; Inside, a second conductive film (16A) is formed so as to extend from the surface of the first conductive film (16A) to the surface of the interlayer insulating film (20) on which the first conductive film (16A) is not formed. 16B) Next, a dielectric film (16B) is formed on the surface of the second layer conductive film (16B).
7) forming.

Next, the second conductive layer W is applied to the surface of the dielectric film (17).
i! (16B) to avoid electrical contact with the conductive film (16B).
2).

[Industrial application field]

The present invention relates to a method for manufacturing a capacitor for a DRAM memory cell.

In recent semiconductor memories, miniaturization is required for higher integration.

With the increase in storage capacity, DRAM memory cells are required to have a storage electrode structure that has a small cell area per bit and has a large capacity that can store enough charge for memory retention and subsequent storage.

The present invention can be used as a capacitor structure for a memory cell that meets this requirement.

[Prior Art] FIGS. 2(a) and 2(b) are cross-sectional views illustrating a conventional capacitor.

In the figure, 11 is a semiconductor substrate, and 12 is an isolation oxide film.

13 and 14 are source and drain regions, 15 is a word line (gate 1-), 16 is a storage electrode, 17 is a dielectric film, 18
is a counter electrode, and 19 is a bit line.

As shown in the figure, a counter electrode 18 is stacked over the storage electrode 16 with a dielectric film 17 interposed therebetween to form a capacitor.

In order to reduce the cell area and increase the capacitance of the capacitor, it is important to increase the surface area of the storage electrode. For this purpose, capacitors are
The capacitor area was increased by adopting a dimensional structure, and the silicon nitride film, which is a dielectric film, was thinned to close to its limit thickness of 60 mm to secure the capacitance.

[Problem to be solved by the invention]

Therefore, in order to further increase the capacity, it is necessary to adopt a complicated stack structure.

Furthermore, as shown in the enlarged view of the dielectric film 17 in FIG. Since the natural oxide film 17N has grown on the storage electrode 16 before the growth of the body film, its presence causes a reduction in capacity.

Therefore, one object of the present invention is to increase the capacity while maintaining the current simple stack structure.

[Means to solve the problem]

To solve the above problem, a single interlayer insulating film (20) is deposited on the surface of a semiconductor substrate (11).
1) Opening a contact window so as to expose the surface; 9. Next, in a non-oxidizing atmosphere, extending from the surface of the semiconductor substrate (11) to the surface of the interlayer insulating film (20) through the contact window. The first layer conductive film (16A
) Next, in a non-oxidizing atmosphere, a core interlayer insulating film (2) is formed from the surface of the first conductive film (16A) on which the first conductive film (16A) is not formed.
0) The second layer conductive film (16B) extends to the surface.
) and then forming the second conductive film (16
B) Step of forming a dielectric film (I7) on the surface (1) Next, the second conductive layer (1!) is formed on the surface of the dielectric film (17). (1
6B) forming a conductive film (18) so as not to be in electrical contact with the conductive film (18).

[Function] In the present invention, the storage electrode is formed in two layers, and the first layer conductive film has the same thickness as the conventional pattern. The second layer conductive film is grown continuously without breaking the vacuum, covering the pattern of the first layer conductive film. After oxidation, a conductive film for forming a counter electrode is grown, and a capacitor is formed by simultaneously patterning the conductive film for forming a counter electrode, the silicon nitride film, and the second layer conductive film of the storage electrode.

(1) Since the storage electrode is formed in a larger area than the conventional pattern by self-alignment at the same time as the counter electrode, the capacitance increases.

(2) Since the second layer conductive film and silicon nitride film of the storage electrode are grown continuously, no natural oxide film is formed between these layers, and the capacitance increases accordingly. be.

Here, it is possible to omit the first layer conductive film and form the storage electrode only with the second layer conductive film, but in this case, the capacitor area is The area of bone on the side of the body will be reduced. In addition, other wiring such as bit lines must be done in a separate process, and the
There is no point in omitting the layered conductive film.

〔Example〕

FIGS. 1(a) to 1(C) are cross-sectional views illustrating an embodiment in the order of steps.

In FIG. 1(a), an isolation insulating film 12 is provided in an element isolation region of a p-type silicon (p-5i) substrate 11 as a semiconductor substrate.
A word line 15 and source/drain regions 13 and 14 of the two selection transistors are formed.

A silicon dioxide (SiO□) film 20 is grown thereon.

A contact hole BC for the bit line 19 and a storage contact hole SC for connecting the storage electrode are opened in this film.

Next, a polysilicon film of 2,000 to 4,000 people (
A pattern of the first conductive film 16A of the storage electrode and the bit line 19 are formed by patterning this film.

Next, a second layer conductive film 16B of the storage electrode is formed on the entire surface of the substrate.
A polysilicon film 17 doped with phosphorus and having a thickness of 1000 to 2000 thick and a silicon nitride (SiJ4) film 17 having a thickness of 70 thick are continuously grown without breaking the vacuum.

In this case, the growth conditions for polysilicon are 51g4 or SiJ as one reaction gas, and 0.1~Q, 5
When the substrate temperature is Sin in an atmosphere reduced to Torr, the temperature is 580 to 650"C, and when the temperature is 36"
The temperature is 0 to 450°C.

Furthermore, 5iJ4 is grown under the following conditions by switching the gas.

The growth conditions for 5iJ4 are 5iHs and NH as one reaction gas.
3, or 5iHC13 and NH3, or 5iH2C1
, and NH, in an atmosphere with a reduced pressure of 0.1 to 0.5 Torr and at a substrate temperature of 680 to 800°C.

Next, by thermal oxidation, a film of SiO□ of ~10 layers is formed on the surface of the Si3N film 17 to form SiO□/Si3N4.
A dielectric film having a two-layer structure is formed.

1, et al.), a polysilicon film 18 with a thickness of 1000 to 2000 thick for forming a counter electrode is grown over the entire surface of the substrate and doped with phosphorus.

Next, a resist film 21 is formed as an etching mask to cover the capacitor region.

Next, using the resist film 21 as a mask, the polysilicon film 18. Dielectric film 17. Second N-th conductive film 16 of storage electrode
B is simultaneously patterned to form a capacitor, and the resist film 21 is removed.

FIG. 1(C) is a cross-sectional view after forming a capacitor.

In the conventional example, a natural oxide film with a thickness of ~10 μm exists on the polysilicon film of the storage electrode before the Si:+L film is grown, so the capacitance is small.

In the case of a dielectric film having a two-layer structure of 5xOz/Si:lNn with a thickness of 10/70, the capacity decreases by about 20% due to this natural oxide film.

On the other hand, in the embodiment, the capacitance can be increased because such a natural oxide film is not generated due to continuous growth and the capacitor area is increased.

In the above embodiment, the storage electrodes (16A, 16B) are stacked, but the point is that the surface of the storage electrodes does not need to be oxidized, and may be treated in a non-oxidizing (inert) atmosphere.

〔Effect of the invention〕

As explained above, according to the present invention, the capacity can be increased with the current simple tank structure.

As a result, soft errors caused by radiation in the DRAM can be reduced.

[Brief explanation of the drawing]

FIGS. 1(a) to 1(C) are cross-sectional views illustrating an embodiment in the order of steps. FIGS. 2(a) and 2(b) are cross-sectional views illustrating a conventional capacitor. In the figure, 11 is a semiconductor substrate. 12 is an isolation oxide film. 13 and 14 are source and drain regions. 15 is a word line (gate). 16 is a storage electrode. 168 is the first layer conductive film of the storage electrode. 16B is the second layer conductive film of the storage electrode. 17 is a dielectric film. 18 is a counter electrode. 19 is the bit line. 20 is the front view ZI diagram of the interlayer insulation film actual gun 4)

Claims (1)

[Claims] A step of opening a contact window in the surface of the semiconductor substrate (11) on which the interlayer insulating film (20) is deposited so as to expose the surface of the semiconductor substrate (11); forming a first conductive film (16A) in a non-oxidizing atmosphere so as to extend from the surface of the semiconductor substrate (11) to the surface of the interlayer insulating film (20) through the contact window; Subsequently, in a non-oxidizing atmosphere, a first conductive film (16A) is formed so as to extend from the surface of the first conductive film (16A) to the surface of the interlayer insulating film (20) on which the first conductive film (16A) is not formed. A step of forming a second conductive film (16B), and then a dielectric film (16B) is formed on the surface of the second conductive film (16B).
17), and then a conductive film (18) is formed on the surface of the dielectric film (17) so as not to be in electrical contact with the second layer conductive film (16B).
1. A method of manufacturing a semiconductor device, the method comprising: forming a semiconductor device.