JP2001053249A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance adhesion of the storage electrode of a capacitor to an insulating film under this electrode and to raise the yield of manufacturing a semiconductor device. SOLUTION: A dielectric film 121, consisting of a metallic oxide film, is laminated on interlayer insulating films 106 and 109 on a substrate, and thereafter a plug contact is opened in the films 106 and 109 to fill a polysilicon film 10 in the plug contact and a barrier layer 110a, consisting of a metallic nitride layer is inserted between the plug contact and a storage electrode 111, to form the storage electrode 111 on the upper end of the plug contact. Since the electrode 111 consisting of a metallic material film is bonded to the film 121 which consists of the metallic oxide film without directly connecting with the film 109, the adhesion of the electrode 110 to the film 121 is modified, and since the film 109 also closely adheres to the film 121, the adhesion of the electrode 111 to the film 109 results in being modified indirectly.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device having a capacitor using a metal oxide film as a dielectric film and a method of manufacturing the same.

[0002]

2. Description of the Related Art In a dynamic random access memory (DRAM) composed of one transistor and one capacitor, as the degree of integration of an integrated circuit increases, the memory cell area must be reduced to increase the storage capacity. Is required. Under these requirements, the use of a material having a higher dielectric constant, such as tantalum oxide (Ta ₂ O ₅ ), for the dielectric film forming the capacitor increases the capacity without increasing the area of the memory cell. Technology has been proposed.

When a material having a high dielectric constant is used for the dielectric film, for example, in the case of tantalum oxide, a desired dielectric constant can be obtained by performing a post-treatment such as heat treatment or plasma treatment after forming the tantalum oxide. I am trying to be. At this time, in order to prevent oxygen from being desorbed from the dielectric material which is an oxide, the post-treatment is generally performed in an atmosphere in which oxygen exists. For this reason, if a polysilicon electrode that has been generally used in the past is used for a storage electrode, it is oxidized, and therefore a metal material that is difficult to be oxidized or has conductivity even when oxidized, such as gold, platinum or ruthenium, is used. Like that.

[0004] Next, DR using a dielectric film as described above is used.
The AM will be described below using a stack type memory cell as an example. As shown in FIG. 6, a gate insulating film 6 is formed in a region defined by an element isolation region 602 on a semiconductor substrate 601.
A gate electrode 604 is formed with the gate electrode 03 interposed therebetween. In the semiconductor substrate 601 on both sides of the gate electrode 604, a source / drain 605 is arranged by forming an impurity region by ion implantation or the like using the gate electrode 604 as a mask.

On the gate electrode 604, an interlayer insulating film 60 made of an insulator is formed over the entire area of the semiconductor substrate 601.
6 is formed, a contact plug 607 connected to the source / drain 605 formed on the semiconductor substrate 601 is formed at a predetermined position of the interlayer insulating film 606, and a bit line 608 is formed connected to the contact plug 607. I have. Further, an interlayer insulating film 606 including the bit line 608
An interlayer insulating film 609 made of an insulator is formed thereon,
At a predetermined position of the interlayer insulating film 609, a contact plug 610 connected to the source / drain 605 formed on the semiconductor substrate 601 is formed. A storage electrode 611 made of, for example, ruthenium is stacked on the contact plug 610 via a barrier film 610a.
Are formed.

A capacitance insulating film 612 is formed to cover the storage electrode 611, and a plate electrode 613 is formed to cover these. As described above, the transistor formed by the gate electrode 604, the storage electrode 611 connected to the transistor, the capacitor insulating film 612, and the plate electrode 6
The basic configuration of the memory cell is constituted by the capacitor 13. Note that the interlayer insulating film 6 made of an insulator is also formed on the interlayer insulating film 609 including the plate electrode 613.
14, a wiring layer (not shown) connected to the above-described bit line 608 and plate electrode 613 is formed thereon. In the above description, the barrier film 610a
Is formed on the contact plug 610, but in addition, a barrier film may be provided on the entire lower surface of the storage electrode 611.

[0007]

However, the conventional structure described above has a problem that the adhesion between the storage electrode and the interlayer insulating film thereunder is poor, and the production yield is poor. This is the same even when a barrier film is formed on the lower surface of the storage electrode. In this case, the adhesion between the barrier film and the interlayer insulating film thereunder is poor, and the barrier film is easily peeled. If the adhesion is poor, the storage electrode may be peeled off from the interlayer insulating film under the capacitor insulating film due to heat during post-processing or post-process of the capacitive insulating film constituting the capacitor described above. The yield was worsening.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has improved the adhesion between an electrode of a capacitor and an insulating film disposed in contact with the electrode, for example, under the electrode of the capacitor. The purpose is to improve the manufacturing yield.

[0009]

According to the present invention, there is provided a semiconductor device which is connected to a contact made of a conductive material and formed on an interlayer insulating film made of an insulating material on a semiconductor substrate. A first electrode made of a metal material formed thereon, a capacitor insulating film made of an insulating metal oxide formed on the first electrode, and a first electrode which is insulated and separated by the capacitor insulating film. A second electrode formed on the surface of the first electrode and a dielectric thin film made of an insulating metal oxide formed between the interlayer insulating film and the first electrode. Things. According to the present invention, since the dielectric film made of a metal oxide having an insulating property is arranged between the interlayer insulating film and the first electrode,
The first electrode made of a metal material comes into contact with the dielectric thin film containing a metal, and the interlayer insulating film comes into contact with the dielectric thin film which is an oxide insulator.

The capacitor insulating film and the dielectric thin film may be made of the same material, or the capacitor insulating film may be formed to extend over the interlayer insulating film, and the dielectric thin film may be formed. And may extend to between the capacitor insulating film. Also,
If a transistor formed on a semiconductor substrate under an interlayer insulating film and connected to a contact is provided, a DRAM memory cell is formed.

In the method of manufacturing a semiconductor device according to the present invention, first, an interlayer insulating film made of an insulating material is formed on a semiconductor substrate, and then a dielectric film made of an insulating metal oxide is formed on the interlayer insulating film. A body thin film is formed. Next, a contact made of a conductive material is formed through the interlayer insulating film and the dielectric thin film, and a first electrode made of a metal material is connected to the contact on the dielectric thin film. Next, a capacitor insulating film made of a metal oxide having an insulating property is formed on the first electrode, and a second electrode is formed on the surface of the first electrode while being insulated and separated by the capacitor insulating film. It is what it was. According to the present invention, a dielectric film made of a metal oxide having an insulating property is formed on an interlayer insulating film,
Since the first electrode is formed on the dielectric film, the first electrode and the interlayer insulating film have a structure in which the first electrode and the interlayer insulating film are stacked via a dielectric thin film that is a metal oxide insulator. .

[0012]

Embodiments of the present invention will be described below with reference to the drawings. Hereinafter, a stack type memory cell will be described as an example. In this embodiment, first, as shown in FIG.
The gate electrode 104 was formed in a region defined by 2 with the gate insulating film 103 interposed therebetween. In the semiconductor substrate 101 on both sides of the gate electrode 104, the source / drain 105 is disposed by forming an impurity region by ion implantation or the like using the gate electrode 104 as a mask.

On the gate electrode 104, an interlayer insulating film 10 made of an insulator is formed over the entire area of the semiconductor substrate 101.
6 was formed, a contact plug 107 connected to one of the source / drain 105 formed on the semiconductor substrate 101 was formed at a predetermined position of the interlayer insulating film 106, and a bit line 108 was formed by being connected to the contact plug 107. Also, the bit line 108
An interlayer insulating film 109 made of an insulator is formed on the interlayer insulating film 106 containing, and a contact plug 110 made of polysilicon is formed at a predetermined position of the interlayer insulating film 109. The lower portion of the formed contact plug 110 The semiconductor device was connected to the other of the source and the drain 105 formed on the semiconductor substrate 101.

In this embodiment, the dielectric thin film 121 made of an insulating metal oxide such as tantalum oxide is provided on the interlayer insulating film 109. After the dielectric thin film 121 was thus arranged, a storage electrode (first electrode) 111 made of stacked ruthenium was formed in a state of being connected to the contact plug 110. Note that this storage electrode 11
Reference numeral 1 denotes a contact plug 11 via a barrier film 110a.
0.

On the storage electrode 111 formed via the dielectric thin film 121, a capacitance insulating film 112 made of tantalum oxide is disposed so as to cover the storage electrode 111. In addition,
This capacitance insulating film 112 is not limited to tantalum oxide,
A high dielectric or ferroelectric made of another metal oxide may be used. For example, barium titanate (BaTiO
₃ : BT) or strontium titanate (SrTiO ₃ :
BST which is a solid solution of ST) may be used. By the way, in FIG. 1, this capacitance insulating film 112 is formed not only on the storage electrode 111 but also on the storage electrode 11.
Although it is formed to extend to a region above one surrounding interlayer insulating film 109, the present invention is not limited to this. This capacitance insulating film 1
Reference numeral 12 denotes a plate electrode (second electrode) 1 described below.
13 and the storage electrode 111 are insulated and separated.
What is necessary is just to be formed between them.

Further, a plate electrode 113 is arranged so as to cover the storage electrode 111 via the capacitance insulating film 112. Here, the plate electrode 113 is shared by a plurality of memory cells. For example, 128 × 256 = 32768 lower electrodes are arranged under one plate electrode. By the above, the gate electrode 104
, And a basic configuration of a memory cell including a storage electrode 111, a capacitor insulating film 112, and a capacitor including a plate electrode 113 connected thereto. Note that the interlayer insulating film 114 made of an insulator is also formed on the interlayer insulating film 109 including the plate electrode 113.
Is formed thereon, and although not shown, a wiring layer connected to the above-described bit line 108 and plate electrode 113 is formed thereon.

As described above, in this embodiment, the storage electrode 111 and the interlayer insulating film 109 thereunder are formed.
Since the dielectric thin film 121 made of tantalum oxide is provided between the two, the adhesion of the storage electrode 111 on the interlayer insulating film 109 can be improved.
By the way, in the above embodiment, tantalum oxide is used as the dielectric thin film 121, but the present invention is not limited to this, and another metal oxide having an insulating property may be used. For example, BST or the like may be used for the dielectric film 121.

In this embodiment, however, tantalum oxide is used for the capacitor insulating film 112 constituting the capacitor. Therefore, by using the same material for the dielectric thin film 121, the cost can be reduced as shown below. Can be achieved. This is because the dielectric thin film 121 can be formed by an existing manufacturing apparatus used for forming the capacitive insulating film 112, and thus it is not necessary to introduce new equipment. As described above, if no new equipment is introduced, manufacturing costs can be reduced. Therefore, when BST is used for the capacitor insulating film 112, BST may be used for the dielectric thin film 121 as well.

In the above embodiment, the dielectric thin film 1
Although 21 is formed in the entire region of the interlayer insulating film 109, the present invention is not limited to this, and may be formed only in the region on the lower surface of the storage electrode 111. However, by forming the dielectric thin film 121 over the entire area of the interlayer insulating film 109, as described below, the capacitance insulating film 1 can be more stably formed.
12 can be formed. First, conventionally, an interlayer insulating film, that is, a silicon oxide was present below the side surface of the storage electrode. On this silicon oxide, a film such as tantalum oxide is difficult to grow by a chemical vapor deposition method (CVD method) or the like, and the difference in the time required for nucleation between the silicon oxide and the metal causes the growth of tantalum oxide. Since the speeds are different, the capacity insulating film becomes weak at the interface with the interlayer insulating film, causing current leakage.

In contrast to this conventional state, in this embodiment, when forming the capacitive insulating film, a dielectric thin film made of a metal oxide is provided below the side surface of the storage electrode. Growth can be suppressed, and the capacitive insulating film can be formed more stably. In particular, in this embodiment, the same material as the capacitor insulating film is arranged as a dielectric thin film below the storage electrode, so that the effect of suppressing abnormal growth is further enhanced.

Next, a part of the method of manufacturing the semiconductor device in this embodiment, that is, the stack type memory cell shown in FIG. 1 will be described. First, FIG.
As shown in FIG. 1A, a gate electrode 104 is formed in a region defined by an element isolation region 102 on a semiconductor substrate 101 via a gate insulating film 103 by a known method. After the gate electrode 104 is formed, the gate electrode 10 is formed.
The source / drain 105 is formed by ion implantation using the mask 4 as a mask. Next, as shown in FIG.
An interlayer insulating film 106 made of an insulator such as silicon oxide is formed over the entire area of the semiconductor substrate 101, and a contact plug 107 connected to one of the source / drain 105 formed on the semiconductor substrate 101 is formed at a predetermined position, and is connected to the contact plug 107. Thus, a bit line 108 is formed.

Next, as shown in FIG. 3C, an interlayer insulating film 109 made of an insulator such as silicon oxide is formed on the interlayer insulating film 106 including the bit line 108. Subsequently, a dielectric thin film 121 made of tantalum oxide is formed on the interlayer insulating film 109 to a thickness of about 10 to 100 nm. This dielectric thin film 121 may be formed by, for example, a CVD method. Next, as shown in FIG. 3D, contact holes reaching the other of the source / drain 105 are formed in the dielectric thin film 121, the interlayer insulating film 109, and the interlayer insulating film 106 by a known photolithography technique and an etching technique. Form 301. Next, polysilicon is deposited on the dielectric thin film 121 so that the contact hole 301 is filled, so that the structure shown in FIG.
As shown in (e), a polysilicon film 302 is formed. This polysilicon may be deposited by, for example, a CVD method.

Next, the polysilicon film 302 is selectively etched back, and as shown in FIG. 3F, polysilicon is formed in the contact hole 301 with a certain amount of space provided above the contact hole 301. It is assumed that the contact plug 110 is formed. The selective etching back of the polysilicon film 302 may be performed by reactive dry etching using an etching gas having selectivity to silicon and hardly etching tantalum oxide.

Next, a barrier metal film is deposited to a thickness of about 50 to 100 nm so as to fill the space above the contact plug 110 in the contact hole 301.
As shown in (g), a barrier film 110a is formed on the contact plug 110. In forming the barrier film 110a, a barrier metal is deposited on the dielectric thin film 121 to form a film so that the space above the contact plug 110 is filled, and the deposited film is etched back by a predetermined amount. Then, as shown in FIG. 4G, a barrier film 110a may be formed over the contact plug 110. As a barrier metal for forming the barrier film 110a, for example, a refractory metal such as titanium or a nitride of the refractory metal may be used.

Next, as shown in FIG. 4H, a metal film 401 made of ruthenium is deposited on the dielectric thin film 121 by, for example, a sputtering method or a CVD method to a thickness of 0.5 to 1 nm.
It is formed to about μm. Next, the metal film 401 is patterned by a known photolithography technique and etching technique, and as shown in FIG. 4I, a storage electrode 111 connected to the contact plug 110 via the barrier film 110a is formed on the dielectric thin film 121. Form. Next, a tantalum oxide film is formed on the dielectric thin film 121 so as to cover the storage electrode 111 with a thickness of about 5 to 50 nm.
By performing post-processing such as heat treatment at a temperature of about 0 to 700 ° C., as shown in FIG.
To form

Next, a film of, for example, titanium nitride or tungsten nitride or a metal film of ruthenium is formed on the capacitor insulating film 112 to a thickness of about 10 to 100 nm, and is patterned by a known photolithography technique and etching technique. Then, as shown in FIG. 5K, a plate electrode 113 is formed. Thereafter, if the interlayer insulating film 114 made of an insulating material such as silicon oxide is formed to cover the plate electrode 113, the structure shown in FIG. 1 is obtained.

In the above description, as shown in FIGS. 1 and 4, the barrier film 110a is
Although it is formed only on the upper part of 0, it is not limited to this. The barrier film is formed to prevent the material forming the storage electrode from diffusing into the contact plug made of polysilicon. Since the barrier film is disposed between the storage electrode and the contact plug, the barrier film needs to have conductivity. Therefore, as described above, the refractory metal or the nitride of the refractory metal is used as the material of the barrier film. However, from the viewpoint of preventing the material from diffusing, the barrier film is formed over the entire lower surface of the storage electrode. May be formed. In this case, the formed barrier film also becomes a part of the storage electrode.

In the above embodiment, the electrodes of the capacitor are formed in a plate shape. However, the present invention is not limited to this. The electrodes may be formed in a cylindrical shape or a laminated electrode structure. In the case where the electrodes of the capacitor are formed in a cylindrical shape, on the side surface, the plate electrode, the capacitor insulating film, the storage electrode, the capacitor insulating film, and the plate electrode are arranged in this order from outside. In a stacked electrode structure, a storage electrode may be arranged in the uppermost layer.

[0029]

As described above, according to the present invention, a contact made of a conductive material is formed through an interlayer insulating film made of an insulating material on a semiconductor substrate, and the contact is formed to be connected to the contact. A first electrode made of a metal material is disposed thereon, and a second electrode is formed on the first electrode while being insulated and separated by the capacitor insulating film via a capacitor insulating film made of an insulating metal oxide. The electrodes are arranged, and a dielectric thin film made of a metal oxide having an insulating property is formed between the interlayer insulating film and the first electrode. According to this invention, since the dielectric film made of a metal oxide having an insulating property is arranged between the interlayer insulating film and the first electrode, the first electrode made of a metal material is formed on the dielectric thin film containing a metal. Upon contact, the interlayer insulating film comes into contact with the dielectric thin film which is an oxide insulator. As a result, according to the present invention, due to the presence of the dielectric thin film, the adhesion of the first electrode forming the capacitor to the interlayer insulating film becomes stronger, and the production yield of the semiconductor device can be improved. An excellent effect is obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view schematically showing a partial configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a process chart illustrating a manufacturing process of the semiconductor device according to the embodiment;

FIG. 3 is a process drawing following FIG. 2 for explaining the manufacturing process of the semiconductor device of the embodiment;

FIG. 4 is a process drawing following FIG. 3 for explaining the manufacturing process of the semiconductor device of the embodiment;

FIG. 5 is a process drawing following FIG. 4 for illustrating the manufacturing process of the semiconductor device of the embodiment.

FIG. 6 is a cross-sectional view showing a partial configuration of a conventional semiconductor device.

[Explanation of symbols]

101: semiconductor substrate, 102: element isolation region, 103:
Gate insulating film, 104: gate electrode, 105: source
Drain, 106: interlayer insulating film, 107: contact plug, 108: bit line, 109: interlayer insulating film, 110
... contact plug, 110a ... barrier film, 111 ... storage electrode, 112 ... capacitor insulating film, 113 ... plate electrode, 114 ... interlayer insulating film, 121 ... dielectric thin film.

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Yusuke Muraki 650 Misasa, Hosaka-cho, Nirasaki, Yamanashi Prefecture Inside (72) Inventor Kaoru 650 Misawa, Hosaka-cho, Nirasaki, Yamanashi Tokyo Electron F term in reference (reference) 5F083 AD22 AD43 AD48 AD49 AD56 GA30 JA06 JA14 JA38 JA39 JA40 JA56 MA05 MA06 MA17 MA19 PR33

Claims (5)

[Claims] 1. An interlayer insulating film made of an insulating material formed on a semiconductor substrate; a contact made of a conductive material formed through the interlayer insulating film; A first electrode made of a metal material formed on the first electrode; a capacitor insulating film made of a metal oxide having an insulating property formed on the first electrode; A second electrode formed on the surface of the first electrode, and a dielectric thin film made of an insulating metal oxide formed between the interlayer insulating film and the first electrode. Semiconductor device. 2. The semiconductor device according to claim 1, wherein said capacitive insulating film and said dielectric thin film are made of the same material. 3. The semiconductor device according to claim 1, wherein said capacitor insulating film is formed to extend over said interlayer insulating film, and said dielectric thin film is formed of said interlayer insulating film and said capacitor insulating film. A semiconductor device characterized by being formed to extend to between. 4. The semiconductor device according to claim 1, further comprising a transistor formed on said semiconductor substrate under said interlayer insulating film so as to be connected to said contact. Semiconductor device. 5. A step of forming an interlayer insulating film made of an insulating material on a semiconductor substrate; a step of forming a dielectric thin film made of a metal oxide having an insulating property on the interlayer insulating film; Forming a contact made of a metal material through the interlayer insulating film and the dielectric thin film; connecting a first electrode made of a metal material to the contact on the dielectric thin film; Forming a capacitive insulating film made of an insulating metal oxide on the first electrode; and forming a second electrode on the first electrode surface in a state where the capacitive insulating film is insulated and separated by the capacitive insulating film. And a method for manufacturing a semiconductor device.