JPH0447772U - - Google Patents
Info
- Publication number
- JPH0447772U JPH0447772U JP9091890U JP9091890U JPH0447772U JP H0447772 U JPH0447772 U JP H0447772U JP 9091890 U JP9091890 U JP 9091890U JP 9091890 U JP9091890 U JP 9091890U JP H0447772 U JPH0447772 U JP H0447772U
- Authority
- JP
- Japan
- Prior art keywords
- card
- external device
- memory
- memory card
- card insertion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000037431 insertion Effects 0.000 claims description 6
- 238000003780 insertion Methods 0.000 claims description 6
- 238000001514 detection method Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 8
Landscapes
- Credit Cards Or The Like (AREA)
Description
第１図は本考案の第１の実施例に係るメモリ・
カードの回路図、第２図は同メモリ・カードのコ
ネクタ部の模式図、第３図は同メモリ・カードが
挿入される装置側インタフエース回路の回路図、
第４図は本考案の第２の実施例に係るメモリ・カ
ードの要部の回路図、第５図は同メモリ・カード
が挿入される装置側インタフエース回路の回路図
、第６図は従来のメモリ・カードの回路図、第７
図は同メモリ・カードが挿入される装置側インタ
フエース回路の回路図である。
１……メモリ、２，３１，５１……カード制御
回路、３……入出力増幅回路、４……電源切換回
路、５……バツクアツプ電池、９，１０……プル
ダウン抵抗、１１……電源端子、１２……ライト
イネーブル・アウトプツトイネーブル信号入力端
子、１３，１４，３５，３６，６１，６２……カ
ード挿抜検知端子、１５，３７……カードイネー
ブル端子、１６……アドレス入力端子、１７……
データ入出力端子、２０，３０，５０……メモリ
・カード、２６，４０，６０……装置側インタフ
エース回路、２７，２８，４１，４２，５５，５
６……カード挿抜信号出力端子、３３，３４，６
３，６４……プルアツプ抵抗。
FIG. 1 shows a memory according to a first embodiment of the present invention.
A circuit diagram of the card, Figure 2 is a schematic diagram of the connector section of the memory card, Figure 3 is a circuit diagram of the device side interface circuit into which the memory card is inserted,
FIG. 4 is a circuit diagram of the main parts of a memory card according to a second embodiment of the present invention, FIG. 5 is a circuit diagram of an interface circuit on the device side into which the memory card is inserted, and FIG. 6 is a conventional circuit diagram. Memory card circuit diagram, No. 7
The figure is a circuit diagram of the device-side interface circuit into which the memory card is inserted. 1... Memory, 2, 31, 51... Card control circuit, 3... Input/output amplifier circuit, 4... Power supply switching circuit, 5... Backup battery, 9, 10... Pull-down resistor, 11... Power supply terminal , 12... Write enable/output enable signal input terminal, 13, 14, 35, 36, 61, 62... Card insertion/removal detection terminal, 15, 37... Card enable terminal, 16... Address input terminal, 17... …
Data input/output terminal, 20, 30, 50...Memory card, 26, 40, 60...Device side interface circuit, 27, 28, 41, 42, 55, 5
6...Card insertion/removal signal output terminal, 33, 34, 6
3,64...Pull-up resistor.
Claims (1)
らアクセスされるメモリを備えたメモリ・カード
において、前記外部装置への挿入によつて前記外
部装置の特定の端子と接続され前記外部装置から
特定のレベルのカード挿抜信号が供給されるカー
ド挿抜検知端子と、このカード挿抜検知端子のレ
ベルが前記特定のレベルになつたときに前記メモ
リをアクセス可能な状態に制御するカード制御手
段とを有することを特徴とするメモリ・カード。 (2) 前記カード挿抜検知端子は、コネクタ部の
両端に配置され、前記コネクタ部の他の端子より
もその長さが短いものであることを特徴とする請
求項１に記載のメモリ・カード。[Claims for Utility Model Registration] (1) In a memory card that is inserted into an external device and has a memory therein that is accessed from the external device, when the memory card is inserted into the external device, a specific terminal of the external device can be accessed. a card insertion/removal detection terminal connected to the external device and supplied with a card insertion/removal signal of a specific level, and controlling the memory to be accessible when the level of the card insertion/removal detection terminal reaches the specific level. A memory card characterized in that it has a card control means. (2) The memory card according to claim 1, wherein the card insertion/removal detection terminals are arranged at both ends of the connector section and have a length shorter than other terminals of the connector section.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9091890U JPH0447772U (en) | 1990-08-29 | 1990-08-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9091890U JPH0447772U (en) | 1990-08-29 | 1990-08-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0447772U true JPH0447772U (en) | 1992-04-23 |
Family
ID=31826086
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9091890U Pending JPH0447772U (en) | 1990-08-29 | 1990-08-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0447772U (en) |
-
1990
- 1990-08-29 JP JP9091890U patent/JPH0447772U/ja active Pending
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