RU1791849C - Storage cell - Google Patents

Abstract

The invention relates to computing, in particular to storage elements for a computer memory device. An object of the invention is to increase the information capacity of a memory element. The object is achieved in that the memory element contains isolation elements on the diodes 7 with corresponding connections. The connection or non-connection of the anode of the diode 7 to the corresponding read bus 11 defines additional information stored by the memory elements. Additional information is constant. 1 ill.

Description

The invention relates to the field of computer engineering, in particular to storage elements for computer memory devices.

An object of the invention is to increase the information capacity of a memory element. q g. V.

The drawing shows an electrical 1 circuit SHENT memory.

. The memory element contains two key transistors 1, 2, two communication transistors 3, 4, two load resistors 5, 6, isolation elements on the diodes 7, address bus 8, two bit buses 9, 10, read buses 11 , a power bus 12, a zero potential bus 13.

The device operates as follows ...

When recording information, the operation of the trigger is no different from. normal static trigger operation. The operation of reading any information is also no different from the operation of reading a static trigger.

The diodes 7 can either be connected to the buses 11 or not connected, depending on what information with that: or another constant program will be written to the memory element.

Resistor 6 in the memory element is larger in value of resistor 5. Due to this, asymmetry is introduced into the trigger, and when power is supplied to it (when switched off), transistor 2 will always open first, since it will have transients earlier than transistor 1. The trigger will be set to the same state O. ...

If it is necessary to reproduce the necessary constant information in the element, the power is removed from the trigger, a high potential is applied to the corresponding bus 11, then power is supplied to the trigger. As a result, when the diode 7 is connected to the bus 1, the transitions in the transistor 1 will start and end first, respectively, it will open before the transistor 2, in the element it will play 1. If the diode 7 is not connected to the corresponding bus 11, then due to the asymmetry of the trigger after When the power supply is turned on, transistor 2 will open first and O will be displayed in the memory element.

Accordingly, when diode 7 is connected to bus 11, 1 constant program will be recorded in the element, and when diode 7 is not connected, About constant program will be recorded in the element.

The most effective will be the use of this memory element for RAM and ROM.

Claims (1)

SUMMARY OF THE INVENTION A memory element comprising two key transistors, two communication transistors, two load resistors, the first terminals of which are connected to the drains of the first and second communication transistors, respectively, the drains of the first and second key transistors, respectively, the gates of the second and first key transistors, respectively. ; the sources of which are connected to the zero potential bus, the second terminal of the first load resistor is connected to the power bus, the gates of the first and second communication transistors are connected to the address bus, and the sources to the first and second bit buses, respectively, characterized in that, in order to increase the information capacity of the memory element, it contains dividing elements on the diodes, the cathodes of which are connected to the second terminal of the second load resistor, the anode of the first diode is connected to the second terminal of the first load resistor, and The diode nodes, except the first, are connected to the corresponding read buses.