JPH0442577A - Thin film transistor - Google Patents

Abstract

PURPOSE:To obtain an excellent MOS interface and sufficiently high gate breakdown strength with a thin film transistor by forming the gate insulating film of the transistor in a two-layer structure of the first insulating film formed by an ECR plasma CVD method and second insulating film formed by a thermal CVD method. CONSTITUTION:The first gate insulating film of SiO2, SiN2, etc., is formed by an ECR plasma CVD method. The second gate insulating film 108 of SiO2, SiN2, etc., is formed by a normal-pressure thermal CVD method, reduced- pressure thermal CVD method, etc. Finally, a gate electrode 109 composed of a silicon film containing impurities, metallic film, transparent conductive film, etc., is formed by a CVD method, sputtering method, or vapor deposition method. Since this thin film transistor manufactured in such way is not affected by the etched cross-sectional shapes of a source and drain electrodes 102 and 103, an excellent MOS interface having a small surface density of charge and sufficient gate breakdown strength is obtained. When a large-area substrate is used, the conventional wet etching method and dry etching method can be applied without modification.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a thin film transistor applied to active matrix liquid crystal displays, image sensors, three-dimensional integrated circuits, and the like.

[Prior art] A conventional thin film transistor is, for example, JAPAND ISP.
It had a structure as shown in LAY '86, 1986, pages 196 to 199. This structure has been unified and its outline is shown in Figure 2. (a) is a top view, and (b) is a cross-sectional view at AA'. A source electrode 202 and a drain electrode 203 are formed on an insulating substrate 201 made of glass, quartz, sapphire, etc., which are made of a polycrystalline silicon thin film doped with impurities to serve as donors or acceptors. In contact with this, the source wiring 204 and the drain wiring! Further, a semiconductor layer 206 made of a polycrystalline silicon thin film is formed so as to be in contact with the upper side of the source electrode 202 and the drain electrode 203 and to connect them. The gate insulating film 207 covers the heat
It is formed by the VD method. Further adjacent to this is Gate 1
An iIM 208 is provided.

[Problems to be Solved by the Invention] However, conventional thin film transistors have had the following problems.

When a gate insulating film is formed by the thermal CVD method, the density of the formed insulating film is small and there are many defects in the insulating film, and as a result, the surface charge density of the thin film transistor is approximately I.
X1012 cm-2, resulting in a significant decrease in reliability. Furthermore, in the thermal CVD method, the film quality of SiO2 adhering to the jig for setting the substrate or the chamber is poor, and it easily peels off, generating particles.As a result, pinholes occur in the formed gate insulating film, and thin film transistors are damaged. was the cause of the defect.

The present invention is intended to solve these problems, and its purpose is to provide a highly reliable thin film transistor over a large area with fewer defects.

[Means for Solving the Problems] The thin film i-randisk of the present invention is a gate insulating film, which is an ECR.
The first insulating film formed by plasma CVD method and thermal CVD method
It is characterized by having a two-layer structure of the second insulating film formed by the method.

[Example 1] The present invention will be described in detail based on Examples below. 1st
The figure shows a method for manufacturing a thin film transistor according to the present invention.

As shown in FIG. 1, a source electrode 102 and a drain electrode 10 are made of silicon thin films such as polycrystalline silicon, amorphous silicon, etc. doped with impurities to serve as donors or acceptors on an insulating substrate 101 made of glass, quartz, sapphire, etc.
3 is formed by a CVD method such as a low pressure CVD method or a plasma CVD method.

The film thickness is preferably 500 to 5000A. Next, a semiconductor layer 104 made of a silicon thin film such as polycrystalline silicon or amorphous silicon is formed by a CVD method such as a low pressure CVD method or a plasma CVD method. The film thickness is preferably 2000 Å or less. Next, source wiring 105 and drain wiring 106 made of metal, transparent conductive film, etc. are formed by sputtering or vacuum evaporation. Next, ECR plasma CV
The first gate insulator I of SiO□, SiN2, etc. is
Form I@107. Figure 3 shows an outline of the apparatus used. The main part consists of a plasma chamber 303 and a sample chamber 310. A quartz window 311 is placed in the plasma chamber 303, and a microwave 30 with the same wave number of 2.45 GHz and a power of 600 W is installed.
7, a magnetic field can be supplied by the magnetic coil 305 on the outer periphery. The high viscosity plasma and ion flow 304 generated by the interaction of microwaves and magnetic fields in the plasma chamber are transported to the sample chamber 310 by the ER field, and undergo gas phase and surface reactions to form a film on the insulating substrate 301. be done. When forming SiC2, 15 SCCM of oxygen gas was supplied from the gas line 306, and 6 SCCM of S i H4 gas was supplied from the gas line 308. The pressure at this time is 60X10-'Tor
r, the formation rate was about 670 people/min. The film thickness is preferably 100 to 1000 people. The substrate 301 fixed in the sample chamber 302 can form a high-quality film at a low temperature due to the impact effect of the high viscosity plasma and ion flow. On the other hand, ECR
The film formed by the plasma CVD method was fragile even if almost no film was formed or a very thin film was formed on the step sidewalls at the center of the strong directional flow of the high-viscosity plasma flow. As a result, the gate breakdown voltage between the gate electrode 109 and the source electrode 102 or the drain electrode 103 decreases, and leakage current increases.

Next, thermal CVD method such as normal pressure CVD method or low pressure CVD method
By D method, 5in)2. A first gate insulating film 108 made of SiN or the like is formed. The film thickness is preferably 500 to 2,000 people. In general, the thermal CVD method can form a film at high pressures ranging from several tens of mTorr to atmospheric pressure, so step force resistance is also good, and a film is formed on stepped sidewalls as well as on flat parts.

Finally, a gate electrode 109 made of impurity-containing silicon film, metal, transparent conductive film, etc. is formed by CVD, sputtering, or vaporization.

The thin film transistor manufactured in this way has a sos electrode 10
A good MO5 interface with a low surface charge density and a sufficient gate breakdown voltage can be obtained without being affected by the etched cross-sectional shapes of the drain electrode 103 and the drain electrode 103. This is especially 30U
When using a large-area substrate of m square or larger, it is possible to achieve both a good MO5 interface and a sufficiently large gate breakdown voltage at the same time without having to precisely control the cross-sectional shapes of the source electrode, drain electrode, semiconductor layer, etc. The conventional wet etching and dry etching methods can be applied directly to large-area substrates.

Furthermore, since the gate insulating film has a two-layer structure, the probability that pinholes existing in the gate insulating film will occur at the same location can be ignored, and defects caused by short circuits in the gate recording film can be significantly reduced.

Further, the gate insulating film formed by the ECR plasma CVD method forms an insulating film. Before, 5×10−'Tor
Since the vacuum is high below r and the film is formed at 10-' Torr level, there are extremely few impurities in the formed gate insulating film, and as a result, the surface charge density of the thin film transistor is 1/3 to 1/3 that of the thermal CVD method. The value is as small as 1/10, and the reliability of thin film transistors can be greatly improved.

The characteristics of the thin film transistor of the present invention are shown in Section 4. The horizontal axis is the gate voltage V. 3. The vertical axis is the drain current. is the logarithm of Drain voltage Vos is 4V.

Both the channel Tt and the channel width are 10 μm.

The semiconductor layer is made of polycrystalline silicon and its thickness is 200 mm, and the gate insulating film is made of SiO□ and its thickness is 50 mm.
It is 0A. The broken line indicates a thin film transistor whose gate insulating film was formed by the conventional thermal CVD method, and the solid line indicates an EC of the present invention.
This is a thin film transistor formed by R plasma CVD. As is clear from Figure 4, the surface charge density has decreased, so the drain current changes with the gate voltage Ov. is reduced by about 4, the rise in the subthreshold region is also steeper, and the characteristics are improved. As a result, when applied to a liquid crystal display, low-voltage driving becomes possible, and a high-quality display with a large contrast ratio can be realized.

When applied to image sensors and three-dimensional integrated circuits, low voltage drive and low power consumption can be achieved.

[Effects of the Invention] The present invention has the following excellent effects. First, even if conventionally used wet etching and dry etching methods are applied as they are to a large area of 30 cm square or more, a good MO5 interface and a sufficiently large gate breakdown voltage can be achieved at the same time.

Second, the surface charge density of the thin film transistor is 1x 10
-"cm-2 to 3x 10-Ncm-2, and reliability can be greatly improved.

Thirdly, the ECR plasma CVD method generates few particles in principle, and a gate insulating film without defects such as pinholes can be easily obtained, thereby realizing a thin film transistor with fewer defects.

Fourth, the electrical characteristics of thin film transistors are improved, and a liquid crystal display that can be driven at low voltage and has a high contrast ratio can be realized.

As described above, the thin film transistor of the present invention has many excellent effects, and its application range is wide-ranging, including active matrix substrates for displays, peripheral circuits thereof, image sensors, and three-dimensional integrated circuits.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view showing the method for manufacturing a thin film transistor of the present invention. FIG. 2 shows the structure of a conventional thin film transistor, in which a) is a top view and (b) is a cross-sectional view. FIG. 3 is a schematic diagram of an ECR plasma CVD apparatus. FIG. 4 is a graph showing the characteristics of thin film transistors. 101, 201. 102, 202 ・ 103, 203 ・ 104, 206 ・ 105, 204 ・ 106, 205 ・ 107, 207 ・ 108 ・ 109, 304 110, 208 303 ・ ・ ・ ・ Insulating substrate / source electrode drain electrode / semiconductor layer source wiring drain Wiring gate insulating film Highly active plasma ion flow gate electrode/plasma chamber 305 ・ ・ 306, 308 ・ 307 ・ ・ ・ 309 ・ ・ ・ ・ 310 ・ ・ ・ ・ 311 ・ ・ ・ ・ ・ ・ ・ ・Magnetic coil...Galaxy line...Microwave...Evacuation...Sample chamber...Beyond the quartz window

Claims (1)

[Claims] A thin film transistor comprising a source electrode and a drain electrode on an insulating substrate, a semiconductor layer connecting the source electrode and the drain electrode, a gate insulating film covering the semiconductor layer, and a gate electrode provided through the gate insulating film. In this step, the gate insulating film is subjected to electron cyclotron resonance plasma C.
A thin film transistor characterized by having a two-layer structure including a first insulating film formed by a VD method (hereinafter referred to as ECR plasma CVD method) and a second insulating film formed by a thermal CVD method.