JPH0441673U - - Google Patents
Info
- Publication number
- JPH0441673U JPH0441673U JP8164690U JP8164690U JPH0441673U JP H0441673 U JPH0441673 U JP H0441673U JP 8164690 U JP8164690 U JP 8164690U JP 8164690 U JP8164690 U JP 8164690U JP H0441673 U JPH0441673 U JP H0441673U
- Authority
- JP
- Japan
- Prior art keywords
- memory
- equipped package
- package
- occurred
- error
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000007689 inspection Methods 0.000 claims 4
- 238000010586 diagram Methods 0.000 description 2
- 101001046426 Homo sapiens cGMP-dependent protein kinase 1 Proteins 0.000 description 1
- 101001046427 Homo sapiens cGMP-dependent protein kinase 2 Proteins 0.000 description 1
- 102100022422 cGMP-dependent protein kinase 1 Human genes 0.000 description 1
- 102100022421 cGMP-dependent protein kinase 2 Human genes 0.000 description 1
Landscapes
- Tests Of Electronic Circuits (AREA)
Description
第１図は本考案の一実施例を示すブロツク図、
第２図は従来例を示すブロツク図である。
１，２，３，４……レジスタ、５，１５，１６
，１７，１８……メモリ、６，７，８，９，１０
……ＯＲ回路、１１，１９……ＰＫＧ１のエラー
ビツト情報、１２，２０……ＰＫＧ２のエラービ
ツト情報、１３，２１……ＰＫＧ３のエラービツ
ト情報、１４，２２……ＰＫＧ４のエラービツト
情報。
FIG. 1 is a block diagram showing an embodiment of the present invention.
FIG. 2 is a block diagram showing a conventional example. 1, 2, 3, 4...Register, 5, 15, 16
, 17, 18...Memory, 6, 7, 8, 9, 10
...OR circuit, 11, 19...Error bit information of PKG1, 12,20...Error bit information of PKG2, 13,21...Error bit information of PKG3, 14,22...Error bit information of PKG4.
Claims (1)
リ搭載パツケージを同時に検査するメモリ搭載パ
ツケージ検査装置であつて、 レジスタは、各メモリ搭載パツケージにそれぞ
れ対応して複数設けてあり、メモリ搭載パツケー
ジのエラーが発生したビツト情報を記憶するもの
であり、 メモリは、複数のメモリ搭載パツケージに対し
て１個設けてあり、エラーが発生したメモリ搭載
パツケージの情報を記憶するものであることを特
徴とするメモリ搭載パツケージ検査装置。 (2) レジスタ用ＯＲ回路を有し、 該レジスタ用ＯＲ回路は、前記レジスタに対応
してそれぞれ設けてあり、検査信号からメモリ搭
載パツケージのエラーが発生したビツト情報を作
成するものであることを特徴とする請求項第(1)
項記載のメモリ搭載パツケージ検査装置。 (3) メモリ用ＯＲ回路を有し、 該メモリ用ＯＲ回路は、前記メモリに対応して
設けてあり、同時に入力する複数の信号から、エ
ラーが発生したメモリ搭載パツケージの情報を作
成するものであることを特徴とする請求項第(1)
項記載のメモリ搭載パツケージ検査装置。[Claims for Utility Model Registration] (1) A memory-equipped package inspection device that has a register and a memory and inspects multiple memory-equipped packages simultaneously, where the register corresponds to each memory-equipped package. A memory is provided for each memory-equipped package to store bit information in which an error has occurred in the memory-equipped package.One memory is provided for each memory-equipped package to store information on the memory-equipped package in which an error has occurred. A memory-equipped package inspection device characterized by: (2) It has an OR circuit for registers, and the OR circuit for registers is provided corresponding to each of the registers, and is used to create bit information in which an error has occurred in the memory-equipped package from the test signal. Characteristic claim No. (1)
The memory-equipped package inspection device described in 2. (3) It has a memory OR circuit, and the memory OR circuit is provided corresponding to the memory, and creates information about the memory-equipped package in which the error has occurred from a plurality of signals that are input simultaneously. Claim No. (1) characterized in that
The memory-equipped package inspection device described in 2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8164690U JPH0441673U (en) | 1990-07-31 | 1990-07-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8164690U JPH0441673U (en) | 1990-07-31 | 1990-07-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0441673U true JPH0441673U (en) | 1992-04-08 |
Family
ID=31627768
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8164690U Pending JPH0441673U (en) | 1990-07-31 | 1990-07-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0441673U (en) |
-
1990
- 1990-07-31 JP JP8164690U patent/JPH0441673U/ja active Pending
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