JPH0440781A - Picture signal recording and reproducing system - Google Patents

Abstract

PURPOSE:To reproduce a picture signal with a precise time axis by phase- comparing a pilot signal outputted from an amplitude control means with a sampling clock signal and controlling the phase of the sampling clock signal with using a phase error signal corresponding to a compared result. CONSTITUTION:The phase of a sampling clock signal generated from a sampling clock generating means is controlled with using an amplitude control means 18 to separate a pilot signal from a reproduced signal reproduced from a recording medium 1, to control and output the amplitude waveform of the signal of the one part of the pilot signal so as to be a constant amplitude, a phase comparing means 10 to phase-compare the pilot signal outputted from the means 18 with the sampling clock signal and to output a phase error signal corresponding to a compared result and the phase error signal outputted from the means 10. Thus, the time axis fluctuation of a picture signal generated at reproducing can be removed surely and stably without being affected by the fluctuation of the amplitude level of the reproduced signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image signal recording and reproducing system that records an image signal on a recording medium and reproduces the image signal recorded on the recording medium.

[Conventional technology]

2. Description of the Related Art Video tape recorders and electronic still video systems are conventional image signal recording and reproducing systems that record image signals on a recording medium and reproduce the image signals recorded on the recording medium.

In the above-mentioned system, in order to correct the time axis fluctuation that occurs when reproducing an image signal from a recording medium, a clock signal having the same time axis fluctuation as the image signal reproduced from the recording medium is formed, and the clock signal is After the reproduced image signal is digitized in synchronization, it is temporarily stored in a memory or the like, and when the image data is read from the memory, the image data is read out in synchronization with an accurate lock signal that does not cause time axis fluctuations. TBC (Time Ba5) corrects time axis fluctuations that occur in the reproduced image signal during reproduction.
e Correction) technology is used.

In addition, in the above-mentioned TBC technology, when forming a clock signal having the same time axis fluctuation as the reproduced image signal, in the case of a video tape recorder, a color burst signal added in advance to the image signal is used to generate the color burst signal. A clock signal that is phase-synchronized with the signal is used as a PLL (Phase L).
However, in the case of an electronic still video system, there is no signal with time axis information such as a color burst signal, so the rising or falling edge of the horizontal synchronizing signal added to the image signal A phase-synchronized clock signal was generated using a PLL circuit or a gated oscillator.

However, with the method using the horizontal synchronization signal described above, if the S/N ratio of the reproduced image signal is poor, it is not possible to accurately detect the rising or falling edge of the horizontal synchronization signal, and accurate correction of time axis fluctuations cannot be performed. It had the disadvantage of not being able to do anything.

Therefore, in an electronic still video system, the applicant has proposed that when recording an image signal on a magnetic disk, which is a recording medium, a frequency between the color signal frequency band' and the luminance signal frequency band (for example, 2.5 to 3.5 MHz) is used. ) is used as a reference signal for TBC, and is frequency-multiplexed near the horizontal blanking period (H-BLK) and near the vertical blanking period (V-BLK) of the image signal, and then recorded. During playback, the image signal is At the same time, we devised a method of forming a clock signal having the same time axis fluctuation as the reproduced image signal using a PLL circuit or the like using a frequency-multiplexed pilot signal as a reference.

FIG. 5 is a diagram showing a schematic configuration of a reproducing device in a conventional image signal recording and reproducing system.

In order to simplify the explanation, the image signal is assumed to be a black-and-white image signal, and FIG. 5 shows a schematic configuration of a reproduction apparatus for a black-and-white image signal.

Further, FIG. 6 is a timing chart showing signal waveforms at each part of the device in order to explain the operation of the device shown in FIG. 5.

In FIG. 5, a reproduction signal reproduced by a magnetic head 3 from a magnetic disk 1 rotated by a motor 2 is amplified by a reproduction amplifier 4, and then a reproduction signal processing circuit 5,
The signal is supplied to a band pass filter (BPF) 7.

The reproduced signal processing circuit 5 demodulates the supplied reproduced signal into a baseband signal, performs de-emphasis processing, etc., and supplies the signal to the TBC circuit 6.

In addition, from the reproduction signal amplified by the reproduction amplifier 4, BP
The pilot signal that is frequency-multiplexed with the image signal during recording is separated by F7, and the pilot signal fp is amplified to an appropriate amplitude level in the next stage tuned amplifier 8.
(see FIG. 6(a)) is supplied to the gate circuit 9.

The gate circuit 9 opens the gate in accordance with the gate pulse GP (see FIG. 6(b)) output from a synchronization signal generator (not shown), and outputs the pilot signal f supplied from the tuned amplifier 8 as shown in FIG. 6(C). The signal is shaped as shown in FIG. 2, output, and supplied to the phase comparator 10.

By the way, the other input terminal of the phase comparator 10 is connected to a VCO.
(Voltage controlled oscillator) Clock signal f output from 14
The frequency of SC is divided by the divider 15 into a signal having approximately the same frequency as the pilot signal f, and the BPFI 6 supplies a signal fP' shaped into a sine wave, and the phase comparator 1o divides the signals fP and fP The error voltage ■P (see FIG. 6(d)) corresponding to which phase difference is outputted and supplied to the clamp circuit 11.

According to the clamp pulse CP (see FIG. 6(e)) outputted from a synchronization signal generator (not shown), the clamp circuit 11 detects the error voltage VP outputted from the phase comparator 10 during periods other than the horizontal and vertical blanking periods. The DC level of the signal during the period is clamped to be constant, and the error voltage v
This suppresses fluctuations in the unnecessary C component that occurs in P, and in the clamp circuit 11, the clamped error voltage v
P is supplied to a sample and hold (S/H) circuit 12.

The S/H circuit 12 horizontally converts the error signal generated during the horizontal blanking period out of the error voltage vP output from the clamp circuit 11 according to the sample hold pulse SP output from a synchronization signal generator (not shown). During the synchronization period, the sample is held (see FIG. 6(f)) and is supplied to the loop filter 13.

The loop filter 13 has two different types of loop gains, and the loop gain switching signal GSW (see FIG. 6(g)) output from a synchronizing signal generator (not shown) is at a high level (H in the figure). ), that is, during the vertical blanking period, the loop gain is controlled to be large, and during the other periods, the loop gain is small.
(see figure (h)) is supplied to the VCO 14.

Then, the VCO 14 controls the frequency of the clock signal fSC according to the signal supplied from the loop filter 13,
A clock signal fsc having the same time axis fluctuation as that of the baseband image signal output from the reproduced signal processing circuit 5 is generated from the VCO 14 and supplied to the TBC circuit 6.

Then, the TBC circuit 6 digitizes the supplied baseband image signal in synchronization with the clock signal fSC supplied from the VCO 14, and after storing it in a memory or the like,
Read from the memory in synchronization with an accurate lock signal,
By converting it again into an analog baseband image signal, the TBC circuit 6 outputs a baseband image signal from which time axis fluctuations have been removed.

[Problem to be solved by the invention] By the way, the amplitude level of the pilot signal separated from the reproduction signal reproduced from the magnetic disk is not constant due to variations in the recording level during recording, variations in the characteristics of the electromagnetic conversion system, etc. As a result, the sensitivity of the phase comparator in the PLL circuit fluctuates depending on the amplitude level of the pilot signal, resulting in loop gain not being constant and phase control by the PLL circuit becoming unstable.

Therefore, before supplying the pilot signal separated from the reproduced signal to the phase comparator, a method can be considered in which the amplitude level is made constant using an AGC (automatic gain control) circuit, etc., as shown in Fig. 6 (a). As the pilot signal separated from the reproduced signal is a discontinuous burst signal,
Even through the AGC circuit, it is not possible to keep the amplitude level constant as shown in Figure 7, and it is extremely difficult to stably operate the PLL circuit that forms the clock signal fsc for time axis fluctuation correction. Met.

The present invention was made to solve such problems,
Image signal recording that can reliably and stably remove the time axis fluctuations of the image signal that occur during playback without being affected by fluctuations in the amplitude level of the reproduced signal, and can reproduce image signals with accurate time axis. The purpose is to provide a playback system.

[Means to solve the problem]

An image signal recording and reproducing system according to the present invention, which records a single-frequency pilot signal together with an image signal on a recording medium, and reproduces the image signal recorded on the recording medium, the system comprising: Recording means for adding a single frequency pilot signal to at least the horizontal and vertical blanking periods and recording it on a recording medium, and generating a sampling clock signal for sampling an image signal separated from a signal reproduced from the recording medium. a sampling clock generating means for separating a pilot signal from a reproduced signal reproduced from the recording medium, controlling the amplitude waveform of a part of the separated pilot signal to have a constant amplitude, and outputting the amplitude; a control means, a phase comparison means for comparing the phases of the pilot signal output from the amplitude control means and the sampling clock signal, and outputting a phase error signal according to the result of the phase comparison; and a phase control means for controlling the phase of the sampling clock signal generated by the sampling clock generation means using the phase error signal generated by the sampling clock generation means.

[Effect]

With the above configuration, it is possible to reliably and stably remove the time axis fluctuations of the image signal that occur during reproduction without being affected by the fluctuations in the amplitude level of the reproduced signal, and it is possible to reproduce the image signal with accurate time axis. I will be able to do it.

〔Example〕

Hereinafter, the present invention will be explained using examples of the present invention.

FIG. 1 is a diagram showing, as an embodiment of the present invention, a schematic configuration of a reproducing device in an image signal recording and reproducing system to which the present invention is applied.

In order to simplify the explanation, the image signal is assumed to be a monochrome image signal as in the conventional example reproducing apparatus shown in FIG. 5, and FIG. Indicated.

Further, in the reproducing apparatus shown in FIG. 1, the same components as those of the reproducing apparatus shown in FIG. 5 are given the same reference numerals, and detailed explanations will be omitted.

Further, FIG. 2 is a timing chart showing signal waveforms at each part of FIG. 1.

In FIG. 1, a reproduction signal reproduced by a magnetic head 3 from a magnetic disk 1 rotated by a motor 2 is amplified by a reproduction amplifier 4, and then a reproduction signal processing circuit 5,
It is supplied to BPF7.

The reproduced signal processing circuit 5 demodulates the supplied reproduced signal into a baseband signal, performs de-emphasis processing, etc., and supplies the signal to the TBC circuit 6.

In addition, from the reproduction signal amplified by the reproduction amplifier 4, BP
The pilot signal that is frequency-multiplexed with the image signal during recording is separated by F7, and the pilot signal fp (%
2(a)) is gate circuit 17, switch S+ a
Supplied to the terminal side.

The gate circuit 17 opens the gate in accordance with the gate pulse GP' (see FIG. 2(b)) output from a synchronizing signal generator (not shown), and converts the pilot signal fP supplied from the tuned amplifier 8 into the gate pulse GP' (see FIG. 2(b)). ) and supplies it to the AGC circuit 18 in the subsequent stage.

In the AGC circuit 18, the period during which the amplitude waveform of the pilot signal fP exists is constant due to the gate operation performed in the gate circuit 17, so that RF detection is performed accurately and the pilot signal f, supplied from the gate circuit 17, is By automatically controlling the amplitude level of the pilot signal fP, the amplitude level of the pilot signal fP becomes a predetermined amplitude value, and is supplied to the BL side of the switch S1.

The switching operation of the switch S1 is based on the loop gain switching signal GSW (Fig. 2(d)
)), and as shown in Figure 2(d), the loop gain switching signal GSW is at a high level (H in the figure).
) is connected to the ai terminal side during the period, and to the b terminal side during the other periods, and the switch S is outputted from the tuned amplifier 8 during the vertical blanking period, as shown in FIG. 2(e). During other periods, the pilot signal f which has been subjected to AGC by the AGC circuit 18 is output and supplied to the phase comparator 10.

Since the sensitivity of the phase comparator 10 is proportional to the amplitude level of the supplied signal, as mentioned above, during periods other than the vertical blanking period, even if the amplitude level of the pilot signal separated from the reproduced signal changes, Due to the action of the AGC circuit 18,
Since the amplitude level of the pilot signal supplied to the phase comparator 10 is constant, the sensitivity of the phase comparator 10 is constant and the loop gain also does not vary.

However, during the vertical blanking period, the pilot signal output from the tuned amplifier 8 and not subjected to AGC is supplied as is to the phase comparator 10, so the sensitivity of the phase comparator 10 remains constant during this period. However, the role of the pilot signal during the vertical blanking period is that the frequency of the sideband of the pilot signal is fP±nfH (fp is the frequency of the pilot signal, fH is the horizontal The frequency of the synchronization signal (n is a positive integer) is prevented from being phase-synchronized with the signal, and the pilot signal is recorded from an unrecorded track on the magnetic disk during playback where the pilot signal is recorded. Even when moving the magnetic head to a track, there is no particular problem even if the loop gain changes slightly because the PLL circuit is used to quickly synchronize the phase with the pilot signal that is separated from the reproduced signal. .

Furthermore, as mentioned above, the pilot signal during the vertical blanking period is supplied to the PLL circuit without being subjected to AGC.
In the tracks on the outer circumference of the magnetic disk, the pilot signal with a large amplitude level is separated from the reproduced signal. Therefore, when playing the tracks on the outer circumference, the loop gain becomes large and large time axis fluctuations occur in the reproduced signal. Even in this case, there is an advantage that the responsiveness of the PLL circuit is improved.

As described above, the phase comparator 1 is supplied with a pilot signal as shown in FIG. 2<e> outputted from the switch S1.
At the other input terminal of BPFI 6, the clock signal f5c outputted from the VCO 14 is divided by the frequency divider 15 into a signal having a frequency almost equal to that of the pilot signal fP.
A signal fP' shaped into a sine wave is supplied to the phase comparator 10, and an error voltage 2 corresponding to the phase difference between the signals fp and fp' is outputted to the clamp circuit 1.
1.

The clamp circuit 11 maintains the DC level of the signal during periods other than the horizontal and vertical blanking periods at a constant level in the error voltage VP output from the phase comparator 10 in accordance with the clamp pulse CP output from a synchronization signal generator (not shown). The error voltage V, which is clamped by the clamp circuit 11, is supplied to the S/H circuit 12.

The S/H circuit has a clamp circuit 1 according to a sample hold pulse SP output from a synchronization signal generator (not shown).
1, an error signal generated during the horizontal blanking period is sampled and held during the horizontal synchronization period, and is supplied to the loop filter 13.

The loop filter 13 has two different types of loop gains, and a loop gain switching signal GSW (see FIG. 2(d)) is output from a synchronizing signal generator (not shown) and is also supplied to the switch S1. ) is at a high level (H in the figure), that is, during the vertical blanking period,
Control is performed to increase the loop gain and to decrease it during other periods, and the signal band-limited by the loop filter 13 is supplied to the VCO 14.

Then, the VCO 14 controls the frequency of the clock signal fsc according to the signal supplied from the loop filter 13,
A clock signal fsc having the same time axis fluctuation as that of the baseband image signal output from the reproduced signal processing circuit 5 is generated from the VCO 14 and supplied to the TBC circuit 6.

Then, in the TBC circuit 6, the supplied baseband image signal is digitized in synchronization with the clock signal tsc supplied from the VCO 14, and after being stored in a memory or the like,
Read from the memory in synchronization with an accurate lock signal,
By converting it again into an analog baseband image signal, the TBC circuit 6 outputs a baseband image signal from which time axis fluctuations have been removed.

FIG. 3 is a diagram showing a schematic configuration of a reproducing device in an image signal recording and reproducing system to which the present invention is applied, as another embodiment of the present invention.

In order to simplify the explanation, the image signal is assumed to be a monochrome image signal, similar to the conventional example reproducing apparatus shown in FIG. Also, components similar to those of the reproducing apparatus shown in FIG. 1 are given the same reference numerals, and detailed explanations will be omitted.

Further, FIG. 4 is a timing chart showing signal waveforms at various parts for explaining the operation of the apparatus shown in FIG. 3.

In the embodiment shown in FIG. 3, differences from the embodiment shown in FIG. 1 will be explained below.

In the embodiment shown in FIG. 3, the gate opening/closing operation of the gate circuit 19 to which the pilot signal f is supplied from the tuned amplifier 8 is controlled in accordance with the gate pulse GP shown in FIG. 6(b), and the gate circuit The pilot signal output from the switch S2 is supplied to the a terminal of the switch S2 and the AGC circuit 20.

The AGC circuit 20 performs AGC on the pilot signal fP supplied from the gate circuit 19 during the horizontal and vertical blanking periods, and the AGC circuit 20 outputs a signal as shown in FIG. 4(a). and is supplied to the b terminal side of the switch S2.

The switching operation of switch S2 is controlled by a switch switching signal Q (see M4 (b) in Figure 4) output from a synchronization signal generator (not shown), and the high level (H in the diagram) in Figure 4 (b) During the period, that is, the vertical blanking period and the number H before and after the vertical blanking period (H is one horizontal cycle period), the terminal is connected to the a terminal side, and the other periods are connected to the b terminal side.

Therefore, a pilot signal as shown in FIG. 4(C) is supplied from the switch to the phase comparator 10.

Incidentally, in the AGC circuit 20, the time constant of the internal RF detection filter is set to such an extent that fluctuations in the amplitude level of the pilot signal during several H periods before and after the vertical blanking period do not affect the phase synchronization control of the PLL circuit. By doing so, it is possible to obtain the same effect as the configuration shown in FIG.

As described above, in this embodiment, since AGC is applied to the pilot signal separated from the reproduced signal during a period other than the vertical blanking period, the amplitude level of the pilot signal separated from the reproduced signal fluctuates. However, during periods other than the vertical blanking period, the loop gain of the PLL circuit is always constant, and the pilot signal during the vertical blanking period is not subjected to AGC, and the outer tracks of the magnetic disk are Since a pilot signal with a large amplitude level is obtained, the loop gain increases in proportion to the amplitude level of the pilot signal during the vertical blanking period, and the PLL circuit changes the phase of the track closer to the outer periphery where large time axis fluctuations are likely to occur. Since the time required for synchronization is shortened, it is possible to always perform stable correction of time axis fluctuations.

Furthermore, in this embodiment, the image signal is a monochrome image signal, but
The present invention can also be applied to devices using color image signals, and similar effects can be obtained.

(Effects of the Invention) As explained above, according to the present invention, time axis fluctuations in an image signal that occur during reproduction can be reliably and stably removed without being affected by fluctuations in the amplitude level of the reproduced signal. I can do things,
It becomes possible to provide an image signal recording and reproducing system that can reproduce image signals with accurate time axis.

[Brief explanation of drawings]

FIG. 1 is a diagram showing, as an embodiment of the present invention, a schematic configuration of a reproducing device in an image signal recording and reproducing system to which the present invention is applied. FIG. 2 is a timing chart showing signal waveforms at various parts in FIG. 1 for explaining the operation of the apparatus shown in FIG. 1. FIG. 3 is a diagram showing a schematic configuration of a reproducing device in an image signal recording and reproducing system to which the present invention is applied, as another embodiment of the present invention. FIG. 4 is a timing chart showing signal waveforms at various parts in FIG. 3 for explaining the operation of the apparatus shown in FIG. FIG. 5 is a diagram showing a schematic configuration of a reproducing device in a conventional image signal recording and reproducing system. 6 and 7 are timing charts showing signal waveforms at various parts in FIG. 5 for explaining the operation of the apparatus shown in FIG. 5. FIG. 7.16... Bandpass filter 8... Tuned amplifier 17.19... Gate circuit 18.20... AGC circuit 10... Phase comparator 11... Clamp circuit 12... Sample hold Circuit 13... Loop filter 14... ■C0 15... Frequency divider s,, s2... Switch ch) vb diagram

Claims (1)

[Claims] A system for recording a single-frequency pilot signal together with an image signal on a recording medium and reproducing the image signal recorded on the recording medium, comprising: recording means for adding a single frequency pilot signal and recording it on a recording medium; sampling clock generating means for generating a sampling clock signal for sampling an image signal separated from a signal reproduced from the recording medium; An amplitude control means for separating a pilot signal from a reproduction signal reproduced from a recording medium, controlling the amplitude waveform of a part of the separated pilot signal to have a constant amplitude, and outputting the amplitude waveform; and the amplitude control means. a phase comparison means for comparing the phases of the pilot signal outputted from the sampling clock signal with the sampling clock signal and outputting a phase error signal according to the result of the phase comparison; and using the phase error signal output from the phase comparison means. , a phase control means for controlling the phase of the sampling clock signal generated by the sampling clock generation means.