JPH0440782A - Picture signal recording and reproducing system - Google Patents

Abstract

PURPOSE:To reproduce a picture signal with a precise time axis by controlling the phase of a sampling clock signal with using a phase error signal by the phase comparing of a pilot signal outputted from a first or a second amplitude control means and the sampling clock signal. CONSTITUTION:A first amplitude control means 17 to control and output the amplitude waveform of the signal in the vertical blanking period of a separated pilot signal and a second amplitude control means 11 to control and output the amplitude waveform of the signal except the vertical blanking period are provided. The pilot signal outputted from the amplitude control means 17 and 11 and a sampling clock signal are phase-compared, a phase error signal corresponding to a compared result is outputted and the phase error signal outputted from a phase comparing means 10 by it. Thus, the time axis fluctuation of a picture signal generated at reproducing can be removed surely and stably without being affected by the fluctuation of the amplitude level of a reproduced signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image signal recording and reproducing system that records an image signal on a recording medium and reproduces the image signal recorded on the recording medium.

[Prior Art 1] Video tape recorders and electronic still video systems have conventionally been used as image signal recording and reproducing systems that record image signals on a recording medium and reproduce the image signals recorded on the recording medium.

In the above-mentioned system, in order to correct the time axis fluctuation that occurs when reproducing an image signal from a recording medium, a clock signal having the same time axis fluctuation as the image signal reproduced from the recording medium is formed, and the clock signal is After the reproduced image signal is digitized in synchronization, it is temporarily stored in a memory or the like, and when the image data is read from the memory, the image data is read out in synchronization with an accurate lock signal that does not cause time axis fluctuations. TBC (Time Ba5) corrects time axis fluctuations that occur in the reproduced image signal during reproduction.
e Correction) technology is used.

In addition, in the above-mentioned TBC technology, when forming a clock signal having the same time axis fluctuation as the reproduced image signal, in the case of a video tape recorder, a color burst signal added in advance to the image signal is used to generate the color burst signal. PLL (Phase
However, in the case of an electronic still video system, there is no signal with time axis information such as a color burst signal, so the rising or falling edge of the horizontal synchronizing signal added to the image signal A phase-synchronized clock signal was generated using a PLL circuit or a gated oscillator.

However, with the method using the horizontal synchronization signal described above, if the S/N ratio of the reproduced image signal is poor, it is not possible to accurately detect the rising or falling edge portion of the horizontal synchronization signal, and accurate correction of time axis fluctuations cannot be performed. It had the disadvantage of not being able to do anything.

Therefore, in an electronic still video system, when recording an image signal on a magnetic disk, which is a recording medium, the applicant uses a frequency between the color signal frequency band and the luminance signal frequency band (for example, 2.5 to 3.5 MH2). The pilot signal is used as the reference signal for TBC, and the image signal is detected near the horizontal blanking period (H-BLK) and the vertical blanking period (
V-BLK) is recorded after being frequency multiplexed in the vicinity of the image signal, and during playback, a clock signal having the same time axis variation as the reproduced image signal is formed using a PLL circuit, etc., using the pilot signal frequency multiplexed and recorded together with the image signal as a reference. devised.

FIG. 3 is a diagram showing a schematic configuration of a reproducing device in a conventional image signal recording and reproducing system.

In order to simplify the explanation, the image signal is assumed to be a black-and-white image signal, and FIG. 3 shows a schematic configuration of a reproduction apparatus for a black-and-white image signal.

Further, FIG. 4 is a timing chart showing signal waveforms at each part of the device in order to explain the operation of the device shown in FIG. 3.

In FIG. 3, a reproduction signal reproduced by a magnetic head 3 from a magnetic disk 1 rotated by a motor 2 is amplified by a reproduction amplifier 4, and then a reproduction signal processing circuit 5,
The signal is supplied to a band pass filter (BPF) 7.

The reproduced signal processing circuit 5 demodulates the supplied reproduced signal into a baseband signal, performs de-emphasis processing, etc., and supplies it to the TBC circuit 6.

In addition, from the reproduction signal amplified by the reproduction amplifier 4, BP
The pilot signal that is frequency-multiplexed with the image signal during recording is separated by F7, and the pilot signal f, which has been amplified to an appropriate amplitude level in the next stage tuned amplifier 8 (see Fig. 4(a)), is gated. It is supplied to circuit 9.

The gate circuit 9 opens the gate in accordance with the gate pulse GP (see FIG. 4(b)) output from a synchronizing signal generator (not shown), and outputs the pilot signal fP supplied from the tuned amplifier 8 as shown in FIG. 4(c). The signal is shaped as shown in the figure, output, and supplied to the phase comparator 1o.

By the way, there is a VCO at the other input terminal of the phase comparator 1o.
(Voltage controlled oscillator) Clock signal f output from 14
SC is divided by a frequency divider 15 into a signal having the same frequency as a pilot signal f, and a signal f, which is further shaped into a sine wave by a BPF 16, is supplied. An error voltage vp (see FIG. 4(d)!') corresponding to the phase difference with fp' is output and supplied to the clamp circuit 11.

The clamp circuit 11 detects a period other than the horizontal and vertical blanking periods in the error voltage vP output from the phase comparator 10 in accordance with the clamp pulse CP (see FIG. 4(e)) output from a synchronization signal generator (not shown). signal D
Clamp the C level to a constant level and set the error voltage VP
This function suppresses fluctuations in the unnecessary C component that occurs in the error voltage V that is clamped in the clamp circuit 11.

is supplied to a sample and hold (S/H) circuit 12.

The S/H circuit 12 samples an error signal generated during the horizontal blanking period out of the error voltage Vp output from the clamp circuit 11 during the horizontal synchronization period according to the sample-hold pulse SP output from a synchronization signal generator (not shown). (see FIG. 4(f)) and is supplied to the loop filter 13.

The loop filter 13 has two different types of loop gains, and the loop gain switching signal GSW (see FIG. 4(g)) output from a synchronous generator (not shown) is at a high level (H in the diagram). , that is, during the vertical blanking period, the loop gain is controlled to be large, and during other periods, the loop gain is controlled to be small.
(see figure (h)) is supplied to VOCl2.

Then, VOCl4 controls the frequencies of the clock signals f and c according to the signal supplied from the loop filter 13,
The VCOl 4 generates flock signals f and c having the same time axis fluctuation as that of the baseband image signal output from the reproduced signal processing circuit 5, and supplies them to the TBC circuit 6.

Then, the TBC circuit 6 digitizes the supplied baseband image signal in synchronization with the clock fme supplied from the VCO 14, stores it in a memory, etc., and then reads it out from the memory in synchronization with an accurate lock signal. By converting the signal into an analog baseband image signal again, the TBC circuit 6 outputs a baseband image signal from which time axis fluctuations have been removed.

[Problem that the invention is trying to solve]

By the way, the amplitude level of the pilot signal separated from the reproduced signal reproduced from the magnetic disk is not constant due to variations in the recording level during recording and variations in the characteristics of the electromagnetic conversion system. The sensitivity of the PLL circuit fluctuates depending on the amplitude level of the pilot signal, the loop gain is not constant, and the phase control by the PLL circuit becomes unstable.

Therefore, before supplying the pilot signal separated from the reproduced signal to the phase comparator, a method can be considered in which the amplitude level is made constant using an AGC (automatic gain control) circuit, etc., as shown in Fig. 4 (a). As the pilot signal separated from the reproduced signal is a discontinuous burst signal,
If the time constant of the RF detection filter in the AGC circuit is constant, the amplitude level cannot be made constant even through the AGC circuit as shown in Figure 5, and the clock for time axis fluctuation correction cannot be made constant. It has been extremely difficult to operate the PLL circuit that forms the signal f1c stably.

The present invention was made to solve such problems,
Image signal recording that can reliably and stably remove the time axis fluctuations of the image signal that occur during playback without being affected by fluctuations in the amplitude level of the reproduced signal, and can reproduce image signals with accurate time axis. The purpose is to provide a playback system.

[Means for Solving the Problems] The image signal reproducing system of the present invention is a system that records a single-frequency pilot signal together with an image signal on a recording medium, and reproduces the image signal recorded on the recording medium. recording means for adding a single frequency pilot signal to at least the horizontal and vertical blanking periods of the image signal and recording it on a recording medium; and for sampling the image signal separated from the signal reproduced from the recording medium. a sampling clock generating means for generating a sampling clock signal; and separating a pilot signal from a reproduction signal reproduced from the recording medium, and adjusting the amplitude waveform of the signal during the vertical blanking period of the separated pilot signal to a constant amplitude. a first amplitude control means for controlling and outputting a pilot signal from a reproduced signal reproduced from the recording medium, and controlling an amplitude waveform of a signal of the separated pilot signal other than the vertical blanking period; A second amplitude control means that controls and outputs a constant amplitude, and a phase comparison between the pilot signal output from the first or second amplitude control means and the sampling clock signal, and a result of the phase comparison. phase comparison means for outputting a phase error signal according to the phase comparison means; and phase control means for controlling the phase of the sampling clock signal generated by the sampling clock generation means using the phase error signal output from the phase comparison means. It is equipped with the following.

[Effect 1] With the above configuration, it is possible to reliably and stably remove the time axis fluctuations of the image signal that occur during reproduction without being affected by the fluctuations in the amplitude level of the reproduced signal, and reproduce the image signal with accurate time axis. You will be able to do things.

[Example] Hereinafter, the present invention will be explained using examples of the present invention.

FIG. 1 is a diagram showing a schematic configuration of a reproducing device in an image signal recording and reproducing system to which the present invention is applied, as an embodiment of the present invention.

In order to simplify the explanation, the image signal is assumed to be a monochrome image signal as in the conventional example reproducing apparatus shown in FIG. 5, and FIG. Indicated.

Further, in the reproducing apparatus shown in FIG. 1, the same components as those of the reproducing apparatus shown in FIG. 5 are given the same reference numerals, and detailed explanations will be omitted.

Further, FIG. 2 is a timing chart showing signal waveforms at each part of FIG. 1.

In FIG. 1, a reproduction signal reproduced by a magnetic head 3 from a magnetic disk 1 rotated by a motor 2 is amplified by a reproduction amplifier 4, and then a reproduction signal processing circuit 5,
It is supplied to BPF7.

The reproduced signal processing circuit 5 demodulates the supplied reproduced signal into a baseband signal, performs de-emphasis processing, etc., and supplies the signal to the TBC circuit 6.

In addition, from the reproduction signal amplified by the reproduction amplifier 4, BP
The pilot signal frequency-multiplexed with the image signal during recording is separated by F7, and the pilot signal f amplified to an appropriate amplitude level by the next-stage tuned amplifier 8 is supplied to the gate circuit 9.

The gate circuit 9 opens the gate in accordance with the gate pulse GP output from a synchronization signal generator (not shown), and the tuned amplifier 8
The pilot signal f supplied by AG is shaped and
It is supplied to the C circuit 17.

The AGC circuit 17 includes a gain control amplifier 17a and two envelope detection filters 17 with mutually different characteristics.
b, 17c, and switch S.

The pilot signal f2 output from the gate circuit 9 is supplied to the gain control amplifier 17a, and after the amplitude level is amplified according to the gain set by the gain control amplifier 17a, the pilot signal f2 is sent to the next stage phase comparator 1.
0 and the envelope detection filter 17
b, 17c are also supplied.

The time constant of the envelope detection filter 17c is set larger than that of the envelope detection filter 17b, and the output signal Gl of the envelope detection filter 17b is sent to the a terminal of the switch St, and the output signal G2 of the envelope detection filter 17c is set to be larger than that of the envelope detection filter 17b. is supplied to the b terminal of switch S.

Further, the switching operation of the switch S1 is controlled by a loop gain switching signal GSW (same as that shown in FIG. 4(g)) output from a synchronizing signal generator (not shown), and
As shown in Figure (g), during the period when the loop gain switching signal GSW is at a high level (H in the figure), that is, during the vertical blanking period, it is connected to the a terminal side, and during other periods, it is connected to the b terminal side. The output signal G is outputted from the switch S1 during the vertical blanking period, and the output signal G2 is outputted during other periods and is supplied to the gain control amplifier 17a.

Then, the gain control amplifier 17a is set to switch S.
, the gain is controlled by the output signal G1 or G2 of the envelope detection filter 17b or 17c supplied from the gate circuit 9, and the amplitude level of the pilot signal supplied from the gate circuit 9 is kept constant during the vertical blanking period and other periods, respectively. The phase comparator 10 is then supplied to the phase comparator 10.

Incidentally, since the sensitivity of the phase comparator 10 is proportional to the amplitude level of the supplied signal, the amplitude level of the supplied pilot signal is adjusted by the AGC circuit 17 for the vertical blanking period and other periods, respectively, as described above. Since the sensitivity of the phase comparator 10 is controlled to be constant, the sensitivity of the phase comparator 10 is constant in each period, the loop gain also does not fluctuate, and the PLL circuit operates stably.

As described above, the other input terminal of the phase comparator 10 to which the pilot signal is supplied from the AGC circuit 17 is connected to VC:Ol4.
The clock signal fsc outputted from the frequency divider 15 is divided into a signal having approximately the same frequency as the pilot signal f, and the BPF 16 further supplies a signal f, which is shaped into a sine wave, and the phase comparison is performed. In the device 10, the signal f,
An error voltage V corresponding to the phase difference between and f and ' is output and supplied to the clamp circuit 11.

The clamp circuit 11 maintains a constant DC level of the signal during periods other than the horizontal and vertical blanking periods in accordance with the clamp pulse CP output from a synchronization signal generator (not shown) at the error voltage output from the phase comparator 10. The error voltage V, clamped by the clamp circuit 11, is supplied to the S/H circuit 12.

The S/H circuit 12 horizontally synchronizes the error signal generated during the horizontal blanking period among the error voltages output from the clamp circuit 11 according to the sample hold pulse SP output from a synchronization signal generator (not shown). The sample is held during the period and is supplied to the loop filter 13.

The loop filter 13 has two different types of loop gains, which are output from a synchronization signal generator (not shown), and are output from a switch S! in the AGC circuit 17. During the period when the loop gain switching signal GSW (see Fig. 4 (g)), which is also supplied to is controlled to reduce the loop gain, and the signal band-limited by the loop filter 13 is supplied to the VCO 14.

Then, the VCO 14 controls the frequency of the clock signal fwe according to the signal supplied from the loop filter 13, and the VCO 14 generates the same time axis fluctuation as that of the baseband image signal output from the reproduced signal processing circuit 5. A clock signal f me is generated having TB
It is supplied to the C circuit 6.

The TBS circuit 6 converts the supplied baseband image signal into a clock signal fsc supplied from the VCO 14.
The TBS circuit 6 converts the analog signal into a baseband image signal, stores it in a memory, etc., reads it from the memory in synchronization with an accurate lock signal, and converts the analog signal into a baseband image signal again. A baseband image signal from which is removed is output.

FIG. 2 is a diagram showing a schematic configuration of a reproducing device in an image signal recording and reproducing system to which the present invention is applied, as another embodiment of the present invention.

In order to simplify the explanation, the image signal is assumed to be a monochrome image signal as in the conventional example reproducing apparatus shown in FIG. 3, and FIG. Also, components similar to those of the reproducing apparatus shown in FIG. 1 are given the same reference numerals, and detailed explanations will be omitted.

In the embodiment shown in FIG. 2, differences from the embodiment shown in FIG. 1 will be explained below.

In the embodiment shown in FIG. 2, the AGC circuit 18 to which the pilot signal output from the gate circuit 9 is supplied is connected to two AGC circuits 1 having different envelope detection characteristics.
8a, 18b and a switch S2, and the switch S2 is switched to the a terminal side in the figure during the vertical blanking period and to the b terminal side in the figure during other periods by the loop gain switching signal GSW. By controlling the species to be connected, the effects of the configuration and rotation shown in FIG. 1 can be obtained.

As described above, in this embodiment, since the pilot signal separated from the reproduced signal is subjected to AGC having different characteristics in the vertical blanking period and the other periods, the pilot signal separated from the reproduced signal Even if the amplitude level of the signal fluctuates, the amplitude level can be kept constant before being supplied to the PLL circuit, and the loop gain of the PLL circuit can be kept constant, allowing for always stable correction of time axis fluctuations. It becomes possible to perform

Furthermore, in this embodiment, the image signal is a monochrome image signal, but
The present invention can also be applied to devices that use color image signals, and similar effects can be obtained.

[Effects of the Invention] As described above, according to the present invention, it is possible to reliably and stably remove the time axis fluctuations of the image signal that occur during reproduction without being affected by the fluctuations in the amplitude level of the reproduced signal. This makes it possible to provide an image signal recording and reproducing system that can reproduce image signals with accurate time axis.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a schematic configuration of a reproducing device in an image signal recording and reproducing system to which the present invention is applied, as an embodiment of the present invention. FIG. 2 is a diagram showing a schematic configuration of a reproducing device in an image signal recording and reproducing system to which the present invention is applied, as another embodiment of the present invention. FIG. 3 is a diagram showing a schematic configuration of a reproducing device in a conventional image signal recording and reproducing system. 4 and 5 are timing charts showing signal waveforms at various parts in FIG. 5 for explaining the operation of the apparatus shown in FIG. 3. FIG. 7.16... Band pass filter 8... Tuning amplifier 9... Gate circuit 17.18... AGC circuit 10... Phase comparator 11... Clamp circuit 12... Sample hold circuit 13 ...Loop filter 14...vCo 15...Frequency divider Otsuh) Fact 4-Fig.

Claims (1)

[Claims] A system for recording a single-frequency pilot signal together with an image signal on a recording medium and reproducing the image signal recorded on the recording medium, comprising: recording means for adding a single frequency pilot signal and recording it on a recording medium; sampling clock generating means for generating a sampling clock signal for sampling an image signal separated from a signal reproduced from the recording medium; A first amplitude control means that separates a pilot signal from a reproduced signal reproduced from a recording medium, controls the amplitude waveform of a vertical blanking period signal of the separated pilot signal so that it has a constant amplitude, and outputs the same. and a second device that separates a pilot signal from a reproduced signal reproduced from the recording medium, controls the amplitude waveform of the separated pilot signal outside the vertical blanking period to have a constant amplitude, and outputs the same. and a phase comparison means for comparing the phases of the pilot signal output from the first or second amplitude control means with the sampling clock signal and outputting a phase error signal according to the result of the phase comparison. and a phase control means for controlling the phase of the sampling clock signal generated by the sampling clock generation means using the phase error signal output from the phase comparison means. system.