JPH05236510A - Time base corrector circuit for chrominance signal - Google Patents

Abstract

PURPOSE:To eliminate jitter in a high frequency band due to oscillation or the like of a magnetic tape at the time of reproducing a video signal. CONSTITUTION:This circuit is provided with a tooth-shaped wave voltage generating circuit 27 which generates a tooth-shaped wave voltage synchronously with a horizontal synchronizing signal HSYC separated from a luminance signal Y, a sample-hold circuit 26 which samples and holds the tooth-shaped wave voltage synchronously with the period of a signal based on the horizontal synchronizing signal HSYC, a variable delay line 29 which delays the luminance signal Y, a burst separating circuit 41 which separates a burst signal from a chrominance signal C synchronously with the signal based on the horizontal synchronizing signal HSYC, a phase comparator 42 which compares the phase of the separated burst signal and that of a reference signal, a sample-hole circuit 47 which samples the signal level after phase comparison synchronously with the signal based on the horizontal synchronizing signal HSYC, and a variable delay circuit 49 which delays the chrominance signal C in accordance with the sampled signal level.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a color signal time base collector circuit suitable for an apparatus for reproducing a video signal by separating a luminance signal and a color signal from a video signal.

[0002]

2. Description of the Related Art For example, when a color video signal is recorded on a magnetic tape by a home video tape recorder, the color video signal is separated into a luminance signal and a color signal and the luminance signal is FM-modulated due to the recording characteristics of the magnetic tape. However, the frequency conversion method is adopted so that the chrominance signal is converted to the frequency on the low frequency side of the FM modulated luminance signal. The frequency for converting the chrominance signal is set to a value according to each recording method so that the luminance signal and the chrominance signal do not affect each other, but when converting, the PLL is based on the horizontal synchronizing signal. Carrier wave created by the circuit (AFC circuit = automatic frequency control circuit) and burst signal
The carrier wave created by the PLL circuit (APC circuit = automatic phase control circuit) based on (color subcarrier) is used.

On the other hand, when a color video signal is reproduced from a magnetic tape, a burst signal and a high precision created by a crystal oscillator are used to demodulate an FM-modulated luminance signal and restore the color signal to its original frequency. The carrier wave obtained from the circuit (APC circuit) controlling the voltage controlled oscillator and the signal produced by the crystal oscillator are used as the signal obtained by phase comparison with the stable signal of. In this way, the recorded and reproduced luminance and chrominance signals cause fluctuations in the time axis in the low frequency range (hereinafter referred to as jitter) that occur due to uneven rotation or eccentricity of the cylinder, and when the head contacts the magnetic tape. High-frequency jitter occurs due to the vibration of the magnetic tape that occurs.

Therefore, as a method for removing such jitter, a time base collector circuit as shown in FIG. 1 has been conventionally used. This time base collector circuit is provided with the luminance signal Y demodulated when the video signal is reproduced and the AP
Color signal C converted to frequency by C circuit and returned to the original frequency
Are input to terminals I ₁ and I ₂ . The luminance signal Y is clamped by the clamp circuit 1 to a DC potential suitable for the input of the analog / digital converter 2, and then the analog / digital
It is input to the digital converter 2.

The color signal C is received by the decoder circuit 5 as a color difference signal R-.
After being demodulated into Y and BY, they are clamped by the clamp circuit 6 in the same manner as the luminance signal Y. Clamped color difference signal R
-Y and BY are alternately selected by the switch circuit 7 and input to the analog / digital converter 8. Luminance signal Y
Is also input to the sync separation circuit 12 to output the horizontal sync signal H _SYC.
Are separated. The separated horizontal sync signal H _SYC is input to the comparator 13 of the AFC circuit, which includes the comparator 13, LPF (low-pass filter) 14, VCO (voltage controlled oscillator) 15, and frequency divider 16, and the horizontal horizontal signal is _supplied to the comparator 13. Frequency of sync signal H _SYC and frequency divider 16
Is compared with the frequency of the output signal of the VCO 15 and the oscillation frequency of the VCO 15 is locked to an integral multiple of the frequency of the horizontal synchronizing signal H _SYC .

Further, the output of the VCO 15 is frequency-divided by the frequency divider 16 into a predetermined frequency, which is supplied to the analog / digital converters 2 and 8 and the write clocks of the memories 3 and 9, respectively. The clocks of the analog / digital converters 2 and 8 and the write clocks of the memories 3 and 9 follow the jitter because they are created by the AFC circuit based on the synchronization signal of the luminance signal including the jitter.

The memories 3 and 9 and the digital / analog converters 4 and 10 are provided with stable clocks that match the average frequency of the VCO 15 created by the reference signal generator 18 including a crystal oscillator. A clock obtained by dividing the frequency into a predetermined frequency by the frequency divider 17 is provided as a read clock for the memories 3 and 9 and a clock for the digital / analog converters 4 and 10, respectively. Digital /
The output signal O ₁ of the analog converter 4 outputs the luminance signal from which the jitter is removed, and the output signal O ₂ of the encoder 11 that remodulates the output signal of the digital / analog converter 10 has the jitter removed color signal. Is output.

[0008]

However, since the AFC circuit that creates the clock that follows the jitter is a sampling system of the period of the horizontal synchronizing signal H _SYC and is feedback control, it causes the vibration of the magnetic tape described above. Since it is not possible to sufficiently follow the jitter in the high frequency range due to, the portion becomes residual jitter. In order to solve this, it is conceivable to use a feed-forward type AFC circuit to improve the followability to jitter and remove the residual jitter in the high frequency range. However, similar to the time base collector circuit shown in FIG. Since the color signal C jitter correction system corrects after demodulating the color signal C, the phase error that was included in the input color signal C and could not be removed by the APC circuit during reproduction.
(Modulation noise) cannot be removed, and only the function of correcting the jitter included in the luminance signal Y is provided.

The modulation noise that cannot be removed by the APC circuit during reproduction has a problem that it cannot follow the jitter in the high frequency range and remains because the APC circuit is a sampling system and a feedback system of the period of the horizontal synchronizing signal. .. In view of these problems, the present invention provides a color signal time base collector circuit that can remove high frequency jitter of a luminance signal and also remove modulation noise that could not be removed by the APC circuit when reproducing a color signal. The purpose is to do.

[0010]

A time base collector circuit for a color signal according to the present invention inputs a brightness signal to a brightness signal separated from a video signal and a time base collector circuit for a color signal for correcting the color signal. A first variable delay line, a sawtooth wave voltage generating circuit for generating a sawtooth wave voltage in synchronization with a synchronizing signal separated from the luminance signal, and an output voltage of the sawtooth wave voltage generating circuit based on the synchronizing signal. A first sampling circuit that performs sampling in synchronization with the cycle of the signal created by the above, and is configured to delay-control the first variable delay line in relation to the output signal of the first sampling circuit. A second variable delay line to be input, a phase comparator that compares the phase of the burst signal separated from the color signal and the signal created based on the synchronization signal, and the level of the signal after the phase comparison And a second sample circuit for sampling at a period of, based on the synchronization signal signal, characterized in that it in connection with the signal level of the second sample circuit is configured to delay controlling the second variable delay line.

[0011]

The sawtooth wave voltage is generated in synchronization with the synchronizing signal separated from the luminance signal. When the generated sawtooth wave voltage is sampled at the period of the signal that is created based on the synchronization signal and that follows the jitter in the low frequency range, the sampled voltage changes when the jitter in the high frequency range occurs. .. When the delay control of the first variable delay line is performed according to the sampled voltage, the luminance signal is delayed and the jitter included in the luminance signal is removed.

The burst signal is separated from the color signal in synchronization with the signal based on the synchronization signal. When the phases of the separated burst signal and the signal created based on the synchronization signal and following the jitter in the low frequency range are compared, and the level of the signal after comparison is sampled at the period of the signal based on the synchronization signal, When high frequency jitter occurs, the sampled signal level changes. When the second variable delay line is delay-controlled according to the sampled signal level, the color signal is delayed and the jitter included in the color signal is removed.
As a result, the high frequency jitter included in the luminance signal and the color signal can be removed, and the phase difference between the luminance signal and the color signal does not occur.

[0013]

The present invention will be described in detail below with reference to the drawings showing the embodiments thereof. FIG. 2 is a block diagram showing the configuration of the color signal time base collector circuit according to the present invention.
_The reproduced luminance signal Y is input to ₁ and is input to the signal input terminal I ₂ .
The color signal C converted to the original frequency by the APC (automatic phase control) circuit is input. The luminance signal Y is input to a variable delay line 29, which is formed by serially connecting several stages of IC integrated band-pass filters (APFs), and is also input to a sync separation circuit 21.

The sync separation circuit 21 separates the horizontal sync signal H _SYC from the luminance signal Y, and the separated horizontal sync signal H _SYC.
Is a PLL (AFC) circuit comparator consisting of a comparator 22, LPF (low-pass filter) 23, VCO (voltage controlled oscillator) 24, and frequency divider 25.
It is input to 22 and the oscillation frequency of VCO 24 is set to the horizontal sync signal H.
Lock to an integral multiple of the _SYC frequency. At this time, LPF 23
The time constant of is determined to follow the low frequency jitter included in the reproduced luminance signal Y and the low frequency jitter included in the reproduced luminance signal Y. The signal obtained by dividing the output signal does not follow the high frequency jitter.

On the other hand, the horizontal synchronizing signal H _SYC separated by the synchronizing separating circuit 21 is inputted to the sawtooth wave voltage generating circuit 27, and the sawtooth wave voltage generating circuit 27 is synchronized with the horizontal synchronizing signal H _SYC at a predetermined inclination. Generate a sawtooth voltage with increasing voltage. The sawtooth wave voltage includes the jitter included in the luminance signal Y. A sampling pulse generated by dividing the generated sawtooth wave voltage and the output signal of the VCO 24 by the frequency divider 25 is input to the sample hold circuit 26.

The sample and hold circuit 26 samples and holds the sawtooth wave voltage at the sampling pulse cycle.
That is, by sampling and holding the sawtooth wave voltage including the jitter at the cycle of the sampling pulse that follows the low frequency range jitter included in the luminance signal Y,
When the sawtooth wave voltage includes jitter, the sampled and held voltage changes and an error signal is obtained.

Since there is no feedback system in the process of extracting the jitter, the high frequency jitter is also tracked. The error signal due to the extracted high frequency jitter is amplified or attenuated by the amplifier 28 so as to match the delay characteristic of the variable delay line 29, and the operating point (DC) is determined, and then it is changed as the control voltage of the variable delay line 29. Delay line 29
Given to. As a result, the luminance signal Y that has passed through the variable delay line 29 is delayed, and the high frequency jitter is removed while leaving the low frequency jitter, and is input to the synchronization signal replacement circuit 30.

Then, the sync signal included in the luminance signal Y is replaced by the sync signal replacement circuit 30 into the sync signal created by the VCO 24 and the frequency divider 25, and is then shaped without including the high frequency jitter. The luminance signal Y having the synchronized signal thus generated is output to the signal output terminal O ₁ . The horizontal sync signal H _SYC separated by the sync separation circuit 21 is input to the burst gate creation circuit 31, and the burst gate creation circuit 31 creates a gate signal synchronized with the horizontal sync signal.

The color signal C input to the signal input terminal I ₂ is input to the variable delay line 49 and the burst separation circuit 41 which are constructed similarly to the variable delay line 29. The burst separation circuit 41 separates the burst signal from the color signal C in synchronization with the gate signal output from the burst gate creation circuit 31. The separated burst signal consists of a phase comparator 42, LPF 43, variable phase shifter 44.
It is input to the phase comparator 42 of the PLL circuit composed of. As a result, the burst signal and the signal obtained by shifting the reference signal having the same average frequency as the burst signal output from the reference signal generator 45 by the variable phase shifter 44 are locked with a phase difference of 90 degrees.

At this time, the time constant of LPF 43 is the APC during reproduction.
It is set so that the variable phase shifter 44 does not follow the phase change of the burst signal due to the high frequency jitter that cannot be removed in the frequency conversion process in the circuit. Therefore, an error signal corresponding to the phase change of the burst signal due to the high frequency band jitter is extracted from the output signal of the phase comparator 42. The extracted error signal has a filter characteristic LPF 16 in which high frequency jitter passes and the upper frequency component is sufficiently attenuated when the burst signal and the reference signal are multiplied.
Is input to the sample hold circuit 47 via.

As a result, the sample and hold circuit 47 samples and holds the level of the input error signal in synchronization with the gate signal output from the burst gate forming circuit 31 based on the horizontal synchronizing signal H _SYC . Instead of the reference signal generated by the reference signal generator 45, a signal generated by a crystal oscillator or the like used in the APC circuit at the time of reproducing the video signal can be used. Further, like the luminance signal, since there is no feedback system in the process of extracting the error signal, it follows the jitter in the high frequency range.

The error signal sample-held by the sample-hold circuit 47 is fed to the amplifier 48 and the variable delay line 49.
After amplifying or attenuating so as to match the delay characteristic of (1) and determining the operating point (DC), it is given to the variable delay line 49 as a control voltage of the variable delay line 49. As a result, the color signal C that has passed through the variable delay line 49 has the high frequency modulation (PM) noise that could not be removed by the APC circuit removed, and is input to the sync signal replacement circuit 50. The sync signal replacement circuit 50 replaces the sync signal included in the color signal C with the sync signal generated by the reference signal generator 45, and then includes a shaped sync signal that does not include high frequency jitter. Color signal C
To the signal output terminal O ₂ .

FIG. 3 is a block diagram showing another embodiment of the color signal time base collector circuit according to the present invention. The variable delay lines 29 and 49 are composed of CMOS inverters.
The luminance signal Y (color signal C) input to the signal input terminal I ₁ (I ₂ ) is input to the FM modulation circuit 60 (70), and the FM-modulated luminance signal is FM output via the variable delay line 29 (49). It is input to the demodulation circuit 61 (71). The luminance signal demodulated by the FM demodulation circuit 61 (71) is input to the synchronization signal replacement circuit 30 (50). The other configuration is the same as the configuration of the color signal time base collector circuit shown in FIG. 2, and the same components are designated by the same reference numerals.

Variable delay lines 29, 49 composed of CMOS inverters
Uses the fact that the delay amount changes when the power supply voltage of the CMOS inverter is changed, and the variable delay amount range can be determined by the number of inverter stages. However, since the variable delay line composed of the CMOS inverter cannot give information in the amplitude direction, the luminance signal Y or the color signal C cannot be directly input to it. Therefore, FM modulation circuit
The luminance signal Y and the chrominance signal C are FM-modulated at 60 and 70 and then input to the variable delay lines 29 and 49.

After passing through the variable delay lines 29 and 49,
The FM demodulation circuits 61 and 71 demodulate the luminance signal Y and the color signal C, respectively. And the operation to remove the high frequency jitter is
The operation is similar to that of the color signal time base collector circuit shown in FIG. 2, and similar effects can be obtained. In the luminance signal system, the FM luminance signal at the time of reproducing the video signal can be used to omit the FM modulation circuit and the FM demodulation circuit.

[0026]

As described above in detail, according to the present invention, it is possible to reliably remove the high frequency jitter contained in the reproduced luminance signal and chrominance signal. Therefore, it is possible to correct the image distortion and the color unevenness of the displayed image, and it is possible to provide the excellent effect of providing the color signal time base collector circuit capable of displaying a high quality image.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a conventional color signal time base collector circuit.

FIG. 2 is a circuit diagram of a color signal time base collector circuit according to the present invention.

FIG. 3 is a circuit diagram showing another embodiment of the color signal time base collector circuit according to the present invention.

[Explanation of symbols]

21 Sync Separation Circuit 21 Comparator 23 LPF (Low Pass Filter) 24 VCO (Voltage Controlled Oscillator) 26 Sample Hold Circuit 27 Sawtooth Wave Voltage Generation Circuit 29 Variable Delay Line 41 Burst Separation Circuit 42 Phase Comparator 45 Reference Signal Generator 46 LPF (Low-pass filter) 47 Sample-and-hold circuit 49 Variable delay line I ₁ , I ₂ signal input terminal O ₁ , O ₂ signal output terminal

Claims (1)

[Claims] 1. A color signal time base collector circuit for correcting a luminance signal and a color signal separated from a video signal, wherein the luminance signal is synchronized with a first variable delay line to which the luminance signal is to be input and a synchronization signal separated from the luminance signal. A sawtooth wave voltage generating circuit for generating a sawtooth wave voltage, and a first sample circuit for sampling the output voltage of the sawtooth wave voltage generating circuit in synchronization with the cycle of the signal created based on the synchronizing signal. And a second variable delay line to which the color signal is to be input, and a burst separated from the color signal, the second variable delay line being configured to delay-control the first variable delay line in relation to the output signal of the first sample circuit. A phase comparator that compares the phase of a signal with a signal created based on the synchronization signal, and a second sample circuit that samples the level of the signal after the phase comparison at the period of the signal based on the synchronization signal. The provided color signal time base corrector circuit characterized in that it configured to delay controlling the second variable delay lines in conjunction with the signal level of the second sample circuit.