JPH0437651B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a high voltage distribution line ground fault line detection system.

Directional ground fault relays are normally used to detect ground faults in high-voltage distribution lines, but small ground fault relays may be used for small ground faults that cannot be detected by this method. This small ground fault relay takes the zero-sequence voltage of the bus as an input, and when this zero-sequence voltage is intermittent at a certain level or more for a certain period of time, it is assumed that a ground fault has occurred, and the small ground fault is set in advance. When the zero-sequence voltage disappears, the line that is interrupted at that time is regarded as the ground fault line. However, when such a relay is used, it has the disadvantage that it may disconnect other healthy lines connected to the busbar, resulting in unnecessary power outage.

The object of the present invention is to detect a faulty ground fault line at high speed without requiring disconnection of a healthy line.

This invention is based on the phase relationship between the zero-sequence voltage of the bus and the zero-sequence current of each line, or the difference between the change in the zero-sequence voltage of the bus and the change in the zero-sequence current of each line before and after a ground fault fault. It is characterized by detecting faulty lines based on phase relationships.

First, the operating principle of this invention will be explained. Figure 1 shows multiple lines 1F on the busbars of each phase of A, B, and C.
This shows the distribution line system connecting ~nF.
In addition, in the same figure, the line voltage of the bus bar is E〓ab,
E〓bc, E〓ca, voltage to ground is V〓, V〓b, V〓c, phase current is
I〓a, I〓b, I〓c, the phase current of each line is I〓 ₁ a, I〓 ₁ b, I
〓 ₁ c～
I〓na, I〓nb, I〓nc, the ground capacity of each line is C1a, C1b,
Let C1c～Cna, Cnb, Cnc. At this time, the combined ground capacity C ₁ to Cn and negative phase capacitance C' ₁ to C'n of each line are C ₁ = C ₁ a + C ₁ b + C ₁ c, C' ₁ = C ₁ a + α ² C ₁ b + αC ₁ c ... ... Cn=Cna+Cnb+Cnc, C′n=Cna+α ² Cnb+αCnc (α=1+j√3/2).

GPT is a grounding transformer with a turns ratio of 1:n, z〓n
is the impedance so inserted into the open delta of the tertiary winding of the grounding transformer GPT, and I〓n is the current flowing to the neutral point.

In such a power distribution system, the a of line 1F is now
If a ground fault occurs in the phase line through the fault point resistance R _g , then the relationship between the zero-sequence voltage V〓 ₀ of the bus bar and the zero-sequence current I〓 ₁₀ to I〓n ₀ of each line is as follows. It is given by Eq.

V〓 ₀ =-1/R _g +Y〓 ₂ /1/R _g + (1/Zn+Y〓 ₀ )V〓 ₁ =-1+R _g Y〓 ₂ /1+R _g (1/Zn+Y〓 ₀ )V〓 ₁ (1 ) 3I〓 ₁₀ =Y〓 ₁₀ V〓 ₀ +Y〓 ₁₂ V〓 ₁ +1/R _g V〓 ₀ +1/R _g V〓 ₁ (2) 3I〓 ₂₀ =Y〓 ₂₀ V〓 ₀ +Y〓 ₂₂ V〓 ₁ … 3I〓n ₀ =Y〓n ₀ V〓 ₀ +Y〓n ₂ V〓 ₁ (3) Here, Y〓 ₁₀ = jωC ₁ , ..., Y〓no=jωCn Y〓 ₁₂ = jωC′ ₁ , ... ,Y〓n ₂ ＝jωC′n Y〓 ₀ ＝Y〓 ₁₀ ＋Y〓 ₂₀ ＋……＋Y〓n ₀ ＝jω（C ₁ ＋C ₂ ＋……＋Cn） Y〓 ₂ ＝Y〓 ₁₂ ＋Y〓 ₂₂ ＋… …+Y〓n ₂ =jω(C′ ₁ +C′ ₂ +……+C′n) (ω=2πf f: System frequency) Z・n=n ² /9Z・n (primary side of impedance z〓n Converted value) V〓 ₀ = V〓 + V〓b + V〓c (zero-sequence voltage) V〓 ₁ = V〓 + αV〓b + α ² V〓C (positive-sequence voltage) The zero-sequence equivalent circuit of the system shown in Figure 1 is Figure 2 is drawn based on equations (1) to (3). here
jωC′ ₁ V〓 ₁ , jωC′ ₂ V〓 ₁ , ...jωC′nV〓 _1, etc. are caused by an imbalance in the ground capacity for each phase of each line, regardless of the presence or absence of a ground fault. A residual zero-sequence current I〓 ₀ always flows. If there is no fault (i.e.
Even in the case where R _g g is infinite), a residual zero-sequence voltage V〓 ₀ is generated due to this residual zero-sequence current I〓 ₀ .

Assuming that there is no imbalance in ground capacity,
That is, when Y〓 ₁₂ = Y〓 ₂₂ =...=Y〓n ₂ = 0, from equations (1) to (3), V〓 ₀ = -1/1 + R _g (1/Zn + Y〓 ₀ )V 〓 ₁ (4) I〓 _g =V〓 ₀ +V〓 ₁ /R _g =-(1/Zn+Y〓 ₀ )V〓 ₀ (5) 3I〓 ₁₀ =Y〓 ₁₀ V〓 ₀ +V〓 ₀ +V〓 ₁ / R _g =Y〓 ₁₀ V〓 ₀ +I〓 _g = - (1/Zn+Y〓)V〓 ₀ +Y〓 ₁₀ V〓 ₀ (6) 3I〓 ₂₀ =Y〓 ₂₀ V〓 ₀ ,..., 3I〓n ₀ ＝Y〓n ₀ V〓 ₀ (7) As can be understood from equations (6) and (7), the zero-sequence current I〓 ₁₀ of the faulty circuit and the zero-sequence current I〓 ₂₀ ,...,I〓 of the healthy line n ₀
and the ground charging current in the faulty circuit.
I〓 becomes the value with _g added.

As understood from equation (5), _I〓g changes depending on the impedance Z.n, and Z.n generally adopts a resistance method or a parallel method of a resistor and an arc-extinguishing coil. Hereinafter, the latter will be referred to as PC type, and the former will be referred to as non-PC type. In the case of a PC system, the capacitance of the arc-extinguishing coil is set to a value that compensates for the total ground capacity of the system, Y = ₀ .

Based on the above points and FIG. 2, FIGS. 3 to 5 show vector diagrams at the time of a one-wire ground fault. FIG. 3 is a vector diagram of the non-PC system, FIG. 4 is a vector diagram of the PC system at the time of undercompensation, and FIG. 5 is a vector diagram of the PC system at the time of overcompensation. Note that each of these vector diagrams shows lines as four circuits (1F to 4F). As can be understood from Figures 3 to 5, the zero-sequence current I〓 ₁₀ of a faulty line and the zero-sequence current I〓 ₂₀ to I〓 ₄₀ of a healthy line, regardless of whether it is a PC system or a non-PC system, are as follows. −V
〓 ₀
, and the zero-sequence current of the failed line has the smallest phase difference with respect to −V〓 ₀ than the zero-sequence current of the healthy line. That is, by knowing the zero-sequence current whose phase difference angle is closest to _-V〓0 among the zero-sequence currents of each line, it is possible to detect a faulty line.

Next, a case where there is an imbalance in ground capacity will be explained. In this case, Y〓 ₁₂ to Y〓n ₂ are not necessarily zero. Therefore, from equations (2) and (3), 3I〓 ₁₀ ＝Y〓V〓＋Y〓 ₁₂ V〓 ₁ +I〓 _g (8) 3I〓 ₂₀ ＝Y〓 ₂₀ V〓 ₀ ＋Y〓 ₂₂ V〓 ₁ (9 ) … 3I〓n ₀ =Y〓n ₀ V〓 ₀ +Y〓n ₂ V〓 ₁ (9). However, Y〓 ₁₂ V〓 ₁ , Y〓 ₂₂ , V〓 ₁ , ..., Y〓n ₂ V
〓 ₁
Due _{to the} influence _of . Therefore, when there is such an unbalanced portion, if an attempt is made to create a faulty line using the method described above when there is no unbalanced portion, erroneous detection will occur.

Therefore, even if there is an unbalanced component, we investigated whether it is possible to detect a faulty line without false detection from the phase difference angle between −V〓 ₀ and the zero-sequence current of each line. When detection was performed using changes in the zero-sequence voltage and each zero-sequence current, it was found that false detection did not occur.
This will be explained below.

As mentioned above, the relationships between V〓 ₀ and I〓 ₀ at the time of a one-wire ground fault are as shown in equations (1) to (3). Before the failure
Although R _g is infinite, if there is an imbalance in ground capacity between the phases of each line, residual zero-sequence voltage and residual zero-sequence current will always occur. These magnitudes are V〓 ₀ = −Y〓 ₂ / (1/Zn + Y〓 ₀ )V〓 ₁ (10) 3I〓 ₁₀ = Y〓 ₁₀ V〓 ₀ +Y〓 ₁₂ V〓 ₁ (11) 3I〓 ₂₀ = Y〓 ₂₀ V〓 ₀ +Y〓 ₂₂ V〓 ₁ … 3I〓n ₀ =Y〓n ₀ V〓 ₀ +Y〓n ₂ V〓 ₁ (12).

Now, focusing on the changes before and after the failure: △V〓 ₀ =V〓 ₀ V〓 ₀ = -1/Zn+Y〓 ₀ -Y〓 ₂ / [1+R _g
(1/Zn+Y〓 ₀ )〕[1/Zn+Y〓 ₀ ]V〓 ₁ =-1/1+R _g (1/Zn+Y〓 ₀ ) [1--Y〓 ₂ /1/
Zn+Y〓 ₀ 〕V〓 ₁ =-1/1+R _g (1/Zn+Y〓 ₀ )(V〓
+V〓 ₁ ) (13) 3△I〓 ₁₀ =3I〓 ₁₀ −3I〓 ₁₀ =Y〓 ₁₀ △V〓 ₀ +1/R _g (
V〓 ₀ +V〓 ₁ ) =Y〓 ₁₀ △V〓 ₀ +1/R _g (V〓 ₀ −V〓 ₀ +V〓 ₀ +V〓 ₁ )
=Y〓 ₁₀ V〓 ₀ +1/R _g △V〓 ₀ +1/R _g (V〓 ₀ +V〓 ₁ ) =Y〓 ₁₀ △V〓 ₀ +1/R _g △V〓 ₀ −1/R _g △V 〓 ₀ − (1
/Z/・n+Y〓 ₀ )△V〓 ₀ =-(1/Zn+Y〓 ₀ )△V〓 ₀ +Y〓 ₁₀ △V〓 ₀ (14) 3△I〓 ₂₀ ＝3I〓 ₂₀ −3I〓 ₂₀ ＝Y 〓 ₂₀ △V〓 ₀ … 3△I〓n ₀ =3I〓 ₀ −3I〓n ₀ =Y〓n ₀ △V〓 ₀ (15).

When calculating the change in this way, there is no term for the unbalance Y〓 ₁₂ ~ Y〓n ₂ in either equations (14) or (15), which means that in principle the unbalance of the ground capacity can be canceled. It becomes a shape. Therefore, the relational expression of △I〓 _{0 with respect to △V〓 0 is} expressed as V〓 ₀ and I〓 ₀ in equations (6) and (7)
It becomes possible to treat it as replacing V〓 ₀ and △I〓. As a result of the above, if the variation is used, as can be understood from the vector diagrams shown in Figures 3 to 5, the zero-sequence current variation with the smallest phase difference from -△V〓 ₀ By detecting lines exhibiting this, faulty lines can be detected.

FIG. 7 shows an embodiment based on the detection principle described above. The figure shows the zero-sequence voltage of the high-voltage distribution line V〓 ₀
Then, the zero-sequence currents I〓 ₁₀ to I〓n ₀ of each line are sampled and held by the sample and hold circuits 11A to 11N. It is desirable that the sampling signal at this time be synchronized with the frequency of the line-to-line voltage of the bus to avoid errors when detecting the amount of change, so as shown in the figure, for example, the line-to-line voltage E〓ab is multiplied by the frequency. It is preferable to apply the sampling signal to the circuit 12 to generate a sampling signal having a frequency multiplied by that frequency, and to operate each sample-and-hold circuit 11A to 11N using this signal.

The values held by each sample and hold circuit 11A to 11N are converted into digital quantities by an A/D converter 14 via a multiplexer 13, and then stored in a memory 15. The arithmetic circuit 16 calculates the zero-sequence voltage V〓 ₀ and the magnitude and phase of each of the zero-sequence currents I〓 ₁₀ to I〓n ₀ from the sample data stored in the memory 15 and stores them in the memory 15 . When the magnitude of the zero-sequence voltage V〓 ₀ is smaller than a predetermined value, the previously stored magnitude and phase data are replaced with the latest values and stored in the memory 15.

If the current zero-phase voltage V〓 ₀ exceeds a certain value and this state continues for a predetermined period of time, it is assumed that a ground fault has occurred in the distribution line.
Each data is taken out from the memory 15 and the arithmetic circuit 1
6, the change before and after failure △V〓 ₀ , △I〓 ₁₀ to △I〓 ₀
〜△I〓n ₀ is calculated, and among the change △I〓 ₁₀ 〜△I〓n ₀ ,
−△V〓 Detect the line showing the smallest change in phase difference from ₀ . This detection circuit is determined to be a ground fault line. The arithmetic circuit 16 sends a signal corresponding to the faulty line to the relay drive circuit 18 via the interface 17 in order to disconnect the line that has been determined to be a ground fault line. The relay drive circuit 18 selects and drives the trip relay of the faulty line from among the trip relays 19A to 19N of each line. This causes the faulty line to be disconnected from the busbar. From the time a ground fault occurs until the faulty line is disconnected, there will be no power outage on the healthy line. The above explanation is for the case using the variation, but the same circuit configuration can also be used when determining a faulty line using the zero-sequence voltage V〓 ₀ and each zero-sequence current I〓 ₁₀ to I〓n ₀ at the time of failure. Needless to say, it can be done with

As detailed above, according to the present invention, it is possible to detect a faulty ground fault line without disconnecting or disconnecting the healthy lines, and it is also possible to detect the failure line without disconnecting the healthy lines one after another. Since it can be detected, high-speed detection is possible, which has the advantage of being able to perform high-speed detection.

[Brief explanation of drawings]

Fig. 1 is a system diagram of a high-voltage distribution line, Fig. 2 is a zero-phase equivalent circuit diagram of the system shown in Fig. 1, Figs. 3 to 6 are vector diagrams for explaining operation, and Fig. 7 is an implementation of the present invention. FIG. 2 is a block diagram showing an example. 11A~11N...Sample hold circuit, 1
3...Multiplexer, 15...Memory, 16...
...Arithmetic circuit.

Claims (1)

[Claims] 1. Regarding the zero-sequence voltage of the bus bar and the respective zero-sequence currents of a plurality of lines connected to the bus bar, when a ground fault occurs in the line, the zero-sequence voltage A high-voltage distribution line ground fault line detection method that detects the line exhibiting a zero-sequence current with the smallest phase difference as the ground fault line. 2. With respect to the zero-sequence voltage of the bus and each zero-sequence current of a plurality of lines connected to the bus, detect the changes before and after a ground fault occurs in the line, and calculate the zero-sequence voltage. A high-voltage distribution line ground fault line detection method that detects a line exhibiting a zero-sequence current change with the smallest phase difference with respect to the change as a ground fault line.