JPH04373173A - Solid state image sensing device - Google Patents

Abstract

PURPOSE:To make it unnecessary to increase the substrate voltage to be applied for blooming control, by ensuring potential barrier height at a transfer gate region to be constant, when said region is contracted by increasing the density of a solid-state image sensing element. CONSTITUTION:In a solid-state image sensing element wherein an N-type light receiving element 6, an N-type charge transfer region 3 and a P-type transfer gate region 5 are formed in the surface region of a P-type well, an N<-> type region 4 whose impurity concentration is lower than the N-type charge transfer region 3 is formed in the part adjacent to the transfer gate region 5.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image sensor using a charge transfer device.

0002

2. Description of the Related Art FIG. 4 is a sectional view of a conventional solid-state image sensor of this type. A p-type well 2 is formed on an n-type semiconductor substrate 1, and in the surface region of the p-type well 2, an n-type light-receiving region 6 as a light-receiving portion has a deep junction and a low concentration, and an n-type light-receiving region 6 has a shallower junction and a higher concentration. A p+ type region 7 is formed, an n-type charge transfer region 3 for transferring signal charges in a direction perpendicular to the plane of the paper, and a p-type transfer gate serving as a transfer path for signal charges from the light receiving region 6 to the charge transfer region 3. A region 5 is formed, and each region is separated by a p+ type channel stop region 8. A gate oxide film 9 is formed on the semiconductor substrate.
A gate electrode 10 is formed through the gate electrode 10, and a light shielding film 11 having an opening 12 above the light receiving portion is formed thereon.

Signal charges generated by light incident through the aperture 12 are accumulated in the n-type light receiving region 6. The accumulated signal charges are read out to the n-type charge transfer region 3 via the relatively lightly doped p-type transfer gate region 5 by applying a read pulse to the gate electrode 10 .

Next, the barrier structure of a conventional solid-state image sensor will be explained using the potential barrier diagram shown in FIG. In the conventional solid-state image sensor, the signal charges accumulated in the light-receiving region 6 are
In order to prevent the blooming phenomenon that generates false signals by exceeding the potential barrier PB1 of the transfer gate region 5 and flowing into the charge transfer section 3, an appropriate positive charge is applied to the n-type semiconductor substrate 1, and the p Blooming control is performed by pushing down the potential barrier PB2 of the type well 2 and extracting excess signal charges to the n-type semiconductor substrate.

[0005]

[Problems to be Solved by the Invention] Solid-state image sensors are required to be smaller and have more pixels, but even in this case, in order to secure the necessary amount of signal charge, the area of the light receiving area and the charge transfer area must be reduced. must be avoided. Therefore, in order to achieve higher density, it is necessary to reduce the channel stop region and transfer gate region.

However, in the transfer gate structure of a conventional solid-state image sensor, the p-type transfer gate region with a concentration of about 1016 cm-3 and the n-type charge transfer region with a concentration of about 1017 cm-3 are in direct contact with each other. When the channel length is reduced to 1 μm or less, a short channel effect appears, and the potential barrier lowers during light reception, making it easier for signals to flow from the light receiving section to the charge transfer section.

Therefore, in order to suppress blooming, it is necessary to increase the voltage applied to the semiconductor substrate 1, but since the potential barrier of the transfer gate varies depending on the device, in order to obtain a stable blooming suppressing effect, it is necessary to increase the voltage applied to the semiconductor substrate 1. This means that the voltage applied to the circuit must be sufficiently increased. However, in that case, a problem arises in that the storage charge capacity decreases, ie, the output signal decreases.

[0008]

[Means for Solving the Problems] The solid-state image sensor of the present invention has a plurality of light receiving regions that perform photoelectric conversion and accumulate signal charges, and a charge transfer region that serves as a transfer path for signal charges, in a surface region of a semiconductor substrate. and a transfer gate region for reading signal charges from the light receiving region to the charge transfer region;
is formed, and a region of the charge transfer region closer to the transfer gate region has the same conductivity type as the other portions of the charge transfer region and has a lower impurity concentration than the other portions. It is a feature.

[0009]

Embodiments Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a sectional view showing one embodiment of the present invention. In this figure, the same reference numerals are given to the parts common to the parts of the conventional example shown in FIG. 4, and therefore redundant explanation will be omitted.

The difference between this embodiment and the conventional example shown in FIG. 4 is as follows.
In this embodiment, the region of the charge transfer region 3 closer to the transfer gate region 5 is an n-type region 4 with a low impurity concentration.

Next, the effect of providing the n- type region 4 will be explained with reference to the potential barrier diagram of FIG. In the structure of this example, by providing a low impurity concentration region (n- type region 4) adjacent to the transfer gate region, the short channel effect of the transfer gate region is alleviated, and the potential barrier PB1 there is reduced. The height is made constant. Therefore, the voltage applied to the semiconductor substrate for setting the potential barrier PB2 of the p-type well 2 when extracting excess signal charges in the light-receiving region 6 to the n-type semiconductor substrate 1 can be made constant, reducing sensitivity. Appropriate blooming control can be performed without

Next, the main parts of the manufacturing method of this embodiment will be explained with reference to FIG. A silicon oxide film 13 and a silicon nitride film 14 are grown on the semiconductor substrate on which the p-type well 2 is formed, and after opening a window in the silicon nitride film 14 at a location where a light receiving region and a charge transfer region are to be formed, a charge transfer region is formed. Ion implantation and thermal diffusion are performed while covering the formation region with a mask to form an n-type light receiving region 6.
form. Next, a photoresist 15 is applied over the light receiving area 6.
Then, ion implantation of phosphorus is performed at a relatively low concentration (1016 cm-3) to form an n- type region 4 [FIG. 3(a)
].

Next, as shown in FIG. 3(b), part of the light receiving area and the charge transfer area is covered with a photoresist 16.
The n-type charge transfer region 3 is formed by ion-implanting phosphorus at a relatively high concentration (approximately 10<17 >cm<-3>). The subsequent steps are the same as in the conventional example.

[0014]

As explained above, the present invention reduces the impurity concentration in the portion of the charge transfer region adjacent to the transfer gate region. According to the present invention, the channel length of the transfer gate region can be reduced. Even if the length is shortened, the height of the barrier potential at the time of light reception can be made constant. Therefore, there is no need to increase the voltage applied to the substrate for blooming control, so it is possible to stably perform blooming control without reducing the amount of signal charge.

Therefore, according to the present invention, it is possible to reduce the size of the transfer gate area without reducing the area of the light receiving area and the charge transfer area, and it is possible to increase the number of pixels and density of the solid-state image sensor without reducing the sensitivity. can be achieved.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing one embodiment of the present invention.

FIG. 2 is a potential barrier diagram of the embodiment of FIG. 1;

FIG. 3 is a cross-sectional view for explaining the manufacturing method of the embodiment shown in FIG.

FIG. 4 is a sectional view of a conventional example.

FIG. 5 is a potential barrier diagram of a conventional example.

[Explanation of symbols]

1...n-type semiconductor substrate 2...p-type well 3...n-type charge transfer region 4...n-type region 5...p-type transfer gate region 6...n-type light receiving area 8...Channel stop area 10...Gate electrode 11... Light shielding film

Claims (1)

[Claims] 1. A surface region of a semiconductor substrate includes a plurality of light receiving regions that perform photoelectric conversion and accumulate signal charges, a charge transfer region that serves as a signal charge transfer path, and a signal transfer region from the light receiving region to the charge transfer region. In a solid-state imaging device in which a transfer gate region for reading out charges is formed, a region of the charge transfer region closer to the transfer gate region has the same conductivity type as the other part of the charge transfer region and has a higher conductivity than the other part. A solid-state imaging device characterized by having a low impurity concentration.