JPH04367260A - Multi-chip semiconductor device - Google Patents

Abstract

PURPOSE:To provide a structure and IC chip for a multi-chip semiconductor device which can prevent the malfunction of the device caused by the heat produced when the device is operated and can also prevent the performance deterioration of the IC chip itself. CONSTITUTION:This multi-chip semiconductor device is assembled by using an IC chip 1 for a multi-chip semiconductor device with a heat radiating bump on the surface and multi-chip semiconductor device assembling frame 4 provided with heat radiating patterns 5 and 5'.

Description

[Detailed description of the invention]

0001

FIELD OF INDUSTRIAL APPLICATION The present invention relates to semiconductor devices, and particularly to film carrier TCP (Tape Carrier).
The present invention relates to a large-capacity multi-chip semiconductor device assembly frame and a multi-chip cooling method using a semiconductor device (IC chip).

0002

2. Description of the Related Art Semiconductor memories are widely used in information equipment such as large computers, workstations, personal computers, and word processors. As the performance of these devices continues to improve and the number of products continues to expand, demand for the semiconductor memory used in these devices is expected to increase at an accelerated pace. On the other hand, in devices that require large-capacity memory, the mounting area occupied by the semiconductor memory within the device tends to increase, and this is the biggest factor preventing devices from becoming smaller and lighter. One way to solve this problem is to increase the memory capacity per chip by increasing the integration of elements within IC chips, which has been strongly promoted in the past. Another method is to mount packaged memory modules on a printed wiring board at high density.
As described in the publication, a plurality of IC chips are stacked in the thickness direction to achieve high density.

Among these, high integration of elements within IC chips has reached a new situation that cannot be solved by extending conventional technology, and requires the development of new technology and production equipment. A high-density mounting method on a printed circuit board is ZIP (Zigzag-in-line Packa) for double-sided mounting of high-density small modules.
ge) Parts are being adopted, and one chip is one
As far as packaging modules are used, it is difficult to significantly increase the density any further. On the other hand,
A method of three-dimensionally stacking a plurality of IC chips in the thickness direction is very advantageous, and various methods have been proposed. In the conventional method, for example, when multiple IC chips are operated simultaneously by stacking high-speed logic circuit elements or high power consumption memories, Japanese Patent Application Laid-Open No. 62-261166 and Utility Model Application No. 63-36052 As stated in the publication, no consideration has been given to cooling IC chips that generate a large amount of heat, and the heat generated during operation increases the temperature of the entire multichip semiconductor device, causing malfunctions and damaging the semiconductor elements themselves. There was a problem that caused performance deterioration.

0004

SUMMARY OF THE INVENTION An object of the present invention is to provide a structure of a multi-chip semiconductor device and an IC chip for the multi-chip semiconductor device, which eliminates the disadvantages of the prior art described above.

[0005]

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a heat dissipation pattern on each opposing side of a frame for a multi-chip semiconductor device, performs a metallization process on the surface, and Connect the leads for the purpose of extracting heat from the IC chip, and then stack them to establish thermal conductivity between each layer so that the heat is conducted from the top layer frame and bottom layer heat dissipation pattern to the motherboard (module board). I made it.

[0006]

[Operation] That is, in a multi-chip semiconductor device formed by stacking two or more film carrier tape semiconductor devices TCP in which an IC chip is electrically connected to a film carrier tape via an assembly frame, the chip surface is used as an IC chip. In addition to using bumps for bonding leads dedicated to heat dissipation, a heat dissipation pattern is provided on a pair of sides of the assembly frame, and the bumps and heat dissipation patterns provided for the purpose of dissipating the heat generated by the IC chip are used. It is now possible to take it out using a dedicated lead and heat dissipation pattern. This can prevent the temperature of the entire multi-chip semiconductor device from rising due to heat generated during operation, so that malfunction of the device can be prevented, performance deterioration of the IC chip itself can be prevented, and stable operational performance can be obtained.

[0007]

[Embodiment] An embodiment of the present invention will be described below with reference to FIGS. 1 to 7.
This is explained by:

FIG. 1 is a front view of a multi-chip semiconductor device according to an embodiment of the present invention. FIG. 2 shows a state in which a multi-chip semiconductor device according to an embodiment is mounted on a wiring board.
FIG. 2 is a cross-sectional view of the multi-chip in FIG. 1 taken along line II-II. FIG. 3 is a sectional view taken along the line III--III in the same way as FIG. 2. FIG. 4 is a plan view of an assembly frame for a multi-chip semiconductor device used in an embodiment of the present invention. FIG. 5 shows an I for a multi-chip semiconductor device used in an embodiment of the present invention.
FIG. 3 is a plan view showing the arrangement of electrode pads on the surface of the C chip. FIG. 6 is a plan view of a film carrier tape used in one embodiment of the present invention. FIG. 7 is a plan view of a multi-chip semiconductor device according to the prior art.

In FIG. 1, a multi-chip semiconductor device 1
00 is a polyimide film 8 shown in FIG. 6, provided with a sprocket 9, a device hole 13, leads 11, 11' for signal input/output and power supply, and leads 12, 12' for heat dissipation, respectively. IC shown in 5
A chip 1 is mounted, and leads 11, 11 are connected to bumps 2, 2' and 3, 3' provided on the chip surface for signal input/output and power supply, and for heat dissipation only, separated from active elements in the IC chip. ', 12, 12' are connected by bonding and made into TCP, and the leads of the outer lead holes 10, 10' corresponding to the outer lead part shown in FIG. 6 and the glass epoxy multi-chip semiconductor device assembly frame shown in FIG. A plurality of wiring electrode patterns 6, 6' and heat dissipation patterns 5, 5' are connected, and a plurality of them are stacked.

As shown in FIGS. 2 and 3, the cross-sectional structure of the multi-chip semiconductor device 100 includes through holes 7, which are provided in a portion of the wiring electrode patterns 6, 6' of the assembly frame 4.
7' and heat dissipation exclusive patterns 5, 5'. Interlayer connection here was performed by general reflow solder-solder connection due to metallization.

[0011] Each IC chip 1 in the multi-chip semiconductor device 100 generates a large amount of heat during operation. This heat is IC
Conducting inside the chip 1, lead 11→through hole 7→wiring pattern 14 of module board→module board 15
There is a heat radiation path from the lead 12 to the heat radiation pattern 5 to the module board wiring pattern 14 to the module board 15, or a heat radiation path from the surface of the IC chip 1 to the air. At this time, there is a heat dissipation effect of approximately 10° C. to 20° C. in the path from lead 11 → through hole 7 → wiring pattern 14 of module board → module board 15.

Unlike the input/output leads 11 and 11', there is no need to consider the problem of short circuits between adjacent leads in the path of lead 12 → heat dissipation pattern 5 → module board wiring pattern 14 → module board 1. It is possible to share the patterns 5, 5' dedicated to heat radiation on the sides, and it is possible to increase the shape (area) of the bumps (3, 3') on the surface of the IC chip, making it possible to widen the leads 12, 12' dedicated to heat radiation. The heat dissipation effect will further increase, and it is expected that the temperature will reach approximately 30°C or higher.

[0013] As a result, the heat generated from the IC chip 1 during operation is actively cooled down, and the temperature rise of the multi-chip semiconductor device can be suppressed to about 80°C or less, resulting in safe operation performance and high-density A multi-chip semiconductor device 100 can be realized.

[0014]

[Effects of the Invention] According to the present invention, heat generated from an IC chip during operation can be efficiently radiated to the motherboard via the dedicated heat radiation leads and heat radiation patterns at each stage.
Since the operating temperature can be suppressed to about 80° C. or less, it is possible to prevent the temperature of the multi-chip semiconductor device from rising and to obtain stable operating performance without causing malfunction of the device. Further, rapid performance deterioration of the IC chip in a heated state can be prevented, and operational performance can be ensured for a long period of time.

[Brief explanation of drawings]

FIG. 1 is a front view of a multi-chip semiconductor device according to an embodiment of the present invention;

[Fig. 2] Cross-sectional view taken along the line II-II in Fig. 1;

[Fig. 3] Cross-sectional view taken along arrow III-III in Fig. 1;

FIG. 4 is a plan view of an assembly frame for a multi-chip semiconductor device according to an embodiment of the present invention;

FIG. 5 is a plan view of an IC chip for a film carrier semiconductor device according to an embodiment of the present invention;

FIG. 6 is a plan view of a film carrier tape for a film carrier semiconductor device according to an example;

FIG. 7 is a plan view of a conventional multi-chip semiconductor device.

[Explanation of symbols]

100: Multi-chip semiconductor device, 1: IC chip, 2: Metal bump, 3: Metal bump, 4: Glass epoxy assembly frame, 5: Heat radiation only pattern, 6: Electrode pattern, 7: Through hole, 8: Film carrier tape, 9: Sprocket, 10: Outer lead hole, 11.: Signal input/output lead,

Claims (3)

[Claims] 1. A multi-chip semiconductor device in which film carrier semiconductor devices each having a semiconductor chip electrically connected to a film carrier tape are stacked together via an assembly frame, wherein one side of a pair of opposing sides of the assembly frame is provided. An assembly frame characterized by having a metal heat dissipation pattern with conductivity on the front and back surfaces on the outer side wall. Claim 2: Electrode metal bumps dedicated to heat radiation are provided on the outer periphery of the surface of the semiconductor element facing the pair of sides provided with the heat radiation pattern, separated from the active element and arranged symmetrically. A semiconductor element for a film carrier semiconductor device characterized by: 3. The multi-chip according to claim 2, which is assembled by stacking and stacking the TCP assembled using the semiconductor element for the film carrier semiconductor device and the film carrier tape and the assembly frame for the multi-chip semiconductor device. Semiconductor equipment.