JPH04367167A - Method for regenerating horizontal synchronous signal including time variation - Google Patents

Abstract

PURPOSE:To regenerate a horizontal synchronous signal stably and firmly by using a horizontal synchronous timing signal obtained by differentiating an input horizontal synchronous signal in the latter half of the field period in which the signal waveform becomes stable to give an appropriate amount of time variation to the output signal. CONSTITUTION:In a synchronizing section A, an input image signal is led to a differential circuit 2 via a lowpass filter 1, and the horizontal synchronous timing signal that is obtained from the differential waveform via a slice circuit 3 is let the differential waveform signal that represents a rise timing via a delay circuit 4. Next, the output from the synchronous separate circuit 5 is supplied to a gate generating circuit 8 via a vertical synchronous extracting circuit 6b to form a gate signal corresponding to the latter half period of the field period, and the gate signal is applied to a gate 9. Thus, even for a large time variation of the input horizontal synchronous signal that frequently occurs in a nationwide hookup or the like, the horizontal synchronous signal is regenerated stabley and firmly as specified.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention is useful for synchronizing the synchronization board of one's own station with the synchronization signal of the input image signal from another station, such as during nationwide broadcasting of television broadcasts. Regarding a method for reproducing a horizontal synchronization signal that includes time fluctuations, which enables the reproduction of a horizontal synchronization signal according to the standard even if fluctuations are included, the American Electronics Industries Association has, in particular,
It is possible to stably and reliably reproduce synchronization signals conforming to the RS-170A standard established in 1977 with a simple circuit configuration.

0002

[Prior Art] A conventional method for easily reproducing a stable horizontal synchronization signal by reducing the time fluctuation from a horizontal synchronization signal that includes time fluctuation in an input image signal is to compare the phase with the input horizontal synchronization signal. It was common practice to apply automatic frequency control (AFC) to the oscillator for generating the reproduced horizontal synchronizing signal according to the results of the analysis. In addition, the following is a conventional method for easily eliminating the influence of input horizontal synchronization signals that include slight time fluctuations and reproducing synchronization signals that comply with the above-mentioned RS-170A standard. There is. In other words, in the RS-170A standard, the phase relationship between the horizontal synchronization signal and the color subcarrier is within ±40 degrees expressed in terms of the phase of the color subcarrier, and ±31 nanoseconds (n
s), whereas in the conventional simple reproduction method, the amount of time shift of the input horizontal synchronizing signal is expressed as the phase of the color subcarrier, and it is 0 to within ±135°. The system reproduces a synchronization signal that conforms to the RS-170A standard in response to time fluctuations exceeding ±135 degrees, and in reality, it reproduces a synchronization signal that is four times the color subcarrier frequency fSC. For example, a CX-7930A synchronization signal generator, which is expressed as a reference clock having a frequency of 14.3 MHz, that is, a 4 fSC clock, and ignores time fluctuations of ±1 clock, was used.

0003

[Problems to be Solved by the Invention] However, in order to reproduce a horizontal synchronization signal that conforms to the RS-170A standard when the input horizontal synchronization signal supplied to the synchronization reproducing circuit includes a certain degree of large time fluctuation, it is necessary to According to conventional playback methods, it is necessary to use a complicated and expensive digital time base collector, that is, a time base correction circuit. was impossible to reproduce. Moreover, large time fluctuations are included in the input horizontal synchronization signal from other stations supplied to the own station's synchronization board, which frequently occurs on a daily basis when broadcasting television broadcasts nationwide. In such a case, it has been a conventional problem to be able to stably and reliably reproduce a horizontal synchronization signal that conforms to the standard using a simple reproduction method.

0004

[Means for Solving the Problems] It is an object of the present invention to solve the above-mentioned conventional problems and to minimize the time fluctuation within the range that can actually exist in the horizontal synchronization signal in the input image signal supplied to the synchronization reproduction circuit. Even if the input horizontal synchronization signal contains
It is an object of the present invention to provide a horizontal synchronization signal reproducing method that can reproduce a horizontal synchronization signal conforming to the 70A standard. A method for reproducing a horizontal synchronizing signal according to the present invention, which achieves such an object, generates a differential waveform signal indicating a rising edge of a horizontal synchronizing signal in a period excluding a vertical synchronizing signal period of an input image signal and a subsequent almost first half field period. As a signal indicating the timing of horizontal synchronization signal reproduction, via circuit means exhibiting a parameter-variable hysteresis characteristic that imparts a desired amount of time variation to the output signal in response to time variation exceeding a predetermined amount of delay in the input signal; It is characterized by synchronous playback.

[0005] That is, in order to achieve the above-mentioned purpose,
The most suitable method is as follows. One method is to prevent time fluctuations from occurring in the output horizontal synchronization signal of the synchronization regeneration circuit driven by the input horizontal synchronization signal, even if the input horizontal synchronization signal includes time fluctuations. The timing at which the synchronization reproducing circuit generates the reproduced horizontal synchronization signal in response to the input horizontal synchronization signal has a delay width that can ignore and absorb the time fluctuation included in the input horizontal synchronization signal within an appropriate range. The purpose is to provide hysteresis characteristics. In other words, the elapsed time required for the regenerated output horizontal synchronization signal of the synchronization regeneration circuit to follow the time fluctuation included in the input horizontal synchronization signal and become synchronized is normally required to be as short as possible. If relatively small time fluctuations within an appropriate range are ignored and only time fluctuations exceeding a predetermined limit are tracked, the playback output will not change even if relatively small time fluctuations occur in the input horizontal synchronization signal. The horizontal synchronization signal maintains the previous timing and does not fluctuate, and the generation timing of the playback output horizontal synchronization signal suddenly enters a new synchronization state only when the time fluctuation on the input side exceeds a limit that cannot be ignored. There is no impact on the elapsed time required to enter the state, resulting in quick synchronization.

Another method for achieving the above-mentioned object is to reduce the time fluctuation contained in the input horizontal synchronization signal supplied to the synchronization reproducing circuit by adjusting the timing deviation that regularly occurs in the input image signal transmission system. For example, it is important to extract as accurately as possible only the synchronous reproducing circuit's input and output signals, such as time fluctuations that occur periodically or temporarily due to the presence of the vertical synchronization signal waveform. The purpose is to extract timing information for horizontal synchronization signal reproduction while excluding time fluctuations as much as possible, and it is preferable to set the delay amount of the hysteresis characteristic as small as possible.

[0007]

[Function] Therefore, if the playback method of the present invention is applied when synchronizing the synchronization board of one's own station to the input horizontal synchronization signal from another station during national broadcasting of television broadcasts, etc., the playback method of the present invention can be applied to the case where the synchronization board of the own station is synchronized with the input horizontal synchronization signal from another station. With a simple circuit configuration, stable synchronization between input and output can be achieved in a short time.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be explained in detail below with reference to the drawings. As mentioned above, the main point of the horizontal synchronization signal reproducing method of the present invention is to minimize the time fluctuation of the input horizontal synchronization signal used to control the signal generation timing in the synchronization regeneration circuit, and to make the timing of the input horizontal synchronization signal as accurate as possible. The purpose is to extract the signal and supply it to the synchronous regeneration circuit via a hysteresis characteristic circuit with an appropriate amount of delay.
Before describing embodiments of the present invention, problems in conventional timing extraction of an input horizontal synchronizing signal will be described first.

Conventionally, when extracting the input horizontal synchronizing signal used for timing control of the synchronization reproducing circuit by separating it from the input image signal, the leading edge of the horizontal synchronizing signal waveform is DC-fixed to the reference potential in the synchronization separation circuit system. In this state, a waveform-shaped input horizontal synchronizing signal is obtained by slicing the intermediate potential of the horizontal synchronizing signal waveform using a comparator based on approximately 1/2 of the above-mentioned reference potential. Depending on the separation of the horizontal synchronization signal waveform, when the average DC potential of the input image signal waveform changes suddenly, the leading edge of the input horizontal synchronization signal waveform temporarily deviates from the reference potential, and as a result, the input horizontal synchronization The slice position of the signal waveform was shifted, and even though there was no temporal variation, time variation occurred in the separated horizontal synchronization signal. Therefore, since the average DC potential changes rapidly during the period of the vertical synchronization signal in the image signal, fluctuations in the rise timing of the separated horizontal synchronization signal occur temporarily, and this timing shift occurs almost during the subsequent field period. You will not fully recover until the first half has passed. In this way, the amount of time fluctuation of the apparent input horizontal synchronization signal that occurs in the field period is about 100 nanoseconds, and in the digital synchronization reproduction system that operates at a period of 70 nanoseconds using the standard 4fSC clock mentioned above, the reproduction output Timing instability will occur in the horizontal synchronization signal.

As described above, the image signal waveform in the vertical synchronizing signal period and the subsequent first half of the field contains inherent instability, and in the conventional mode of synchronization separation, this instability is caused by the horizontal synchronizing signal. It appears in the form of time fluctuation, and the closer it is to the vertical synchronization signal period, the larger the time fluctuation is.
When a television signal transmission system includes a synchronization separation circuit or a synchronization signal waveform shaping circuit of the above-described aspect, it is best to treat the incoming input horizontal synchronization signal as including such time fluctuations. suitable.

Furthermore, since the reference clock mentioned above in the digital synchronization reproducing circuit is generated based on the color burst signal, in the vertical synchronization signal period and the subsequent field period when the color burst signal is missing, It is preferable to consider that the reference clock itself includes timing instability. In the horizontal synchronization signal reproducing method of the present invention, in order to solve the problem of conventional input horizontal synchronization signal timing extraction, the timing extraction of the input horizontal synchronization signal is performed during a period where there is a high risk of including apparent time fluctuations. In addition, the horizontal synchronization timing is extracted only in the latter half of the field, and the rising differential waveform of the input horizontal synchronization signal is extracted as a timing signal to avoid the appearance of time fluctuations in conventional horizontal synchronization separation. There is.

In the horizontal synchronization signal reproducing method of the present invention, only the essential timing information of the input horizontal synchronization signal is extracted as accurately as possible as described above, but the timing of horizontal synchronization signal reproduction based on such timing information is Conventional control methods also had the following problems.

In the horizontal synchronization signal reproducing method, generally, a horizontal synchronization signal conforming to the RS-170A standard is generated by synchronizing it with an input horizontal synchronization signal and driving it with a 4fSC reference clock. However, in the conventional playback method of synchronizing the playback output horizontal synchronization signal with the input horizontal synchronization signal using automatic frequency control (AFC), it was possible to reduce the time fluctuation contained in the input signal, but it was not possible to completely reduce the time fluctuation contained in the input signal. It could not be removed. Also, 4fSC
In the conventional reproduction method, which ignores time fluctuations of ±1 clock expressed in clocks, it has been possible to ignore and absorb only relatively slight time fluctuations of 70 nanoseconds or less.

Therefore, if the time fluctuation included in the input horizontal synchronizing signal is large to some extent, the generation timing of the reproduced output horizontal synchronizing signal will not be stable with respect to the reference clock, making it impossible to perform stable synchronized reproduction. In addition to playback instability, when the generation timing of the playback output horizontal synchronization signal fluctuates according to the time fluctuation of the input horizontal synchronization signal, the phase relationship between the playback output horizontal synchronization signal and the color subcarrier becomes momentarily stable during playback. The phase inversion of the color subcarrier with respect to the reproduced output horizontal synchronizing signal may have a significant adverse effect on the reproduced image quality.

In the horizontal synchronization signal reproducing method of the present invention, even with timing information accurately extracted from the input horizontal synchronization signal, the input horizontal synchronization signal is Timing information accurately extracted from the synchronization signal is applied to the synchronization regeneration circuit via a variable-parameter hysteresis characteristic circuit to control its timing.

FIG. 1 shows an example of the configuration of a main part of a horizontal synchronization reproducing circuit device that implements the horizontal synchronization signal regeneration method of the present invention, which focuses on timing information extraction and timing control as described above. FIG. 2 shows an example of how timing information is extracted by differentiating the signal waveform from a horizontal synchronizing signal, and shows an example of how horizontal synchronizing timing information is extracted while avoiding the vertical synchronizing signal period of the input image signal and the subsequent first half period of the field. FIG. 3 shows an example of the operation of the variable parameter hysteresis characteristic circuit inserted when applying the horizontal synchronization timing information extracted from the input image signal to the synchronous reproduction section. and delay width W are both 2fs
FIG. 4 shows a case in which they are independently variable within a range of integral multiples of the c clock, and FIG. 5 shows an example of the operation of the hysteresis characteristic circuit. will be explained in order.

The configuration example of the horizontal synchronization reproducing circuit device according to the method of the present invention shown in FIG.
, 2fSC and 4 phase-locked to the color burst signal.
A phase-locked loop (
PLL) section B, a hysteresis characteristic section C that imparts parameter-variable hysteresis characteristics to the generation timing of a reproduced output horizontal synchronization signal with respect to an input horizontal synchronization signal, and input horizontal synchronization timing information and a reference clock supplied via the hysteresis characteristic section C. The synchronizing signal generating section D generates a horizontal synchronizing signal and related timing signals based on the conventional synchronizing signal.

First, in the synchronization separator A, the input image signal is passed through a low-pass filter (LPF) 1 with a cutoff frequency of about 2 MHz, and guided to a differentiating circuit 2 to differentiate the signal waveform. The differential waveform shown is guided to the slice circuit 3 and the obtained horizontal synchronization timing signal is sliced at an appropriate level, and the obtained horizontal synchronization timing signal is guided to the delay circuit 4, where it is delayed by about 1 μs in order to match the timing with the separated output signal of the synchronization separation circuit 5, which will be described later. Then, the synchronization signal waveform separated by the synchronization separation circuit 5 from the filtered output image signal of the LPF 1 is guided to the horizontal synchronization extraction circuit 6a, and guided to the gate 7 together with the extracted input horizontal synchronization signal waveform, and the above signal processing process is sequentially performed. As shown in the signal waveform at the bottom of FIG. 2, only the differential waveform signal representing the rising timing of the input horizontal synchronizing signal is extracted.

Next, the separated output synchronization signal of the synchronization separation circuit 5 is guided to the vertical synchronization extraction circuit 6b, and the extracted input vertical synchronization signal waveform is supplied to the gate generation circuit 8, thereby generating the vertical synchronization signal period and the subsequent first half of the field. A gate signal corresponding to the period in the latter half of the field is formed and applied to the gate 9, and as shown in the signal waveform of FIG. Take out only.

On the other hand, in the phase-locked loop (PLL) section B, the separated output synchronization signal of the synchronization separation circuit 5 is guided to the burst flag generation circuit 10, which generates a burst flag signal and applies it to the burst extraction circuit 11. The color burst signal is extracted from the image signal and supplied to a phase-locked loop (PLL) circuit 12, which generates 2fSC and 4fSC reference clocks that are phase-locked to the color burst. Of these, 2fSC clock is applied to the latch circuit 13, and the gate The horizontal synchronization rising timing signal of the second half of the field extracted by step 9 is latched and output to RS-1.
70A standard.

Next, in the hysteresis characteristic section C, a synchronization signal generation circuit 23, which is configured in a conventionally well-known manner and generates various synchronization signals and timing signals, such as the aforementioned CX-7930A synchronization signal generator, generates various synchronization signals and timing signals. In addition, a horizontal drive signal whose phase is advanced by a certain amount from the horizontal synchronization signal is supplied in parallel to variable delay circuits 14 and 15, and the horizontal drive signals are each delayed by an appropriate amount.
A delay gate signal and an advance gate signal having rising and falling signal waveforms corresponding to the hysteresis characteristic output change step width T shown in the bottom row of FIG. 5 are supplied to the delay gate signal generation circuit 16 and the advance gate signal generation circuit 17, respectively. is generated and applied to the delay gate 18 and advance gate 20, respectively.

In the delay gate 18, as shown in the right half of FIG. 5, the input horizontal synchronization timing signal from the latch circuit 13 is gated by the delay gate signal from the generation circuit 16, so that the input horizontal synchronization timing signal is delayed. , the input horizontal synchronization timing signal passing through the delay gate 18 is supplied as a horizontal reset signal to the synchronization signal generation circuit 23 via the OR gate 21 to generate a reproduced output horizontal signal whose phase is delayed by more than the desired step width T. Generate a synchronization signal.

On the other hand, in advance gate 20,
As shown in the left half of FIG. 5, the input horizontal synchronization timing signal taken out from the latch circuit 13 via the variable delay circuit 19 with a delay amount corresponding to the delay width W of the hysteresis characteristic is output to the advance gate from the generation circuit 17. The input horizontal synchronization timing signal that passes through the advance gate 20 when the phase of the input horizontal synchronization timing signal is advanced is supplied as a horizontal reset signal to the synchronization signal generation circuit 23 via the OR gate 21. A reproduced output horizontal synchronization signal whose phase is advanced by more than a desired step width T is generated.

[0024] Through the signal processing as described above, in response to an input horizontal synchronizing signal that includes a time fluctuation exceeding the amount of delay W,
Each time such time fluctuation occurs, various predetermined synchronization signals and various timing signals are generated from the synchronization signal generation circuit 23 using the reproduced output horizontal synchronization signal according to the hysteresis characteristics as shown in FIG. 4 as a regular reference timing. Can be done. As described above, the change step width T of the hysteresis characteristic imparted to the horizontal reset signal can be variably adjusted by the variable delay circuits 14 and 15 in accordance with the delay and advance of the input horizontal synchronization signal phase, respectively. , the delay width W of the hysteresis characteristic can also be variably adjusted by the variable delay circuit 19. These variable delay circuits 14, 15, and 19 are all configured so that they can be variably adjusted in steps of one clock of the 2fSC clock in order to make the reproduced output horizontal synchronizing signal comply with the RS-170A standard.

In the method for reproducing a horizontal synchronization signal including time fluctuation according to the present invention, the input horizontal synchronization timing signal that has passed through either the delay gate or the advance gate is supplied to the synchronization signal generation circuit as a horizontal reset signal. When time fluctuation occurs in the horizontal synchronization signal,
If a time variation occurs in the direction of delay, the undelayed horizontal synchronization timing signal that has passed through the delay gate is applied to the synchronization generation circuit as a horizontal reset signal, and if a time variation occurs in the direction of advance, The delayed horizontal synchronization timing signal that has passed through the advance gate is applied to the synchronization generation circuit as a horizontal reset signal, and as a result, hysteresis characteristics are imparted to the horizontal reset signal that drives the synchronization generation circuit.

Note that the timing generation circuit 22 in the hysteresis characteristic section C in the configuration example shown in FIG. signal, horizontal drive signal and 2fSC clock.

[0027]

Effects of the Invention As is clear from the above description, according to the present invention, when synchronizing the synchronization board of one's own station with the input horizontal synchronization signal from another station in nationwide television broadcasting, the input horizontal Even when the synchronization signal has the maximum time variation that can actually exist, the RS-2 can be stably and reliably detected using a simple circuit device without using a complicated and expensive digital time base collector.
It is possible to easily reproduce high-quality synchronization signals that meet the 170A standard, and it has the special effect of easily achieving the simple reproduction of synchronization signals that has traditionally been a problem when broadcasting national television broadcasts. .

Note that the maximum time variation that can actually exist in the input synchronization signal is, for example, about 200 ns pp for a television signal broadcast nationwide. In addition, a circuit device with a simple configuration means that the configuration is not particularly complex compared to the scale of the circuit device conventionally required for synchronous playback, and it is possible to use various circuits to improve performance. It is the conventional practice to add .

Furthermore, the main point of the horizontal synchronizing signal reproducing method of the present invention is the adoption of a hysteresis characteristic with variable parameters, and its effects are as follows. One of the effects achieved by the parameter-variable hysteresis characteristic is that the output change step width and input delay width of the hysteresis characteristic can be variably adjusted and set as desired, depending on the magnitude of time fluctuation of the input horizontal synchronization signal. The step width and delay width of the hysteresis characteristic can be adjusted appropriately and optimized according to the usage status of the synchronization regeneration circuit device. If the clock is set to an even multiple of 2fSC, when a time fluctuation occurs in the reproduced output horizontal synchronization signal, the phase relationship between the horizontal synchronization signal and the color subcarrier will instantaneously reverse by 180° to the opposite phase. This means that the negative effects of the relative phase inversion that conventionally occurred can be eliminated.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of the configuration of a horizontal synchronization signal reproducing device according to the method of the present invention.

FIG. 2 is a signal waveform diagram showing an example of a mode of timing information extraction by differentiating an input horizontal synchronizing signal waveform.

FIG. 3 is a signal waveform diagram illustrating an example of how horizontal synchronization timing information is extracted in the second half of the field of an input image signal.

FIG. 4 is a characteristic diagram showing an example of the hysteresis characteristic of the time variation of the reproduced output horizontal synchronization signal corresponding to the time variation of the input horizontal synchronization signal.

FIG. 5 is a signal waveform diagram showing an example of an operation mode of a hysteresis characteristic circuit in horizontal synchronization signal reproduction.

[Explanation of symbols]

A Synchronization separation section B PLL section C Hysteresis characteristic section D Synchronization signal generation section 1 LPF 2 Differentiation circuit 3 Slice circuit 4 Delay circuit 5 Sync separation circuit 6a Horizontal synchronization extraction circuit 6b Vertical synchronization extraction circuit 7, 9 Gate 8 Gate signal generation circuit 10 Burst flag generation circuit 11 Burst extraction circuit 12 PLL circuit 13 Latch circuit 14, 15, 19 Variable delay circuit 16 Delay gate signal generation circuit 17 Advance gate signal generation circuit 18 Delay gate 20 Advance gate 21 OR gate 22 4-field reset timing signal generation Circuit 23 Synchronous signal generation circuit

Claims (1)

[Claims] Claim 1: A differential waveform signal indicating the rising edge of the horizontal synchronizing signal in a period excluding the vertical synchronizing signal period of the input image signal and the approximately first half field period of the input image signal is used as a signal indicating the timing of reproducing the horizontal synchronizing signal of the input image signal. A horizontal signal including time variation characterized in that synchronized reproduction is performed through circuit means exhibiting a parameter-variable hysteresis characteristic that imparts a desired amount of time variation to the output signal in response to time variation exceeding a predetermined delay amount. How to play the sync signal.