JPH04367107A - Photodetecting circuit - Google Patents

Abstract

PURPOSE:To obtain the higher open loop gain by reducing the deterioration of a band due to effect of the capacity. CONSTITUTION:A cascode circuit 1 amplifying the output of a photodiode PD with a transistor Q1 with an emitter grounded and receiving the output of the collector with the base ground. An emitter follower circuit 2 is connected to the output of this cascode circuit 1. A feedback circuit 3 performing the feedback of the part of the output of the emitter follower to the base of the first stage transistor Q1 of the cascode circuit 1. A bias resistance rb1 and a forward bias diode Db1 are serially connected between the base and the earth of the emitter-grounded transistor Q1 of the cascode circuit 1.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photodetection circuit used in optical memories, laser beam printers, etc.

0002

2. Description of the Related Art Conventionally, increasing the speed of photodetection circuits has been an important point for optical application equipment. On the other hand, in photodetection circuits using feedback, stable operation of the circuit is also required by increasing the open loop gain. However, in order to satisfy the two conditions mentioned above at the same time, the collector resistance in the emitter grounding must be small in the former case and large in the latter case, which creates a mutually contradictory relationship. Yes, it is a problem.

As a first conventional example, FIG. 7 shows a typical circuit having the above-mentioned problems. In this case, the output of the emitter-grounded collector of the transistor Q1 is directly impedance-converted by the capacitor Q2 as an emitter follower, and the feedback is performed by the resistor Rf. In this case, since there is a capacitance Cbc between the base and collector of Q1, collector resistance Rc1 cannot be set to a large value in order to increase the speed. If Rc1 is made large, that is, Rc1/Re1 is made large, the feedback within Q1 due to Cbc becomes large, resulting in the mutually contradictory relationship as described above.

FIG. 8 shows a second conventional example. In this case, Rb1, together with Rf, biases the base of Q1, but normally in such a circuit configuration, the offset of Vout has a negative coefficient with respect to temperature (however, Rb1 (This is the case when the temperature coefficients of and Rf are equal).

[0005] In addition, there are other conventional examples related to the above-mentioned problems, such as those disclosed in JP-A-1-264313 and JP-A-2-84803. Explanation will be omitted.

[0006]

The first conventional example is a circuit example in which a cascode connection is not used. in this case,
Q1 has its emitter grounded and its collector side output is directly received by Rc1, so if a large Rc1 is used,
Deterioration of response due to Cbc becomes a problem, and it is not suitable for circuits that require a large Rf.

In the case of the second conventional example, the circuit configuration is such that the offset of Vout has a negative coefficient with respect to temperature, so it is not suitable for amplification from a DC power source.

Furthermore, these two circuits (see FIGS. 7 and 8) both have large offset temperature coefficients and are easily affected by the capacitance between the terminals of the feedback resistor, so it is difficult to obtain sufficient bandwidth. The problem is that it cannot be taken.

[0009]

[Means for Solving the Problem] In the invention as set forth in claim 1, a cascode circuit is provided which amplifies the output of a photodiode with a transistor whose emitter is grounded and receives the output of the collector of the transistor with a grounded base. An emitter follower circuit is connected to the output side, and a feedback circuit is provided that feeds back a part of the output of the emitter follower circuit to the base of the transistor in the first stage of the cascode circuit, and the base of the transistor whose emitter is grounded is connected to the base of the transistor of the cascode circuit. A bias resistor and a forward bias diode were connected in series between the ground and the ground.

In the invention as claimed in claim 2, in the invention as claimed in claim 1, a resistor is connected to the collector side of the transistor of the emitter follower circuit, and a signal taken out from the output on the emitter side of the transistor via the resistor and the The output from the collector side of the transistor was set to be fed back to the base of the transistor in the first stage of the cascode circuit along with a signal taken out via a capacitor.

[0011]

[Operation] In the invention as claimed in claim 1, by providing the cascode circuit and the emitter follower circuit, deterioration of the band due to the influence of the capacitance between the base and collector of the transistor in the first stage is eliminated, and moreover, Large voltage gain due to resistor connected to collector (
In addition, since it is possible to obtain even deeper feedback using a feedback circuit, it is possible to further stabilize the operation of the entire circuit system. By combining resistors in the IC, it is possible to further reduce the temperature coefficient of offset.

In the invention as claimed in claim 2, the output on the emitter side of the emitter follower circuit is fed back to the base of the first stage transistor via a resistor and the output on the collector side is fed back to the base of the first stage transistor, thereby further improving high-speed response. becomes possible.

[0013]

[Embodiment] A first embodiment of the present invention will be explained based on FIGS. 1 and 2. Figure 1 shows the photodiode output I/
It shows the circuit configuration of the first stage amplifier for V conversion. That is, a cascode circuit 1 including transistors Q1 and Q2 is connected to the output side of the photodiode PD. A bias resistor rb is connected between the base of the transistor Q1 whose emitter is grounded and the ground of this cascode circuit 1.
1 and a forward bias diode Db1 are connected in series. An emitter follower circuit 2 is connected to the output side of the cascode circuit 1. A part of the output of this emitter follower circuit 2 is supplied to the cascode circuit 1.
A feedback circuit 3 is connected to provide feedback to the base of the first stage transistor Q1. In this case, the feedback circuit 3 outputs a signal taken out through the resistor rfn connected to the emitter side of the transistor Q3 and a signal taken out through the capacitor Cfp connected to the collector side of the transistor Q3 to the cascode circuit 3. It is designed to be fed back to the base of the first stage transistor Q1.

In this configuration, the PD is reverse biased toward the Vcc side, and its anode side is connected to the base of the first stage Q1 of the cascode circuit 1 composed of two NPN transistors Q1 and Q2. ing. In the second stage Q2 of the cascode connection, the base is biased by resistors rb2 and rbb2, and the AC
Generally, it is grounded with a sufficiently low impedance Cb2. The third stage Q3 from the collector side of Q2 is an emitter follower, and the rfn
Negative feedback is provided from the collector side via Cfp, and positive feedback is provided from the collector side via Cfp, which is connected to the base of the first stage Q1. In this case, the base bias of Q1 is the negative feedback resistance r
fn, bias resistor rb1, and bias diode Db1.

The current output from the PD is amplified by the grounded emitter of Q1, is input at low input impedance due to the grounded base of Q2, is converted to high impedance, and is output. In emitter grounding, the response speed is affected when the load impedance on the collector side is large, but in this case, the cascode connection operates with low impedance between Q1 and Q2, so the response speed of Q1 is can be good. Further, the base-grounded output of Q2 is lowered in voltage by a resistor rc2 and taken out as a voltage signal, and the impedance is converted by the emitter follower of Q3 and output. Therefore, even if a large resistor is inserted into rc2 due to the base being grounded, Q2 responds at high speed, resulting in a high gain and excellent high speed compared to the case where Q2 is not provided, that is, only the emitter is grounded by Q1.

In addition, in feedback, r in FIG.
fn has a small inter-terminal capacitance Cfn, which lowers the closed loop gain in the high range, resulting in a narrow band. Therefore, a small resistance r is placed on the collector side of Q3.
By connecting c3 and applying positive feedback via the capacitor Cfp, it becomes possible to compensate for the drop in gain in the high range.

Furthermore, each resistor and transistor has a temperature coefficient, which has a particularly negative effect on offset in actual applications.
By biasing , the temperature coefficient of the offset of the output signal of this circuit can be adjusted simply by selecting the magnitude of rb1. Furthermore, if an emitter follower of the transistor Q4 is attached as shown in FIG. 2 before Q1, one or more bias diodes Db may be inserted to compensate together with the resistor r.

As a specific example, if we give numerical values and compare them with the conventional example, in the aforementioned second conventional example (see FIG. 8), rf (= rfn) = 100 kΩ, and the inter-terminal capacitance Cf of that rf If (=Cfp)=0.1pF, the band f
The value of c is at best fc=30MHz. On the other hand, in the present embodiment shown in FIG. 1, by applying positive feedback from the collector side of Q3, compensation for fc = 100 MHz or more can be performed.

Here, a specific example based on FIG. 1 will be further explained using numerical values. The capacitance between all resistor terminals is 0.1
pF, Vcc=12v, rb1=10.5kΩ, rc2
=56kΩ, rc3=100Ω, re3=10kΩ, r
fn=100kΩ, Cfp=9pF, Cb2=10μF
, Cpd=3pF (27°C, temperature coefficient of resistance 2200
ppm/°C), the band fc is fc≒70MHz, and the transimpedance is 93kΩ.On the other hand, when rc3=0Ω and Cfp=0pF and no compensation is made, fc≒20MHz.

[0020] Also, rb1=10kΩ, 10.5kΩ,
If it is 11 kΩ, the value of the offset voltage of Vout will be as shown in Table 1 below for each temperature T°C.

[0021]

[Table 1]

[0022] As a result, when rb1=10.5kΩ,
It can be seen that the temperature change in the offset of Vout becomes very small.

Next, a second embodiment of the present invention will be explained based on FIG. Here, Q3 used in the emitter follower is a transistor of opposite polarity, i.e. Q1
, Q2 are NPN transistors, Q3 is PNP
This shows the circuit configuration when it is composed of transistors. In this case as well, as in FIG. 1, the band can be further widened by inserting Cfn from the collector side for positive feedback.

Next, a third embodiment of the present invention will be explained based on FIG. 4. Here, transistors Q1, Q2, Q
This corresponds to FIG. 8 in the case where all of 3 are constructed of PNP. In this case, as in FIG. 1, positive feedback can be applied to widen the band, or temperature compensation can be performed using a diode and a resistor.

Next, a fourth embodiment of the present invention will be explained based on FIG. 5. Here, the circuit configuration is shown when the photodetector PD is connected to the ground side. In this case, in order to apply a large reverse bias to the PD, it is necessary to
The emitter follower transistor Q4 (
Either several stages (only one stage is shown in FIG. 6) are connected, or several diodes such as De1 are connected to the emitter side of Q1. Such an element connection can be inserted into the positive feedback circuit shown in Figure 1, but since PD is connected between the base and ground, a resistor re1 and a diode De1 are connected to the emitter side of Q1 instead. and connect it. However, in that case, increasing the resistance re1 will reduce the voltage gain at Q2, so
Care must be taken as it will be difficult to provide sufficient compensation.

[0026]

According to the invention as claimed in claim 1, a cascode circuit is provided which amplifies the output of a photodiode using a transistor whose emitter is grounded and receives the output of the collector of the transistor with a grounded base. A feedback circuit is provided to connect a follower circuit and feed back part of the output of the emitter follower circuit to the base of the first stage transistor of the cascode circuit, and between the base of the transistor whose emitter is grounded in the cascode circuit and the ground. Since the bias resistor and the forward bias diode are connected in series, the provision of the cascode circuit and emitter follower circuit reduces the band width due to the effect of the capacitance between the base and collector of the first stage transistor. Eliminates degradation and has large voltage gain (open loop gain) due to the resistor connected to the collector of the first stage transistor
In addition, since it is possible to apply even deeper feedback using a feedback circuit, it is possible to further stabilize the operation of the entire circuit system. By combining these, the temperature coefficient of offset can be further reduced.

According to the second aspect of the invention, a resistor is connected to the collector side of the transistor of the emitter follower circuit, and a signal obtained from the output on the emitter side of the transistor via the resistor and an output on the collector side of the transistor are connected to a capacitor. Since it is set to feed back the signal taken out through the cascode circuit to the base of the first stage transistor of the cascode circuit, the emitter side output of the emitter follower circuit is connected to the first stage transistor through a resistor and the collector side output is connected to the base of the first stage transistor. By providing feedback to the base of the system, it is possible to further improve high-speed response.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a case where an emitter follower circuit is provided in front of the first stage transistor of the cascode circuit of FIG. 1;

FIG. 3 is a circuit diagram showing a second embodiment of the present invention.

FIG. 4 is a circuit diagram showing a third embodiment of the present invention.

FIG. 5 is a circuit diagram showing a fourth embodiment of the present invention.

FIG. 6 is a circuit diagram showing a modification of the fourth embodiment.

FIG. 7 is a circuit diagram showing a first conventional example.

FIG. 8 is a circuit diagram showing a second conventional example.

[Explanation of symbols]

1 Photodiode 2 Emitter follower circuit 3 Feedback circuit PD Photodiode Q1 Transistor Q3 Transistor rb1 Bias resistor Db1 Forward bias diode rc3
Resistor rfn Resistor Cfp Capacitor

Claims (2)

[Claims] Claim 1: A cascode circuit is provided in which the output of the photodiode is amplified by a transistor whose emitter is grounded, and the output of the collector thereof is received by a grounded base, and an emitter follower circuit is connected to the output side of the cascode circuit. A feedback circuit is provided for feeding back part of the output of the cascode circuit to the base of the first stage transistor of the cascode circuit, and a bias resistor and a forward bias diode are provided between the base of the transistor whose emitter is grounded and the ground of the cascode circuit. A photodetection circuit characterized in that a photodetection circuit is connected in series with a photodetection circuit. 2. A resistor is connected to the collector side of the transistor of the emitter follower circuit, and a signal is obtained from the output from the emitter side of the transistor via the resistor, and a signal is obtained from the output from the collector side of the transistor via the capacitor. 2. The photodetection circuit according to claim 1, wherein the photodetection circuit is configured to be fed back to the base of the first stage transistor of the cascode circuit.