JP3538040B2 - Light receiving circuit - Google Patents
Light receiving circuitInfo
- Publication number
- JP3538040B2 JP3538040B2 JP30322598A JP30322598A JP3538040B2 JP 3538040 B2 JP3538040 B2 JP 3538040B2 JP 30322598 A JP30322598 A JP 30322598A JP 30322598 A JP30322598 A JP 30322598A JP 3538040 B2 JP3538040 B2 JP 3538040B2
- Authority
- JP
- Japan
- Prior art keywords
- light receiving
- amplifier
- tuning circuit
- output
- receiving circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Amplifiers (AREA)
- Optical Communication System (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】本発明は受光回路に関し、さ
らに詳細には光を受光する半導体受光素子に流れる電流
を取り出して増幅する受光回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light receiving circuit, and more particularly, to a light receiving circuit for extracting and amplifying a current flowing through a semiconductor light receiving element for receiving light.
【０００２】[0002]
【従来の技術】従来のこの種の受光回路は、図２に示す
ように、例えば赤外光を受光する半導体受光素子として
のＰＩＮフォトダイオード１にコイル２を直列に接続し
て、ＰＩＮフォトダイオード１の端子間静電容量とコイ
ル２ととからなる同調回路３形成し、同調回路３の出力
をエミッタ接地のトランジスタ４からなる増幅器５に供
給して増幅し、トランジスタ４のコレクタから増幅出力
を取り出している。図２において符号７はデカップリン
グコンデンサを示し、符号８は結合コンデンサを示す。2. Description of the Related Art As shown in FIG. 2, a conventional light receiving circuit of this type includes a PIN photodiode 1 as a semiconductor light receiving element for receiving infrared light and a coil 2 connected in series, for example. A tuning circuit 3 comprising a capacitance between terminals 1 and a coil 2 is formed, and the output of the tuning circuit 3 is supplied to an amplifier 5 comprising a transistor 4 having a common emitter and amplified. I'm taking it out. In FIG. 2, reference numeral 7 denotes a decoupling capacitor, and reference numeral 8 denotes a coupling capacitor.
【０００３】この際、使用する信号の帯域幅によって、
同調回路３のＱを低下させる必要が生ずる。これは、例
えば伝送周波数が４．１ＭＨｚ、信号占有帯域幅１ＭＨ
ｚと広帯域な信号を使うとき、ＰＩＮフォトダイオード
１とコイル２による同調回路３のＱではＱが高すぎて信
号を伝送できないためである。At this time, depending on the bandwidth of the signal to be used,
It becomes necessary to reduce the Q of the tuning circuit 3. This means, for example, that the transmission frequency is 4.1 MHz and the signal occupied bandwidth is 1 MHz.
This is because, when a signal with a wide band of z is used, Q of the tuning circuit 3 including the PIN photodiode 1 and the coil 2 is too high to transmit a signal.
【０００４】このために、使用する信号帯域幅により同
調回路３のＱを低下させる必要がでてくる。そこで、図
２に示すように、トランジスタ４と共に増幅器５を構成
するバイアス抵抗Ｒｂを同調回路３のＱを低下させる抵
抗としたり、さらに同調回路３内に抵抗６を設けたりし
ている。For this reason, it is necessary to lower the Q of the tuning circuit 3 depending on the signal bandwidth to be used. Therefore, as shown in FIG. 2, the bias resistor Rb constituting the amplifier 5 together with the transistor 4 is a resistor for lowering the Q of the tuning circuit 3, or a resistor 6 is provided in the tuning circuit 3.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、バイア
ス抵抗等の外付け抵抗によって同調回路３のＱを低下さ
せると、増幅器としては全て損失となり、半導体受光素
子の出力電流の利用効率が悪いという問題点が生ずる。
これは、半導体受光素子は電流出力の素子であり、この
出力を電流−電圧変換して取り出すためであって、信号
電流は同調回路のＱを低下させるための抵抗６、バイア
ス抵抗Ｒｂおよび増幅器の入力インピーダンスに分流す
るが、主として抵抗６およびバイアス抵抗Ｒｂに流れて
しまうためである。However, if the Q of the tuning circuit 3 is reduced by an external resistor such as a bias resistor, all the amplifiers are lost, and the efficiency of using the output current of the semiconductor light receiving element is poor. Occurs.
This is because the semiconductor light receiving element is a current output element, and this output is converted from current to voltage to take out the signal. The signal current is supplied to the resistor 6 for lowering the Q of the tuning circuit, the bias resistor Rb and the amplifier. This is because the current shunts to the input impedance, but mainly flows to the resistor 6 and the bias resistor Rb.
【０００６】電流−電圧変換と電圧増幅を行なうために
同調回路のあとに高インピーダンスの電圧増幅器を接続
すると、電流−電圧変換は、同調回路に挿入したＱを低
下させるための抵抗と、増幅器の入力インピーダンスと
によって行なわれる。したがって半導体受光素子の出力
電流はＱを低下させるための抵抗に流れて、本来の増幅
器のゲインは生かせないという問題点が生ずる。If a high-impedance voltage amplifier is connected after the tuning circuit to perform current-to-voltage conversion and voltage amplification, the current-to-voltage conversion is performed by using a resistor inserted in the tuning circuit to reduce Q, and a resistor of the amplifier. This is performed according to the input impedance. Therefore, the output current of the semiconductor light receiving element flows to the resistor for lowering the Q, causing a problem that the gain of the original amplifier cannot be used.
【０００７】また、信号レベルは小さいために、増幅度
の高い増幅器を必要とするが、エミッタ接地のトランジ
スタからなる増幅器では、ミラー効果のために同調周波
数をずらす原因となるため、調整をすること必要とな
る。これは、トランジスタのベース・コレクタ間の帰還
静電容量Ｃｏｂが（１＋Ａｖ）倍されて増幅器の入力に
はいるミラー効果のためである。Further, since the signal level is low, an amplifier having a high amplification degree is required. However, in an amplifier including a transistor having a common emitter, the tuning frequency is shifted due to the Miller effect. Required. This is due to the Miller effect in which the feedback capacitance Cob between the base and the collector of the transistor is multiplied by (1 + Av) and enters the input of the amplifier.
【０００８】本発明は、半導体受光素子の出力電流の利
用効率がよく、かつ同調周波数の調整を行なわなくても
よい受光回路を提供することを目的とする。SUMMARY OF THE INVENTION It is an object of the present invention to provide a light receiving circuit which has high efficiency in using the output current of a semiconductor light receiving element and does not require adjustment of a tuning frequency.
【０００９】[0009]
【課題を解決するための手段】本発明にかかる受光回路
は、光を受光する半導体受光素子と、該半導体受光素子
と共に同調回路を構成するコイルと、同調回路からの出
力を増幅するエミッタホロワと該エミッタホロワの出力
を増幅するベース接地トランジスタとからなる増幅器と
を備え、該増幅器はその入力インピーダンスをバイアス
抵抗より低く設定することを特徴とする。According to the present invention, there is provided a light receiving circuit comprising: a semiconductor light receiving element for receiving light; a coil forming a tuning circuit together with the semiconductor light receiving element; an emitter follower for amplifying an output from the tuning circuit; And an amplifier comprising a base-grounded transistor for amplifying the output of the emitter follower. The amplifier biases its input impedance.
It is characterized by being set lower than the resistance .
【００１０】本発明にかかる受光回路によれば、光を受
光する半導体受光素子とコイルとにより同調回路が構成
され、同調回路からの出力を増幅するエミッタフォロワ
と該エミッタフォロワの出力を増幅するベース接地トラ
ンジスタからなる増幅器によって増幅される。また、同
調回路のＱが、増幅器のバイアス抵抗より低く設定され
た入力インピーダンスに基づき実質的に低下させられ
る。したがって、信号の帯域幅によってＱが高すぎて信
号を伝送できなくなるようなことはなく、かつ半導体受
光素子からの信号の利用率を向上させることができるほ
か、増幅器では同調回路からの出力をエミッタフォロワ
で受けるため、増幅器の入力静電容量を小さくできて同
調回路への影響を低減できて、同調周波数の調整が不要
となる。According to the light receiving circuit of the present invention, a tuning circuit is constituted by the semiconductor light receiving element for receiving light and the coil, and an emitter follower for amplifying an output from the tuning circuit and a base for amplifying the output of the emitter follower. It is amplified by an amplifier consisting of a ground transistor. Also, the Q of the tuning circuit is set lower than the bias resistance of the amplifier.
Substantially reduced based on the input impedance. Therefore, never Q such can not be transmitted to too high signal by the bandwidth of the signal, and in addition which can make improve the utilization factor of the signal from the semiconductor light-receiving element, the emitter of the output from the tuning circuit in the amplifier Since the signal is received by the follower, the input capacitance of the amplifier can be reduced, the influence on the tuning circuit can be reduced, and adjustment of the tuning frequency becomes unnecessary.
【００１１】本発明にかかる受光回路において、半導体
受光素子はＰＩＮフォトダイオードであってもよい。In the light receiving circuit according to the present invention, the semiconductor light receiving element may be a PIN photodiode.
【００１２】[0012]
【発明の実施の形態】以下、本発明にかかる受光回路を
実施の形態によって説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a light receiving circuit according to the present invention will be described with reference to embodiments.
【００１３】図１は本発明の実施の一形態にかかる受光
回路の構成を示すブロック図である。本発明の実施の一
形態にかかる受光回路では、光が赤外線で、半導体受光
素子がＰＩＮフォトダイオードの場合で説明する。FIG. 1 is a block diagram showing a configuration of a light receiving circuit according to an embodiment of the present invention. In the light receiving circuit according to one embodiment of the present invention, the case where the light is infrared light and the semiconductor light receiving element is a PIN photodiode will be described.
【００１４】本発明の実施の一形態にかかる受光回路
は、赤外光を受光するＰＩＮフォトダイオード１にコイ
ル２が直列に接続してあってＰＩＮフォトダイオード１
の電極間静電容量とコイル２のインダクタンスとで同調
回路３を構成し、ＰＩＮフォトダイオード１にはバイア
ス電源１９からのバイアス電圧が印加してある。符号７
はデカップリングコンデンサである。In a light receiving circuit according to an embodiment of the present invention, a coil 2 is connected in series to a PIN photodiode 1 for receiving infrared light.
A tuning circuit 3 is constituted by the inter-electrode capacitance and the inductance of the coil 2, and a bias voltage from a bias power supply 19 is applied to the PIN photodiode 1. Code 7
Is a decoupling capacitor.
【００１５】同調回路３からの出力は結合コンデンサ８
を介して取り出して、トランジスタ９からなるエミッタ
ホロワおよびエミッタホロワの出力を増幅するベース接
地トランジスタ１０からなる増幅器１１に供給して増幅
する。符号１２はトランジスタ９および１０のエミッタ
に接続された抵抗（エミッタ抵抗とも記す）を示し、符
号１３および１４はトランジスタ９のバイアス電源およ
びバイアス抵抗を示し、符号１５および１６はトランジ
スタ１０のバイアス抵抗およびバイアス電源を示し、符
号１７はトランジスタ１０の負荷抵抗を示し、符号１８
は増幅器１１の電源を示し、符号２０はデカプリングコ
ンデンサを示している。The output from the tuning circuit 3 is a coupling capacitor 8
And supplies it to an amplifier 11 composed of a common base transistor 10 for amplifying the output of the emitter follower composed of the transistor 9 and the output of the emitter follower. Reference numeral 12 denotes a resistor (also referred to as an emitter resistance) connected to the emitters of the transistors 9 and 10, reference numerals 13 and 14 denote a bias power supply and a bias resistance of the transistor 9, and reference numerals 15 and 16 denote a bias resistance and a bias resistance of the transistor 10. Reference numeral 17 denotes a bias power supply, reference numeral 17 denotes a load resistance of the transistor 10, and reference numeral 18 denotes
Denotes a power supply of the amplifier 11, and reference numeral 20 denotes a decoupling capacitor.
【００１６】上記のように構成した本発明の実施の一形
態にかかる受光回路では、赤外光を受けたＰＩＮフォト
ダイオード１からの信号は結合コンデンサ８を介してト
ランジスタ９からなるエミッタホロワに印加されて増幅
され、エミッタホロワの出力はベース接地のトランジス
タ１０に入力されて増幅され、トランジスタ１０のコレ
クタから出力として取り出される。In the light receiving circuit according to the embodiment of the present invention configured as described above, the signal from the PIN photodiode 1 receiving the infrared light is applied to the emitter follower including the transistor 9 via the coupling capacitor 8. The output of the emitter follower is input to the transistor 10 having a common base, amplified, and taken out from the collector of the transistor 10 as an output.
【００１７】同調回路３のＱは、バイアス抵抗１３と増
幅器１１の入力インピーダンスＺｉｎとの並列インピー
ダンスによって低下させられる。いま、増幅器１１に流
入する電流を２Ｉ（Ａ）とすると、増幅器１１の入力イ
ンピーダンスＺｉｎは≒ｈｆｅ／（４０・Ｉ）（Ω）と
なり、数百Ω〜数ｋΩに設定できる。ｈｆｅは増幅器１
１の電流増幅率である。The Q of the tuning circuit 3 is reduced by the parallel impedance of the bias resistor 13 and the input impedance Zin of the amplifier 11. Now, assuming that the current flowing into the amplifier 11 is 2I (A), the input impedance Zin of the amplifier 11 becomes Δhfe / (40 · I) (Ω), which can be set to several hundred Ω to several kΩ. hfe is the amplifier 1
This is a current amplification factor of 1.
【００１８】したがって、本発明の実施の一形態にかか
る受光回路では、バイアス抵抗１３と増幅器１１の入力
インピーダンスＺｉｎとの並列インピーダンスに信号が
流れ込むが、バイアス抵抗１３の抵抗値＞増幅器１１の
入力インピーダンスＺｉｎにすることができて、増幅器
１１側へ流入する電流の方を大きく設定することができ
る。このため、増幅器１１側へ流入する電流値は図２に
示した従来例の場合よりも多くなる。この結果、信号電
流の利用率が向上し、受光回路の感度が向上する。Therefore, in the light receiving circuit according to the embodiment of the present invention, a signal flows into the parallel impedance of the bias resistor 13 and the input impedance Zin of the amplifier 11, but the resistance value of the bias resistor 13> the input impedance of the amplifier 11 Zin, so that the current flowing into the amplifier 11 can be set larger. For this reason, the value of the current flowing into the amplifier 11 becomes larger than that of the conventional example shown in FIG. As a result, the utilization rate of the signal current is improved, and the sensitivity of the light receiving circuit is improved.
【００１９】また、本発明の実施の一形態にかかる受光
回路では、ＰＩＮフォトダイオード１の出力電流を入力
段がエミッタホロワを形成する増幅器１１で受けている
ため、増幅器１１の入力静電容量が少なく、同調回路３
への影響も少なくて済む。さらにバイアス抵抗１３を、
電流増幅率ｈｆｅのバラツキによる入力インピーダンス
のバラツキの低減要素として利用することができる。Further, in the light receiving circuit according to the embodiment of the present invention, since the input stage receives the output current of the PIN photodiode 1 by the amplifier 11 forming the emitter follower, the input capacitance of the amplifier 11 is small. , Tuning circuit 3
The impact on the environment is small. Further, the bias resistor 13 is
It can be used as a factor for reducing the variation of the input impedance due to the variation of the current amplification factor hfe.
【００２０】本発明の実施の一形態にかかる受光回路で
は、光が赤外線で、半導体受光素子がＰＩＮフォトダイ
オードの場合を例示したが、光は他の波長の光であって
もよく、半導体受光素子はＰＩＮフォトダイオードに限
定されるものではない。In the light receiving circuit according to the embodiment of the present invention, the light is infrared and the semiconductor light receiving element is a PIN photodiode. However, the light may be light of another wavelength. The device is not limited to a PIN photodiode.
【００２１】[0021]
【発明の効果】以上説明したように本発明にかかる受光
回路によれば、半導体受光素子からの信号の利用率を向
上することができほか、増幅器の入力静電容量を小さく
できて同調回路への影響を低減できて、同調周波数の調
整が不要となるという効果が得られる。また、増幅器の
バイアス抵抗を増幅率ｈｆｅのバラツキの補正に利用す
ることもできるという効果もある。As described above, according to the light receiving circuit of the present invention, it is possible to improve the utilization rate of the signal from the semiconductor light receiving element and to reduce the input capacitance of the amplifier to the tuning circuit. Can be reduced, and the adjustment of the tuning frequency becomes unnecessary. Also, there is an effect that the bias resistance of the amplifier can be used for correcting the variation of the amplification factor hfe.
【図１】本発明の実施の一形態にかかる受光回路の構成
を示すブロック図である。FIG. 1 is a block diagram illustrating a configuration of a light receiving circuit according to an embodiment of the present invention.
【図２】従来の受光回路の構成を示すブロック図であ
る。FIG. 2 is a block diagram illustrating a configuration of a conventional light receiving circuit.
１ ＰＩＮフォトダイオード ２ コイル ３ 同調回路 ９および１０ トランジスタ １１ 増幅器 １２ エミッタ抵抗 １３および１５ バイアス抵抗 １４および１６ バイアス電源 １７ 負荷抵抗 １８ 電源 1 PIN photodiode 2 coils 3 Tuning circuit 9 and 10 transistors 11 Amplifier 12 Emitter resistance 13 and 15 bias resistors 14 and 16 bias power supply 17 Load resistance 18 Power supply
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ Ｈ０４Ｂ 10/26 10/28 (58)調査した分野(Int.Cl.7，ＤＢ名) H03F 1/00 - 3/72 ──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. 7 identification code FI H04B 10/26 10/28 (58) Fields investigated (Int.Cl. 7 , DB name) H03F 1/00-3/72
Claims (2)
受光素子と共に同調回路を構成するコイルと、同調回路
からの出力を増幅するエミッタホロワと該エミッタホロ
ワの出力を増幅するベース接地トランジスタとからなる
増幅器とを備え、該増幅器はその入力インピーダンスを
バイアス抵抗より低く設定することを特徴とする受光回
路。1. A semiconductor light receiving element for receiving light, a coil forming a tuning circuit together with the semiconductor light receiving element, an emitter follower for amplifying an output from the tuning circuit, and a common base transistor for amplifying an output of the emitter follower. And an amplifier, whose input impedance is
A light receiving circuit characterized by being set lower than a bias resistance .
受光素子はＰＩＮフォトダイオードであることを特徴と
する受光回路。2. The light receiving circuit according to claim 1, wherein the semiconductor light receiving element is a PIN photodiode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30322598A JP3538040B2 (en) | 1998-10-12 | 1998-10-12 | Light receiving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30322598A JP3538040B2 (en) | 1998-10-12 | 1998-10-12 | Light receiving circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000124747A JP2000124747A (en) | 2000-04-28 |
| JP3538040B2 true JP3538040B2 (en) | 2004-06-14 |
Family
ID=17918395
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30322598A Expired - Lifetime JP3538040B2 (en) | 1998-10-12 | 1998-10-12 | Light receiving circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3538040B2 (en) |
-
1998
- 1998-10-12 JP JP30322598A patent/JP3538040B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP2000124747A (en) | 2000-04-28 |
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