JPS634961B2 - - Google Patents
Info
- Publication number
- JPS634961B2 JPS634961B2 JP57066076A JP6607682A JPS634961B2 JP S634961 B2 JPS634961 B2 JP S634961B2 JP 57066076 A JP57066076 A JP 57066076A JP 6607682 A JP6607682 A JP 6607682A JP S634961 B2 JPS634961 B2 JP S634961B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- emitter
- transistor
- diode
- collector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000003287 optical effect Effects 0.000 claims description 14
- 238000010586 diagram Methods 0.000 description 5
- 230000003321 amplification Effects 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Landscapes
- Amplifiers (AREA)
- Optical Communication System (AREA)
Description
【発明の詳細な説明】
本発明は光受信器用前置増幅回路に係り、特に
エミツタ接地回路とコレクタ接地回路とを縦続
し、コレクタ接地回路の出力をエミツタ接地回路
の入力側に帰還するようにしてなる光受信器用前
置増幅回路の改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a preamplifier circuit for an optical receiver, and in particular, an emitter grounded circuit and a collector grounded circuit are connected in cascade, and the output of the collector grounded circuit is fed back to the input side of the emitter grounded circuit. This invention relates to improvements in preamplifier circuits for optical receivers.
光受信器の前置増幅回路としては、通常、第１
図に示すように、トランジスタQ1を用いたエミ
ツタ接地回路とトランジスタQ2を用いたコレク
タ接地回路とを縦続し、上記コレクタ接地回路の
出力を帰還抵抗Rfよりなる帰還回路を介して上
記エミツタ接地回路の入力側（トランジスタQ1
のベース）に帰還するようにしたトランスインピ
ーダンス回路が用いられている。この回路は、入
出力インピーダンスがともに低いので、電流電圧
変換に好適であり、受光素子PDと組み合せて光
受信器用前置増幅回路として使用されている。ま
た、トランジスタQ1のベースバイアス電流が帰
還抵抗Rfを通して流れるので素子数が少なくて
済むという利点があるので、集積回路化して使用
されている。 As a preamplifier circuit of an optical receiver, the first
As shown in the figure, a common emitter circuit using a transistor Q 1 and a common collector circuit using a transistor Q 2 are connected in cascade, and the output of the common collector circuit is connected to the emitter via a feedback circuit consisting of a feedback resistor R f . Input side of the grounding circuit (transistor Q 1
A transimpedance circuit is used that feeds back to the base of the Since this circuit has low input and output impedances, it is suitable for current-voltage conversion, and is used in combination with a photodetector PD as a preamplifier circuit for an optical receiver. Furthermore, since the base bias current of the transistor Q1 flows through the feedback resistor Rf , it has the advantage that the number of elements can be reduced, so it is used as an integrated circuit.
しかし、第１図に示す従来の回路には、最大許
容入力が小さいという欠点がある。また、入力が
ない場合の出力電圧がトランジスタのベース・エ
ミツタ間電圧VBEとほぼ一致した電圧となり、か
つ、光入力と逆相の信号出力となるため、最大出
力振幅はVBEと一致し、より大きな光入力に対し
ては、波形の歪となつて現われるという欠点があ
る。 However, the conventional circuit shown in FIG. 1 has the disadvantage that the maximum allowable input is small. In addition, the output voltage when there is no input is a voltage that almost matches the base-emitter voltage V BE of the transistor, and the signal output is in the opposite phase to the optical input, so the maximum output amplitude matches V BE , For larger optical inputs, the disadvantage is that it appears as waveform distortion.
これに対して、第２図に示す回路が提案されて
いる。第２図においては、第１図の回路におい
て、トランジスタQ1のエミツタと接地間にダイ
オードD1を接続した構成としてある。この場合
は、最大出力振幅が2VBEとなり、第１図の場合
の２倍の光入力まで許容されることになる。さら
に、ダイオードの数を増すことによつて、最大許
容光入力をそれに応じて大きくすることができる
が、これには次に示す問題がある。すなわち、ト
ランジスタQ1の負荷は、負荷抵抗RLとコレクタ
接地回路（エミツタフオロワ）の入力インピーダ
ンスZinとが並列に接続されたものとなり、入力
インピーダンスZinは、
Zin＝β（re＋Re） ……(1)
ここに、β；電流増幅率
re；エミツタ動抵抗
Re；エミツタフオロワ負荷抵抗Reの抵抗
値
で表わされ、βが小さい場合には、RLとZinとは
同等の値となり、Re，βの値がエミツタ接地段
のオープンループ利得Gvにそのまま影響するこ
とになる。したがつて、次式で示されるトランス
インピーダンスZTも変化することなり、特に抵抗
値、電流増幅率の絶対値のばらつきが大きい集積
回路としたときは、大きな問題となるという欠点
を生ずる。 In response to this, a circuit shown in FIG. 2 has been proposed. In FIG. 2, the circuit shown in FIG. 1 has a configuration in which a diode D 1 is connected between the emitter of the transistor Q 1 and the ground. In this case, the maximum output amplitude is 2V BE , and up to twice the optical input as in the case of FIG. 1 is allowed. Furthermore, by increasing the number of diodes, the maximum allowable light input can be correspondingly increased, but this has the following problems. In other words, the load of transistor Q 1 is the load resistance R L and the input impedance Zin of the common collector circuit (emitter follower) connected in parallel, and the input impedance Zin is Zin = β (re + Re) ... (1) Here, β: Current amplification factor re: Emitter dynamic resistance Re: Emitter follower load resistance Re: When β is small, R L and Zin are equal values, and the values of Re and β will directly affect the open loop gain Gv of the emitter grounding stage. Therefore, the transimpedance Z T expressed by the following equation also changes, which poses a major problem especially when an integrated circuit is used in which the absolute values of resistance values and current amplification factors vary widely.
ZT＝Rf／１＋１／Gv ……(2)
ここに、Rf；帰還抵抗Rfの抵抗値
本発明は上記に鑑みてなされたもので、その目
的とするところは、最大許容光入力を大きくで
き、かつ、素子定数のばらつきの影響を受けるこ
とが少ない光受信器用前置増幅回路を提供するこ
とにある。 Z T = R f /1 + 1/G v ... (2) where, R f ; resistance value of feedback resistor R f The present invention was made in view of the above, and its purpose is to It is an object of the present invention to provide a preamplifier circuit for an optical receiver that can increase the input and is less affected by variations in element constants.
本発明の特徴は、エミツタ接地回路のトランジ
スタのエミツタと接地間にダイオーードを接続す
るとともにコレクタ接地回路のトランジスタの負
荷抵抗を定電流源に置きかえ、この定電流源の基
準電流を上記ダイオードを流れる電流とする構成
の回路とした点にある。 A feature of the present invention is that a diode is connected between the emitter of the transistor in the grounded emitter circuit and the ground, and the load resistance of the transistor in the grounded collector circuit is replaced with a constant current source, and the reference current of this constant current source is set as the current flowing through the diode. The point is that the circuit is configured as follows.
以下本発明を第３図に示した実施例にもとずい
て詳細に説明する。 The present invention will be explained in detail below based on the embodiment shown in FIG.
第３図は本発明の前置増幅回路の一実施例を示
す回路図で、第１図、第２図と同一部分は同じ符
号で示し、ここでは説明を省略する。第３図にお
いては、第２図と同様、エミツタ接地回路のトラ
ンジスタQ1のエミツタと接地間にダイオードD1
を接続したほか、第２図のコレクタ接地回路（エ
ミツタフオロワ）のトランジスタQ2のエミツタ
と接地間に接続した負荷抵抗Reをトランジスタ
Q3よりなる定電流源に置きかえて、この定電流
源の基準電流をダイオードD1を流れる電流とす
るように、トランジスタQ3のベースをダイオー
ドD1のカソードとトランジスタQ1のエミツタと
の接続点に接続した回路構成としてある。 FIG. 3 is a circuit diagram showing an embodiment of the preamplifier circuit of the present invention. The same parts as in FIGS. 1 and 2 are designated by the same reference numerals, and the explanation thereof will be omitted here. In Fig. 3, as in Fig. 2, a diode D 1 is connected between the emitter of transistor Q 1 of the emitter-grounded circuit and the ground.
In addition to connecting the load resistor Re connected between the emitter of transistor Q 2 and ground in the common collector circuit (emitter follower) shown in Figure 2,
In place of a constant current source consisting of Q 3 , connect the base of transistor Q 3 to the cathode of diode D 1 and the emitter of transistor Q 1 so that the reference current of this constant current source is the current flowing through diode D 1 . It has a circuit configuration in which the points are connected.
したがつて、第３図に示す実施例によれば、ト
ランジスタQ1のエミツタと接地間にダオードD1
を接続してあるから最大許容光入力を大きくする
ことができ、また、トランジスタQ3よりなる定
電流源を設け、エミツタフオロワをこの定電流源
で駆動するようにし、定電流源の基準電流をダイ
オードD1を流れる電流とするようにしているの
で、素子数の増加を最少限に抑えることができ、
しかも、エミツタフオロワの入力インピーダンス
は、定電流源のインピーダンスのβ倍となるの
で、エミツタ接地回路の負荷抵抗RLよりも十分
大きくなり、トランジスタQ1のオープンループ
利得Gvは、負荷抵抗RLだけで決まることになり、
βなどの変動の影響を受けることが少なくなる。
これにともない、集積回路化して素子定数にばら
つきが生じても問題を生ずることがない。 Therefore, according to the embodiment shown in FIG. 3, a diode D 1 is connected between the emitter of transistor Q 1 and ground.
The maximum permissible optical input can be increased because the transistor is connected to the Since the current flows through D 1 , the increase in the number of elements can be minimized.
Moreover, the input impedance of the emitter follower is β times the impedance of the constant current source, so it is sufficiently larger than the load resistance R L of the emitter grounded circuit, and the open loop gain G v of transistor Q 1 is only equal to the load resistance R L. It will be decided by
It is less affected by fluctuations such as β.
Accordingly, no problem occurs even if variations in element constants occur due to integrated circuits.
以上説明したように、本発明によれば、最大許
容光入力を大きくでき、かつ、素子定数のばらつ
きの影響を受けることが少なく、集積回路化が容
易であるという効果がある。 As described above, according to the present invention, the maximum allowable optical input can be increased, and the effect of variations in element constants is small, making it easy to integrate the circuit.
第１図は従来の光受信器用前置増幅回路の回路
図、第２図は本発明の出願人が先に提案した光受
信器用前置増幅回路の回路図、第３図は本発明の
光受信器用前置増幅回路の一実施例を示す回路図
である。
PD……受光素子、Q1，Q2，Q3……トランジス
タ、D1……ダイオード、Rf……帰還抵抗。
FIG. 1 is a circuit diagram of a conventional preamplifier circuit for an optical receiver, FIG. 2 is a circuit diagram of a preamplifier circuit for an optical receiver previously proposed by the applicant of the present invention, and FIG. 3 is a circuit diagram of a preamplifier circuit for an optical receiver according to the present invention. FIG. 2 is a circuit diagram showing an embodiment of a receiver preamplifier circuit. PD...Photodetector, Q1 , Q2 , Q3 ...Transistor, D1 ...Diode, Rf ...Feedback resistor.
Claims (1)
続し、該コレクタ接地回路の出力を前記エミツタ
接地回路の入力側に帰還回路を介して帰還するよ
うにしてなる前置増幅回路において、前記エミツ
タ接地回路のトランジスタのエミツタと接地間に
ダイオードを接続し、前記コレクタ接地回路のエ
ミツタに第３のトランジスタのコレクタを接続
し、かつ該第３のトランジスタのベースを前記ダ
イオードのアノードに接続してあることを特徴と
する光受信器用前置増幅回路。1. A preamplifier circuit in which an emitter grounded circuit and a collector grounded circuit are connected in cascade, and the output of the collector grounded circuit is fed back to the input side of the emitter grounded circuit via a feedback circuit. A diode is connected between the emitter of the transistor and ground, the collector of a third transistor is connected to the emitter of the common collector circuit, and the base of the third transistor is connected to the anode of the diode. A preamplifier circuit for an optical receiver.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57066076A JPS58182906A (en) | 1982-04-20 | 1982-04-20 | Preamplifying circuit for optical receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57066076A JPS58182906A (en) | 1982-04-20 | 1982-04-20 | Preamplifying circuit for optical receiver |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58182906A JPS58182906A (en) | 1983-10-26 |
| JPS634961B2 true JPS634961B2 (en) | 1988-02-01 |
Family
ID=13305388
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57066076A Granted JPS58182906A (en) | 1982-04-20 | 1982-04-20 | Preamplifying circuit for optical receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58182906A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02165441A (en) * | 1988-12-17 | 1990-06-26 | Sony Corp | Optical information recording medium having peelable protective film |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60163508A (en) * | 1984-02-03 | 1985-08-26 | Hitachi Cable Ltd | Optical reception circuit |
| JPS60257631A (en) * | 1984-06-01 | 1985-12-19 | Hitachi Cable Ltd | Optical reception circuit |
| JPS61139007U (en) * | 1985-02-16 | 1986-08-28 | ||
| JPH01221906A (en) * | 1988-02-29 | 1989-09-05 | Nippon Telegr & Teleph Corp <Ntt> | Amplifier circuit |
| JPH0348522A (en) * | 1990-06-22 | 1991-03-01 | Hitachi Ltd | Optical receiver circuit |
| JP5231118B2 (en) * | 2008-07-24 | 2013-07-10 | ルネサスエレクトロニクス株式会社 | Receiver amplifier circuit |
-
1982
- 1982-04-20 JP JP57066076A patent/JPS58182906A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02165441A (en) * | 1988-12-17 | 1990-06-26 | Sony Corp | Optical information recording medium having peelable protective film |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58182906A (en) | 1983-10-26 |
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