JPH0435867U - - Google Patents
Info
- Publication number
- JPH0435867U JPH0435867U JP7792190U JP7792190U JPH0435867U JP H0435867 U JPH0435867 U JP H0435867U JP 7792190 U JP7792190 U JP 7792190U JP 7792190 U JP7792190 U JP 7792190U JP H0435867 U JPH0435867 U JP H0435867U
- Authority
- JP
- Japan
- Prior art keywords
- carrier
- sides
- substrate
- polishing
- abrasive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 claims description 8
- 238000005498 polishing Methods 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 1
Description
第１図は本考案に係る半導体基板両面研磨用キ
ヤリアの一実施例を示す平面図、第２図は半導体
基板両面研磨装置の概略構成説明図、第３図は従
来使用されている半導体基板両面研磨用キヤリア
の平面図である。
１……半導体基板、２……半導体基板両面研磨
用キヤリア、３……上定盤、４……下定盤、５…
…研磨剤供給孔、６……サンギア、７……インタ
ーナルギア、８……基板保持孔、１０……研磨剤
通過孔。
FIG. 1 is a plan view showing an embodiment of a carrier for polishing both sides of a semiconductor substrate according to the present invention, FIG. 2 is a schematic diagram of a semiconductor substrate double-side polishing apparatus, and FIG. FIG. 3 is a plan view of a polishing carrier. 1...Semiconductor substrate, 2...Carrier for polishing both sides of semiconductor substrate, 3...Upper surface plate, 4...Lower surface plate, 5...
... Abrasive supply hole, 6 ... Sun gear, 7 ... Internal gear, 8 ... Substrate holding hole, 10 ... Abrasive passage hole.
Claims (1)
もに、研磨剤の供給を受けかつ、互いに逆方向に
回転する上・下定盤間にはさまれて半導体基板の
両面を同時に研磨せしめる半導体基板両面研磨用
キヤリアにおいて、前記キヤリア板面に、基板保
持孔とともに複数個の研磨剤通過孔を併設したこ
とを特徴とする半導体基板研磨両面用キヤリア。 A carrier for double-sided polishing of semiconductor substrates, which has a substrate holding hole for holding a semiconductor substrate, and which is sandwiched between upper and lower surface plates that rotate in opposite directions while being supplied with abrasive to simultaneously polish both sides of the semiconductor substrate. A carrier for polishing both sides of semiconductor substrates, characterized in that a plurality of abrasive passage holes are provided on the carrier plate surface together with substrate holding holes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7792190U JPH0435867U (en) | 1990-07-23 | 1990-07-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7792190U JPH0435867U (en) | 1990-07-23 | 1990-07-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0435867U true JPH0435867U (en) | 1992-03-25 |
Family
ID=31620741
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7792190U Pending JPH0435867U (en) | 1990-07-23 | 1990-07-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0435867U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2004082890A1 (en) * | 2003-03-20 | 2004-09-30 | Shin-Etsu Handotai Co. Ltd. | Wafer-retaining carrier, double side-grinding device using the same, and double side-grinding method for wafer |
| JP2016022542A (en) * | 2014-07-17 | 2016-02-08 | 信越半導体株式会社 | Carrier for holding wafer, double-sided polishing method of wafer using the same, and evaluation method and design method of carrier for holding wafer |
-
1990
- 1990-07-23 JP JP7792190U patent/JPH0435867U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2004082890A1 (en) * | 2003-03-20 | 2004-09-30 | Shin-Etsu Handotai Co. Ltd. | Wafer-retaining carrier, double side-grinding device using the same, and double side-grinding method for wafer |
| JP2016022542A (en) * | 2014-07-17 | 2016-02-08 | 信越半導体株式会社 | Carrier for holding wafer, double-sided polishing method of wafer using the same, and evaluation method and design method of carrier for holding wafer |
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