JPH04357801A - Manufacture of chip type resistor string - Google Patents

Manufacture of chip type resistor string

Info

Publication number
JPH04357801A
JPH04357801A JP3132626A JP13262691A JPH04357801A JP H04357801 A JPH04357801 A JP H04357801A JP 3132626 A JP3132626 A JP 3132626A JP 13262691 A JP13262691 A JP 13262691A JP H04357801 A JPH04357801 A JP H04357801A
Authority
JP
Japan
Prior art keywords
insulating substrate
electrode
resistor
series
chip type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3132626A
Other languages
Japanese (ja)
Other versions
JP3060597B2 (en
Inventor
Hiroyuki Yamada
博之 山田
Akio Fukuoka
章夫 福岡
Seiji Tsuda
清二 津田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3132626A priority Critical patent/JP3060597B2/en
Publication of JPH04357801A publication Critical patent/JPH04357801A/en
Application granted granted Critical
Publication of JP3060597B2 publication Critical patent/JP3060597B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To eliminate short circuit across terminals caused when an electrode paste, used when an end face electrode is formed, flows into through-holes between adjacent electrodes or to eliminate solder bridge formed at the time of soldering when a chip type resistor train is manufactured. CONSTITUTION:An upper side electrode 4a and a back side electrode 4b are formed on an insulation substrate 1, and a resistor 5 is formed so as to contact with the upper side electrode 4a, and a preventive coat glass 6 is formed after the resistor is laser trimmed, and then the insulation substrate 1 is divided by a lateral dividing slit 2 to form end face electrodes 8 at the cut edge and then both the end face electrodes formed among resistors 5 and a part of the cut edge of the insulation substrate are removed followed by drilling of through- holes 9, thus the insulation substrate is divided into a separate chip type resistor string 10 by longitudinal dividing slits 3.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は電子回路に一般に使用さ
れるチップ形抵抗器連の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a series of chip resistors commonly used in electronic circuits.

【0002】0002

【従来の技術】従来のチップ形抵抗器連の製造方法の一
例について図2により説明する。図2は従来のチップ形
抵抗器連の製造方法を示す工程図である。まず、複数個
の抵抗要素が構成されるように表面に一定間隔で設けた
縦方向及び横方向の分割用スリットと、前記横方向の分
割用スリット上に設けた透孔とを有する絶縁基板を受け
入れる工程Aを行う。次に、絶縁基板の上面に前記横方
向の分割用スリットをまたがるように透孔をはさんで上
面電極を形成する工程Bを行う。次に、絶縁基板の裏面
に前記上面電極と対応させて裏面電極を形成する工程C
を行う。次に、上面電極と接続されるように絶縁基板上
に抵抗体を形成する工程Dを行う。次に、前記抵抗体の
抵抗値を所定の抵抗値に揃えるためにレーザートリミン
グ工程Eを行う。次に、前記レーザートリミング修正済
みの抵抗体を完全に覆う保護ガラスを形成する工程Fを
行う。次に、横方向のスリットにより絶縁基板を分割す
る工程Gを行う。次に、前記分割済み絶縁基板の分割面
に端面電極を形成する工程Hを行う。次に、前記端面電
極形成済み絶縁基板を縦方向のスリットにより個片状に
分割する工程Iを行う。最後に、露出している電極にめ
っきを行う工程Jを行う。以上のような工程により従来
のチップ形抵抗器連を製造していた。
2. Description of the Related Art An example of a conventional method of manufacturing a series of chip-type resistors will be explained with reference to FIG. FIG. 2 is a process diagram showing a conventional method of manufacturing a series of chip-type resistors. First, an insulating substrate is prepared which has vertical and horizontal dividing slits provided at regular intervals on its surface so as to configure a plurality of resistance elements, and a through hole provided above the horizontal dividing slits. Perform accepting process A. Next, step B is performed in which an upper surface electrode is formed on the upper surface of the insulating substrate by inserting a through hole across the horizontal dividing slit. Next, step C of forming a back electrode on the back surface of the insulating substrate in correspondence with the top electrode.
I do. Next, step D is performed in which a resistor is formed on the insulating substrate so as to be connected to the upper surface electrode. Next, a laser trimming step E is performed to adjust the resistance value of the resistor to a predetermined resistance value. Next, step F is performed to form a protective glass that completely covers the resistor that has been corrected by laser trimming. Next, step G is performed in which the insulating substrate is divided by horizontal slits. Next, a step H is performed in which end electrodes are formed on the divided surfaces of the divided insulating substrate. Next, step I is performed in which the insulating substrate on which the end surface electrodes have been formed is divided into individual pieces by vertical slits. Finally, step J is performed in which the exposed electrodes are plated. Conventional chip-type resistor series were manufactured through the process described above.

【0003】また、図3は従来のチップ形抵抗器連の斜
視図である。図3において、21はチップ形抵抗器連、
22は保護コートガラス、23は上面電極、24は端面
電極である。
FIG. 3 is a perspective view of a conventional chip type resistor series. In FIG. 3, 21 is a series of chip resistors;
22 is a protective coat glass, 23 is a top electrode, and 24 is an end electrode.

【0004】0004

【発明が解決しようとする課題】しかしながら、このチ
ップ形抵抗器連の製造方法では、端面電極24を形成す
るために電極ペースト25を塗布した際、図3に示すよ
うに隣接する電極間の透孔に電極ペースト25が流れ込
み、端子間ショートを起こしたり、あるいは実装時のリ
フローはんだ付けの際にはんだブリッジを起こしやすい
という課題があった。
However, in this method of manufacturing a chip type resistor series, when applying the electrode paste 25 to form the end face electrode 24, as shown in FIG. There is a problem in that the electrode paste 25 flows into the holes, causing a short circuit between the terminals, or easily causing solder bridging during reflow soldering during mounting.

【0005】本発明は上記課題に鑑みてなされたもので
端子間ショートがなく、かつ実装時のリフローはんだ付
けの際のはんだブリッジのないチップ形抵抗器連の製造
方法を目的とする。
The present invention has been made in view of the above problems, and an object of the present invention is to provide a method for manufacturing a series of chip resistors that does not cause short-circuits between terminals and does not cause solder bridges during reflow soldering during mounting.

【0006】[0006]

【課題を解決するための手段】この目的を達成するため
に本発明のチップ形抵抗器連の製造方法は、複数個の抵
抗要素が形成されるように表面に縦方向および横方向の
分割用のスリットを形成した大版の絶縁基板の上面に前
記横方向のスリットをまたがるように上面電極を形成す
るとともに、絶縁基板の裏面に前記上面電極と対応させ
て裏面電極を形成する工程と、前記上面電極と接続する
ように絶縁基板上に抵抗体を形成する工程と、前記絶縁
基板を横方向のスリットで分割した後、その切断端面に
前記上面電極と裏面電極とを接続する端面電極を形成す
る工程と、前記絶縁基板の隣接する抵抗体間に形成され
た端面電極および絶縁基板の前記切断端面の一部を切り
欠く工程と、前記絶縁基板を抵抗体が少なくとも二つ以
上含まれるように縦方向のスリットで分割し個々の抵抗
器連に分離する工程とから構成される。
[Means for Solving the Problems] In order to achieve this object, the method for manufacturing a series of chip resistors of the present invention provides a method for manufacturing a series of chip-type resistors, in which the surface is divided vertically and horizontally so that a plurality of resistance elements are formed. forming a top electrode on the top surface of the large insulating substrate with the slit formed therein so as to span the lateral slit, and forming a back electrode on the back surface of the insulating substrate in correspondence with the top electrode; A step of forming a resistor on an insulating substrate so as to be connected to the top electrode, and after dividing the insulating substrate with horizontal slits, forming an end electrode on the cut end surface to connect the top electrode and the back electrode. a step of cutting out an end surface electrode formed between adjacent resistors of the insulating substrate and a part of the cut end surface of the insulating substrate; It consists of a step of dividing the resistor into individual resistor series by dividing it with vertical slits.

【0007】[0007]

【作用】本発明によれば、端面電極を形成する工程の後
に、抵抗体間に形成された端面電極および絶縁基板の一
部を除去して透孔を形成する工程を行うため、透孔内に
電極ペーストが流れ込むことによる端子間のショート並
びにはんだ付け時のはんだブリッジを防止することがで
きる。
[Operation] According to the present invention, after the step of forming the end electrodes, the end electrodes formed between the resistors and a part of the insulating substrate are removed to form the through holes. It is possible to prevent short circuits between terminals and solder bridges during soldering due to electrode paste flowing into the terminals.

【0008】[0008]

【実施例】以下本発明の一実施例によるチップ形抵抗器
連の製造方法について、図面を参照しながら説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a series of chip resistors according to an embodiment of the present invention will be described below with reference to the drawings.

【0009】図1は本発明の一実施例であるチップ形抵
抗器連の製造方法を示す工程図である。まず、複数個の
抵抗要素が構成されるように表面に一定間隔で設けた縦
方向の分割用スリット3及び横方向の分割用スリット2
とを有する絶縁基板1を受け入れる工程Aを行う。次に
、絶縁基板1の上面に前記横方向の分割用スリット2を
またがるように上面電極4aを形成する工程Bを行う。 そして、絶縁基板の裏面に前記上面電極4aと対応させ
て裏面電極4bを形成する工程Cを行う。次に、上面電
極4aと接続されるように絶縁基板1上に抵抗体5を形
成する工程Dを行う。さらに、前記抵抗体5の抵抗値を
所定の抵抗値に揃えるためにレーザートリミング工程E
を行う。次に、前記レーザートリミング修正済みの抵抗
体5aを完全に覆う保護コートガラス6を形成する工程
Fを行う。そして、横方向の分割用スリット2により絶
縁基板1を分割して短冊状の絶縁基板7を形成する工程
Gを行う。その後、前記分割済み絶縁基板7の切断端面
に端面電極8を形成し端面電極形成済み絶縁基板7aを
形成する工程Hを行う。次に、前記端面電極形成済み絶
縁基板7aの隣接する抵抗体間に形成された端面電極お
よび絶縁基板の前記切断端面の一部をダイシング工法に
より除去し透孔9を加工形成する工程Iを行う。さらに
、前記絶縁基板を縦方向の分割用スリット3により個片
状のチップ形抵抗器連10に分割する工程Jを行う。最
後に、露出している電極にめっきを行う工程Kを行う。 以上の工程により本実施例によるチップ形抵抗器連を製
造した。
FIG. 1 is a process diagram showing a method of manufacturing a series of chip-type resistors according to an embodiment of the present invention. First, vertical dividing slits 3 and horizontal dividing slits 2 are provided at regular intervals on the surface so that a plurality of resistance elements are formed.
Step A of receiving the insulating substrate 1 having the following steps is performed. Next, step B is performed in which the upper surface electrode 4a is formed on the upper surface of the insulating substrate 1 so as to straddle the horizontal dividing slit 2. Then, step C is performed in which a back electrode 4b is formed on the back surface of the insulating substrate in correspondence with the top electrode 4a. Next, step D is performed in which a resistor 5 is formed on the insulating substrate 1 so as to be connected to the upper surface electrode 4a. Furthermore, a laser trimming step E is performed to adjust the resistance value of the resistor 5 to a predetermined resistance value.
I do. Next, step F is performed to form a protective coat glass 6 that completely covers the resistor 5a that has been corrected by laser trimming. Then, step G is performed in which the insulating substrate 1 is divided by the horizontal dividing slits 2 to form strip-shaped insulating substrates 7. Thereafter, a step H is performed in which end electrodes 8 are formed on the cut end surfaces of the divided insulating substrate 7 to form an insulating substrate 7a with end electrodes formed thereon. Next, step I is performed in which the end electrode formed between the adjacent resistors of the insulating substrate 7a on which the end electrode has been formed and a part of the cut end surface of the insulating substrate are removed by a dicing method to process and form a through hole 9. . Furthermore, a step J is performed in which the insulating substrate is divided into individual chip-shaped resistor arrays 10 using vertical dividing slits 3. Finally, step K is performed in which the exposed electrodes are plated. Through the above steps, a series of chip resistors according to this example was manufactured.

【0010】この本実施例のチップ形抵抗器連では、透
孔9部分へは電極ペーストが付かないため、端子間のシ
ョートは発生せず、従ってはんだ付け時のはんだブリッ
ジも発生しなかった。
In the chip type resistor series of this embodiment, since the electrode paste did not adhere to the through hole 9 portion, no short circuit occurred between the terminals, and therefore no solder bridging occurred during soldering.

【0011】[0011]

【発明の効果】以上の説明から明らかなように、本発明
による製造方法によれば、透孔内に電極ペーストが流れ
込むことによる端子間のショート並びにはんだ付け時の
はんだブリッジを防止することができ、また透孔の寸法
精度を高めることができる。また、あらかじめ絶縁基板
に透孔を設けておく必要がないため、絶縁基板を製造す
るための基板金型の構造が単純となり、絶縁基板を安価
に製造することができる。
[Effects of the Invention] As is clear from the above description, according to the manufacturing method of the present invention, it is possible to prevent short circuits between terminals and solder bridging during soldering due to electrode paste flowing into through holes. Moreover, the dimensional accuracy of the through hole can be improved. Further, since it is not necessary to provide a through hole in the insulating substrate in advance, the structure of the substrate mold for manufacturing the insulating substrate is simple, and the insulating substrate can be manufactured at low cost.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本発明の一実施例によるチップ形抵抗器連の製
造方法を示す工程図
FIG. 1 is a process diagram showing a method of manufacturing a series of chip resistors according to an embodiment of the present invention.

【図2】従来のチップ形抵抗器連の製造方法を示す工程
[Figure 2] Process diagram showing the manufacturing method of a conventional chip type resistor series

【図3】従来のチップ形抵抗器連の斜視図[Figure 3] Perspective view of a conventional chip type resistor series

【符号の説明】[Explanation of symbols]

1  絶縁基板 2  横方向の分割用スリット 3  縦方向の分割用スリット 4a  上面電極 4b  裏面電極 5  抵抗体 5a  レーザートリミング修正済み抵抗体6  保護
コートガラス 7  短冊状の絶縁基板 7a  端面電極形成済み絶縁基板 8  端面電極 9  透孔 10  チップ形抵抗器連
1 Insulating substrate 2 Horizontal dividing slit 3 Vertical dividing slit 4a Top electrode 4b Back electrode 5 Resistor 5a Laser trimming corrected resistor 6 Protective coat glass 7 Strip-shaped insulating substrate 7a Insulating substrate with end electrodes formed 8 End electrode 9 Through hole 10 Chip type resistor series

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】複数個の抵抗要素が形成されるように表面
に縦方向および横方向の分割用のスリットを形成した大
版の絶縁基板の上面に前記横方向のスリットをまたがる
ように上面電極を形成するとともに、絶縁基板の裏面に
前記上面電極と対応させて裏面電極を形成する工程と、
前記上面電極と接続するように絶縁基板上に抵抗体を形
成する工程と、前記絶縁基板を横方向のスリットで分割
した後、その切断端面に前記上面電極と裏面電極とを接
続する端面電極を形成する工程と、前記絶縁基板の隣接
する抵抗体間に形成された端面電極および絶縁基板の前
記切断端面の一部を切り欠く工程と、前記絶縁基板を抵
抗体が少なくとも二つ以上含まれるように縦方向のスリ
ットで分割し個々の抵抗器連に分離する工程とを備えた
チップ形抵抗器連の製造方法。
1. A large insulating substrate having vertical and horizontal dividing slits formed on its surface so as to form a plurality of resistance elements, and a top electrode extending across the horizontal slits. and forming a back electrode on the back surface of the insulating substrate in correspondence with the top electrode;
forming a resistor on an insulating substrate so as to be connected to the top electrode; and after dividing the insulating substrate with horizontal slits, an end electrode is formed on the cut end surface of the insulating substrate to connect the top electrode and the back electrode. a step of cutting out an end face electrode formed between adjacent resistors of the insulating substrate and a part of the cut end surface of the insulating substrate; A method of manufacturing a chip-type resistor series, which comprises the steps of: dividing the series with vertical slits and separating it into individual series of resistors.
JP3132626A 1991-06-04 1991-06-04 Manufacturing method of chip type resistor series Expired - Fee Related JP3060597B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3132626A JP3060597B2 (en) 1991-06-04 1991-06-04 Manufacturing method of chip type resistor series

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3132626A JP3060597B2 (en) 1991-06-04 1991-06-04 Manufacturing method of chip type resistor series

Publications (2)

Publication Number Publication Date
JPH04357801A true JPH04357801A (en) 1992-12-10
JP3060597B2 JP3060597B2 (en) 2000-07-10

Family

ID=15085725

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3132626A Expired - Fee Related JP3060597B2 (en) 1991-06-04 1991-06-04 Manufacturing method of chip type resistor series

Country Status (1)

Country Link
JP (1) JP3060597B2 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0712142A3 (en) * 1994-11-09 1996-06-12 Dale Electronics
US6238992B1 (en) 1998-01-12 2001-05-29 Matsushita Electric Industrial Co., Ltd. Method for manufacturing resistors
US6285275B1 (en) 2000-09-15 2001-09-04 Fuzetec Technology Co., Ltd. Surface mountable electrical device
US6297722B1 (en) * 2000-09-15 2001-10-02 Fuzetec Technology Co., Ltd. Surface mountable electrical device
JP2008028422A (en) * 2007-10-11 2008-02-07 Rohm Co Ltd Method of producing chip type electronic component having two or more elements
JP2014082303A (en) * 2012-10-16 2014-05-08 Koa Corp Method of manufacturing multiple-chip resistor
CN106098277A (en) * 2016-08-12 2016-11-09 昆山厚声电子工业有限公司 Flexible LED lamp bar dedicated resistor and manufacture method thereof
CN108807227A (en) * 2018-05-24 2018-11-13 武汉华星光电半导体显示技术有限公司 Cutter device and cutting method, display panel for cutting display panel

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0712142A3 (en) * 1994-11-09 1996-06-12 Dale Electronics
US6238992B1 (en) 1998-01-12 2001-05-29 Matsushita Electric Industrial Co., Ltd. Method for manufacturing resistors
US6285275B1 (en) 2000-09-15 2001-09-04 Fuzetec Technology Co., Ltd. Surface mountable electrical device
US6297722B1 (en) * 2000-09-15 2001-10-02 Fuzetec Technology Co., Ltd. Surface mountable electrical device
JP2008028422A (en) * 2007-10-11 2008-02-07 Rohm Co Ltd Method of producing chip type electronic component having two or more elements
JP2014082303A (en) * 2012-10-16 2014-05-08 Koa Corp Method of manufacturing multiple-chip resistor
CN106098277A (en) * 2016-08-12 2016-11-09 昆山厚声电子工业有限公司 Flexible LED lamp bar dedicated resistor and manufacture method thereof
CN108807227A (en) * 2018-05-24 2018-11-13 武汉华星光电半导体显示技术有限公司 Cutter device and cutting method, display panel for cutting display panel
CN108807227B (en) * 2018-05-24 2021-06-04 武汉华星光电半导体显示技术有限公司 Cutting device and cutting method for cutting display panel and display panel

Also Published As

Publication number Publication date
JP3060597B2 (en) 2000-07-10

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