JPH04350938A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH04350938A
JPH04350938A JP12416891A JP12416891A JPH04350938A JP H04350938 A JPH04350938 A JP H04350938A JP 12416891 A JP12416891 A JP 12416891A JP 12416891 A JP12416891 A JP 12416891A JP H04350938 A JPH04350938 A JP H04350938A
Authority
JP
Japan
Prior art keywords
copper
film
titanium
oxygen
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12416891A
Other languages
Japanese (ja)
Other versions
JP3120471B2 (en
Inventor
Kazuhiro Hoshino
和弘 星野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP03124168A priority Critical patent/JP3120471B2/en
Publication of JPH04350938A publication Critical patent/JPH04350938A/en
Application granted granted Critical
Publication of JP3120471B2 publication Critical patent/JP3120471B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the reaction between a copper wiring and an insulating film to prevent the copper wiring from being oxidized. CONSTITUTION:A titanium film 15 is formed on a patterned copper film 14 and annealed in a predetermined manner so that the titanium film on upper and side portions of the copper film may be converted to a copper-titanium alloy film 16. On the other hand, the titanium film on an insulating film 11 is removed using a mixture of ammonia and hydrogen peroxide. An insulating film containing oxygen, e.g., SOG, is formed by spin coating and heated (cured at 400 deg.C) to form an inner insulating film. Since the titanium in the copper- titanium alloy film has the function of generating oxygen, the oxygen in the insulating film is bound with titanium but does not react with the copper inside. Therefore, the copper-titanium alloy film becomes a stable layer 17 having a mixed phase of of a copper-titanium compound and titanium oxide.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、半導体装置の製造方法
に関し、更に詳しくは、半導体装置に形成される銅配線
の酸化防止方法に係わる。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for preventing oxidation of copper wiring formed in a semiconductor device.

【0002】0002

【従来の技術】近年、ULSIの高集積化に伴い、電極
配線は微細化傾向にある。電極配線材料としてはアルミ
ニウムあるいはアルミニウム系合金が多用されてきたが
、配線の線幅が減少するにつれて、エレクトロマイグレ
ーションが厳しく、信頼性を保証することが難しくなっ
てきている。そこで、アルミニウムに代る配線材料とし
てモリブデン(Mo),タングステン(W)などの高融
点金属が試されているが、その抵抗はバルクでアルミニ
ウムの2倍以上と高く、薄膜ではさらに高い。従ってエ
レクトロマイグレーションに強く、低抵抗な材料が求め
られている。そこで、アルミニウムに代わる配線材料と
して銅(Cu)を用いることが考えられる。銅は、低抵
抗でエレクトロマイグレーションに強く、微細デバイス
への形成を可能にする。
2. Description of the Related Art In recent years, as ULSI becomes highly integrated, electrode wiring tends to become finer. Aluminum or aluminum-based alloys have often been used as electrode wiring materials, but as the line width of the wiring decreases, electromigration becomes severe and it becomes difficult to guarantee reliability. Therefore, high melting point metals such as molybdenum (Mo) and tungsten (W) are being tried as wiring materials in place of aluminum, but their resistance in bulk is more than twice that of aluminum, and even higher in thin films. Therefore, there is a need for materials that are resistant to electromigration and have low resistance. Therefore, it is conceivable to use copper (Cu) as a wiring material in place of aluminum. Copper has low resistance and is resistant to electromigration, allowing it to be formed into microscopic devices.

【0003】しかしながら、銅配線がこれまでにデバイ
スに適用されなかった理由は、Cuが酸素を数%でも含
む雰囲気において、200℃程度の温度で酸化されるた
めであった。即ち、ウエハプロセスにおいては、CVD
法による絶縁膜形成・アニール等、Cu膜が高温で酸素
雰囲気に晒される工程を経るため、そこで酸化されてし
まうという問題を生じていた。例えば、Cu配線形成後
に絶縁膜としてCVD法によりSiO2膜を形成する場
合には、ウエハは例えばSiH4+N2Oガス中で基板
温度300℃〜400℃に晒される。このとき、Cuは
反応ガスに含まれる酸素によってCuは酸化される。ま
た、Cu配線形成後にアニールを行なう場合は、通常の
電気炉でN2を流し400℃〜700℃で行なわれるが
、炉内に存在する微量の残留酸素やSiO2膜中の酸素
(O)でCuは酸化されてしまう。Cuは、Alと異な
り表面に安定な酸化膜を作らないため、表面が酸素と反
応すると膜中に酸素が拡散し、酸化銅となって電気抵抗
は急激に上昇し配線として実用に適さないものとなって
しまう。
However, the reason why copper wiring has not been applied to devices so far is that Cu is oxidized at a temperature of about 200° C. in an atmosphere containing even a few percent of oxygen. That is, in the wafer process, CVD
Since the Cu film is exposed to an oxygen atmosphere at high temperature during steps such as forming an insulating film using a method and annealing, a problem has arisen in that the Cu film is oxidized. For example, when forming an SiO2 film as an insulating film by CVD after forming Cu wiring, the wafer is exposed to a substrate temperature of 300°C to 400°C in SiH4+N2O gas, for example. At this time, Cu is oxidized by oxygen contained in the reaction gas. In addition, when annealing is performed after forming Cu wiring, it is carried out at 400°C to 700°C by flowing N2 in a normal electric furnace, but Cu will be oxidized. Unlike Al, Cu does not form a stable oxide film on its surface, so when the surface reacts with oxygen, oxygen diffuses into the film and becomes copper oxide, causing a rapid increase in electrical resistance, making it unsuitable for practical use as wiring. It becomes.

【0004】特開昭63−299250号公報記載の従
来技術は、Cu配線上にシリコンを堆積させ、酸素雰囲
気中で熱処理を施して銅−二酸化シリコン(Cu−Si
O2)合金とする方法であり、Cu配線の酸化の防止を
図ったものである。
[0004] The conventional technique described in JP-A-63-299250 deposits silicon on Cu wiring and heat-treats it in an oxygen atmosphere to form copper-silicon dioxide (Cu-Si).
This is a method of forming an O2) alloy, and is intended to prevent oxidation of Cu wiring.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、このよ
うな従来技術を用いても、Cu配線中にSiO2が含ま
れる構造となることや、Cu配線上に堆積させたシリコ
ンを酸素雰囲気中で熱処理するため、Cuは酸素と反応
する機会が多くなり、完全にCuの酸化を防止し得るも
のでなかった。そのため、Cu配線の有効な酸化防止方
法が要望されていた。
[Problems to be Solved by the Invention] However, even if such conventional technology is used, the structure may include SiO2 in the Cu wiring, or the silicon deposited on the Cu wiring may be heat-treated in an oxygen atmosphere. Therefore, Cu has many chances to react with oxygen, and oxidation of Cu cannot be completely prevented. Therefore, an effective method for preventing oxidation of Cu wiring has been desired.

【0006】本発明は、このような従来の問題点に着目
して創案されたものであって、Cu配線の酸化が防止さ
れる半導体装置の製造方法を得んとするものである。
[0006] The present invention was devised by paying attention to such conventional problems, and aims to provide a method for manufacturing a semiconductor device in which oxidation of Cu wiring can be prevented.

【0007】[0007]

【課題を解決するための手段】そこで、本発明は、下地
基板上に形成された銅配線表面に銅(Cu)−チタン(
Ti)系合金膜を形成する工程と、前記銅(Cu)−チ
タン(Ti)系合金膜が形成された銅配線上に、酸素(
O)を構成成分とする絶縁膜を形成する工程とを備えた
ことを、その解決方法としている。
[Means for Solving the Problem] Therefore, the present invention provides copper (Cu)-titanium (
The step of forming a Ti)-based alloy film and the step of forming an oxygen (
The method for solving this problem is to include a step of forming an insulating film containing O) as a constituent component.

【0008】[0008]

【作用】銅配線の表面に銅−チタン合金膜を存在させる
ことによって、酸素(O)を構成成分とする絶縁膜(例
えばSOG膜,プラズマSiO2膜等)と銅の反応を抑
制する。即ち、銅−チタン合金膜中のチタン(Ti)は
、酸素をゲッタリングする作用があるため、高温処理を
経ても絶縁膜中の酸素はチタンと結合し、内部の銅とは
反応をしない。
[Operation] The presence of a copper-titanium alloy film on the surface of the copper wiring suppresses the reaction between copper and an insulating film containing oxygen (O) (eg, SOG film, plasma SiO2 film, etc.). That is, since titanium (Ti) in the copper-titanium alloy film has the effect of gettering oxygen, even after high-temperature treatment, the oxygen in the insulating film combines with titanium and does not react with the copper inside.

【0009】[0009]

【実施例】以下、本発明に係る半導体装置の製造方法の
詳細を図面に示す実施例に基づいて説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the method of manufacturing a semiconductor device according to the present invention will be explained below based on the embodiments shown in the drawings.

【0010】(第1実施例)図1〜図5は、本発明の第
1実施例を示している。
(First Embodiment) FIGS. 1 to 5 show a first embodiment of the present invention.

【0011】本実施例は、先ず、素子を形成したシリコ
ン基板(図示省略)上にSiO2で成る酸化膜11を形
成した後、この酸化膜11の所定の位置にコンタクトホ
ール(図示省略)を開孔する。続いて、DCマグネトロ
ンスパッタリング法を用いてコンタクトメタルとしての
チタン(Ti)膜12を例えばÅの厚さに形成し、次に
、バリアメタルとしての窒化チタン(TiN)膜13を
例えば1000Åの厚さに形成する。
In this embodiment, first, an oxide film 11 made of SiO2 is formed on a silicon substrate (not shown) on which an element is formed, and then a contact hole (not shown) is opened at a predetermined position in this oxide film 11. make a hole Next, a titanium (Ti) film 12 as a contact metal is formed to a thickness of, for example, 1000 Å using a DC magnetron sputtering method, and then a titanium nitride (TiN) film 13 as a barrier metal is formed to a thickness of, for example, 1000 Å. to form.

【0012】さらに、窒化チタン膜13上に、銅(Cu
)膜14をDCマグネトロンスパッタリング法を用いて
例えば5000Åの厚さに形成する。
Furthermore, copper (Cu) is deposited on the titanium nitride film 13.
) The film 14 is formed to a thickness of, for example, 5000 Å using a DC magnetron sputtering method.

【0013】そして、この銅膜14を例えば反応性イオ
ンエッチング(RIE)法を用いてパターニングする。 このエッチング条件は、以下に示す通りである。
[0013] This copper film 14 is then patterned using, for example, reactive ion etching (RIE). The etching conditions are as shown below.

【0014】○エッチングガス…四塩化炭素(CCl4
)−80%窒素(N2) ○圧力…0.02Torr ○基板温度…350℃ ○エッチングマスク…SiO2 なお、このような銅膜14のエッチング条件で、更に下
地の窒化チタン(TiN)膜13,チタン(Ti)膜1
2をエッチングすることが出来る。エッチング後、銅膜
14,窒化チタン膜13,チタン膜12は図1に示すよ
うな断面形状に加工される。
○Etching gas...Carbon tetrachloride (CCl4
) -80% nitrogen (N2) ○Pressure...0.02Torr ○Substrate temperature...350℃ ○Etching mask...SiO2 Note that under these etching conditions for the copper film 14, the underlying titanium nitride (TiN) film 13 and titanium (Ti) film 1
2 can be etched. After etching, the copper film 14, titanium nitride film 13, and titanium film 12 are processed into a cross-sectional shape as shown in FIG.

【0015】次に、図2に示すように、DCマグネトロ
ンスパッタリング法を用いてチタン(Ti)膜15を全
面に例えば500Åの厚さに形成する。
Next, as shown in FIG. 2, a titanium (Ti) film 15 is formed to a thickness of, for example, 500 Å over the entire surface using a DC magnetron sputtering method.

【0016】その後、例えば450℃,60秒のランプ
アニールを行ない、銅膜14とチタン膜15とを反応さ
せ、図3に示すように、銅膜14の周囲に銅チタン合金
(CuTiX)膜16を形成する。
Thereafter, lamp annealing is performed at, for example, 450° C. for 60 seconds to cause the copper film 14 and the titanium film 15 to react, and as shown in FIG. 3, a copper titanium alloy (CuTiX) film 16 is formed around the copper film 14. form.

【0017】次に、アンモニア過水で酸化膜11上の未
反応のチタン膜15を除去して、図4に示すような構造
にする。
Next, the unreacted titanium film 15 on the oxide film 11 is removed using ammonia hydrogen peroxide to form a structure as shown in FIG.

【0018】次に、図5に示すように、絶縁膜としてS
OG(Spin  On  Glass;例えば東京応
化製OCD−Type7  16000T)膜18をス
ピンコートし、400℃のキュアリングを施す。
Next, as shown in FIG. 5, S is used as an insulating film.
An OG (Spin On Glass; for example, OCD-Type 7 16000T manufactured by Tokyo Ohka) film 18 is spin-coated and cured at 400°C.

【0019】この際、従来の銅配線では、銅とSOGの
反応が生じるため銅が酸化され、抵抗が上昇して配線と
して実用に供されないものになっていた。しかし、本実
施例においては、以下に説明する作用によって銅配線は
酸化されない。
At this time, in conventional copper wiring, a reaction between copper and SOG occurs, so that the copper is oxidized and its resistance increases, making it unusable as a wiring. However, in this embodiment, the copper wiring is not oxidized due to the action described below.

【0020】銅膜14の表面に、銅チタン合金膜16を
存在させることによって、酸素(O)を構成成分とする
絶縁膜と銅の反応を抑制することができる。即ち、銅チ
タン合金膜16中のチタン(Ti)は酸素をゲッタリン
グする作用があるため、高温熱処理を行なうと、絶縁膜
中の酸素はチタンと結合し、内部の銅膜14の銅とは反
応しない。
By providing the copper-titanium alloy film 16 on the surface of the copper film 14, the reaction between the insulating film containing oxygen (O) and copper can be suppressed. That is, since titanium (Ti) in the copper-titanium alloy film 16 has the effect of gettering oxygen, when high-temperature heat treatment is performed, the oxygen in the insulating film combines with titanium, and the copper in the internal copper film 14 is separated. no response.

【0021】従って、絶縁膜としてSOG膜18をスピ
ンコートし、400℃のキュアリングを施すと、図5に
示すように、銅膜14の上部及び側部に銅−チタンの化
合物と酸化チタン(TiO)の混合相を持った安定層(
Cu−Ti−TiO)17が形成されるので、内部の銅
膜(銅配線)14が酸化されることはない。
Therefore, when the SOG film 18 is spin-coated as an insulating film and cured at 400° C., a copper-titanium compound and titanium oxide ( A stable layer (TiO) with a mixed phase of
Since Cu-Ti-TiO) 17 is formed, the internal copper film (copper wiring) 14 is not oxidized.

【0022】(第2実施例)本実施例は、酸素(O)を
構成成分とする絶縁膜としてプラズマCVD法によって
形成されたSiO2を用いた例である。
(Second Embodiment) This embodiment is an example in which SiO2 formed by plasma CVD is used as an insulating film containing oxygen (O) as a constituent component.

【0023】先ず、本実施例においては、上記第1実施
例と同様の手順で、銅膜14の表面に銅チタン合金膜を
形成した後、プラズマCVD法によってSiO2膜19
を例えば7000Åの厚さに形成する。
First, in this embodiment, a copper-titanium alloy film is formed on the surface of the copper film 14 in the same manner as in the first embodiment, and then a SiO2 film 19 is formed by plasma CVD.
is formed to a thickness of, for example, 7000 Å.

【0024】このSiO2膜19の形成条件は、以下に
示す通りである。
The conditions for forming this SiO2 film 19 are as shown below.

【0025】○反応ガス及びその流量 シラン(SiH4)…500SCCM 酸素(O2)…120SCCM ヘリウム(He)…3800SCCM ○圧力…1.3Torr ○形成温度…380℃ このようにして、SiO2膜19を形成した場合、図6
に示すような断面形状が得られる。ここでも、上記第1
実施例と同様の効果が得られる。
○Reactant gases and their flow rates Silane (SiH4)...500SCCM Oxygen (O2)...120SCCM Helium (He)...3800SCCM ○Pressure...1.3 Torr ○Formation temperature...380°C In this way, the SiO2 film 19 was formed. In the case, Figure 6
A cross-sectional shape as shown in is obtained. Again, the above first
Effects similar to those of the embodiment can be obtained.

【0026】即ち、銅膜14の表面に銅チタン合金膜を
存在させることによって、SiO2と銅の反応を抑制す
ることができる。銅チタン合金膜中のチタン(Ti)は
酸素をゲッタリングする作用があるため、高温熱処理を
行なってもSiO2中の酸素はチタンと結合し、内部の
銅膜14とは反応しない。
That is, by providing the copper-titanium alloy film on the surface of the copper film 14, the reaction between SiO2 and copper can be suppressed. Since titanium (Ti) in the copper-titanium alloy film has the effect of gettering oxygen, even if high-temperature heat treatment is performed, the oxygen in SiO2 combines with titanium and does not react with the internal copper film 14.

【0027】従って、絶縁膜としてSiO2膜19を形
成したのち、図6に示すように銅膜(銅配線)14の上
部及び側面に銅−チタンの化合物と酸化チタン(TiO
)の混合相をもった安定層17が形成される。
Therefore, after forming the SiO2 film 19 as an insulating film, a copper-titanium compound and titanium oxide (TiO
A stable layer 17 having a mixed phase of ) is formed.

【0028】以上、2つの実施例について説明したが、
本発明は、これらに限定されるものではなく、各種の銅
配線の構造に適用し得るものである。
Two embodiments have been described above, but
The present invention is not limited to these, but can be applied to various copper wiring structures.

【0029】[0029]

【発明の効果】本発明においては、銅配線の表面に銅−
チタン系合金膜を存在させることによって、酸素(O)
を構成成分とする絶縁膜と銅の反応を抑制する効果があ
る。即ち、銅−チタン系合金膜中のチタンが酸素をゲッ
タリングするため、高温熱処理を経ても絶縁膜中の酸素
はチタンと結合し内部の銅とは反応しない。このため、
本発明は銅配線を超LSIの配線として実用化させ得る
効果がある。
Effects of the Invention In the present invention, copper-
By the presence of a titanium-based alloy film, oxygen (O)
It has the effect of suppressing the reaction between the insulating film containing copper and copper. That is, since the titanium in the copper-titanium alloy film getters oxygen, the oxygen in the insulating film combines with titanium and does not react with the copper inside even after high-temperature heat treatment. For this reason,
The present invention has the advantage that copper wiring can be put to practical use as wiring for VLSI.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本発明の第1実施例の工程を示す断面図。FIG. 1 is a sectional view showing the steps of a first embodiment of the present invention.

【図2】本発明の第1実施例の工程を示す断面図。FIG. 2 is a sectional view showing the steps of the first embodiment of the present invention.

【図3】本発明の第1実施例の工程を示す断面図。FIG. 3 is a sectional view showing the steps of the first embodiment of the present invention.

【図4】本発明の第1実施例の工程を示す断面図。FIG. 4 is a sectional view showing the steps of the first embodiment of the present invention.

【図5】本発明の第1実施例の工程を示す断面図。FIG. 5 is a sectional view showing the steps of the first embodiment of the present invention.

【図6】本発明の第2実施例の断面図。FIG. 6 is a sectional view of a second embodiment of the invention.

【符号の説明】[Explanation of symbols]

11…酸化膜、12…チタン膜、13…窒化チタン膜、
14…銅膜、15…チタン膜、16…銅チタン合金膜、
17…安定層。
11... Oxide film, 12... Titanium film, 13... Titanium nitride film,
14... Copper film, 15... Titanium film, 16... Copper titanium alloy film,
17... Stable layer.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  下地基板上に形成された銅配線表面に
銅(Cu)−チタン(Ti)系合金膜を形成する工程と
、前記銅(Cu)−チタン(Ti)系合金膜が形成され
た銅配線上に、酸素(O)を構成成分とする絶縁膜を形
成する工程とを備えたことを特徴とする半導体装置の製
造方法。
1. A step of forming a copper (Cu)-titanium (Ti)-based alloy film on a copper wiring surface formed on a base substrate, and a step of forming the copper (Cu)-titanium (Ti)-based alloy film. A method of manufacturing a semiconductor device, comprising: forming an insulating film containing oxygen (O) as a constituent on copper wiring.
JP03124168A 1991-05-29 1991-05-29 Method for manufacturing semiconductor device Expired - Fee Related JP3120471B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP03124168A JP3120471B2 (en) 1991-05-29 1991-05-29 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP03124168A JP3120471B2 (en) 1991-05-29 1991-05-29 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPH04350938A true JPH04350938A (en) 1992-12-04
JP3120471B2 JP3120471B2 (en) 2000-12-25

Family

ID=14878638

Family Applications (1)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08306694A (en) * 1995-04-01 1996-11-22 Lg Semicon Co Ltd Wiring structure of semiconductor and its preparation
CN105432154A (en) * 2013-07-29 2016-03-23 费罗公司 Method of forming conductive trace

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08306694A (en) * 1995-04-01 1996-11-22 Lg Semicon Co Ltd Wiring structure of semiconductor and its preparation
CN105432154A (en) * 2013-07-29 2016-03-23 费罗公司 Method of forming conductive trace
JP2016535924A (en) * 2013-07-29 2016-11-17 フエロ コーポレーション Method for forming conductive traces

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