JPH04345283A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To suppress the deterioration of an S/N occurring at the time of changing-over from high-speed photographing to low-speed or normal-speed photographing. CONSTITUTION:The operation current Ids of the source follower circuit 3 of the last stage on a CCD solid-state image pickup element 1 is changed and the output impedance Ro of the output stage is modulated so that the frequency characteristic of an output part is changed in accordance with the output frequency of the CCD solid-state image pickup element 1. A power source 4 applying a gate voltage Vg from the external part to FET 3b of the lower stage via a terminal (a) is made to be variable, for example, and the power source 4 is changed over based on a selecting signal (s) indicating three modes, that, is k double-speed, l double-speed and normal speed. The resistor Rs connected between GND and the source terminal (b) of FET 3b are made variable. That is, three resistor R1, R2 and R3 are prepared in accordance with the three modes and a switch 5 changes over the resistor based on the selecting signal (s) indicating the three modes.

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device, and more particularly to a video camera or a still image camera that uses a solid-state imaging device by switching its output frequency. [0002] Generally, the output section of a CCD solid-state image sensor used in a video camera that has both high-speed and normal-speed shooting functions has a target frequency for high-speed shooting, which is the highest operating frequency. It is designed to. The output section of a conventional video camera is comprised of an output stage of a CCD solid-state image sensor 31 and an external circuit, as shown in FIG. The output stage is composed of multi-stage source follower circuits 32 and 33 that amplify the image signal from the solid-state image sensor, and the external circuit is configured to detect a charge detection section (follower) in the output signal So from the final stage source follower circuit 33. For example, a CDS (correlated double sampling) circuit 34 or a similar circuit (for example, an IDS (
(integral type CDS), RDS, etc.). Note that since various circuits can be considered as the CDS circuit 34 and circuits similar thereto, FIG. 8 typically shows only the sampling/hold (S/H) circuit 35. [0004] Conventionally, for example, assuming that the shooting speed during high-speed shooting is k times the normal speed, a video camera using a CCD solid-state image sensor 31 made for k times the shooting speed is used to take pictures at k times the normal speed. , or l slower than k times the speed
I try to shoot at double speed (l times the normal speed). [0005]However, in the conventional case, as long as a video camera using a CCD solid-state image sensor 31 made for k times speed (k times the normal speed) is operated at k times speed. There is no problem, but when shooting at l times the speed (l times the normal speed), which is slower than k times the speed, the following inconvenience occurs. Here, FIG. 9 shows the configuration of an output section that mainly uses white noise, that is, the output stage of the CCD solid-state image sensor 31 (source follower circuits 32 and 33) and an external circuit (CDS circuit 34 or a circuit similar thereto). S incorporated within
The configuration of the /H circuit 35 is shown, and FIG. 10 shows the characteristics of the output section. For the sake of simplicity, the gain of the output stage is 1,
It is assumed that the S/H circuit 35 performs ideal sampling. Note that in FIG. 9, Vn is a white noise source. As can be seen from FIG. 10, the spectrum of the white noise source exists over a wide frequency band (see FIG. 10A). However, since the frequency characteristics of the output section, that is, its maximum operating frequency, is up to the frequency fk corresponding to k times the normal speed, as shown in FIG. 10B, the noise spectrum of the output section is also cut off at the frequency fk. (See FIG. 10C). In this state, for example, when photographing is performed at l times slower than k times speed (l times the normal speed), the operating frequency is the frequency fk, as shown in FIG. 10D.
(l/k) times that of (l/k), that is, (l/k)fk. However, even when shooting at l times the speed, the cutoff frequency of the noise spectrum is still fk, so the white noise spectrum within the frequency band (l/k) fk to fk is mixed into the output signal from the output section. , and the S/N ratio deteriorates. For comparison, a CC made exclusively for l times the speed
FIG. 11 shows the characteristics of the output section of a video camera using a D solid-state image sensor. In this case, since the frequency characteristic of the output section, that is, its maximum operating frequency is (l/k)fk, the cutoff frequency of the noise spectrum is also (l/k)fk, and the noise power when shooting at l times the speed is It becomes small. If the noise power at this time is P, then the noise power when photographing at l times the speed with the k times speed video camera is (k/l)P, and the S/N ratio deteriorates. [0010] In order to solve this problem, a method of using a video camera exclusively for the above-mentioned l times speed, which has low noise power when photographing at l times the speed, has been considered, but this method has the disadvantage that the operating frequency band is limited. [0011] The present invention has been made in view of the above-mentioned problems, and its purpose is to reduce the S
An object of the present invention is to provide a solid-state imaging device that can suppress deterioration of the /N ratio. [Means for Solving the Problems] The present invention provides a solid-state imaging device in which the output frequency of the solid-state imaging device 1 is switched and used, in which the frequency characteristics of the output section are adjusted according to the output frequency of the solid-state imaging device 1. It is configured to include means for changing. [0013] As the above-mentioned means, for example, the solid-state image sensor 1
means for modulating the output impedance of the output stage (source follower circuit), means for varying the time constant of the prefilter 12 of the external circuit (CDS circuit 11 or equivalent circuit), S/H incorporated in the external circuit. Means for controlling the response of the circuit 13 or a combination of the above means can be used. [Operation] According to the configuration of the present invention described above, the solid-state image sensor 1
Since the device is equipped with means for changing the frequency characteristics (maximum operating frequency) of the output section according to the output frequency of When operating at a speed l times slower than the double speed (l times the normal speed), the output frequency band of the output section can be controlled to (l/k)fk. That is, since the cutoff frequency of the noise spectrum can be controlled according to the frequency of the operating conditions, the white noise superimposed on the output signal from the output section can be reduced, and the S/N ratio of the output signal can be improved. be able to. [Embodiments] Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 to 7. Before describing a specific example of the embodiment of the present invention, the principle of the embodiment will first be explained based on FIG. When a video camera using a solid-state image sensor made for k times the normal speed is operated at k times the normal speed, the frequency characteristics of its output section, that is, the maximum operating frequency, are as shown in FIG. 1A.
As shown in , the frequency fk corresponding to k times the normal speed
The noise spectrum of the output section also has the above frequency fk
(See Figure 1B). In other words, k
When a double speed video camera is operated at k times the speed, the output frequency band is fk. Noise power Pk at this time
is expressed by the following formula. Pk = A・Vn2・fk (A is a constant) 0017
] Even when the video camera is used at l times slower than k times the normal speed (l times the normal speed), the noise power of the output section is the above Pk, but at this time the operating speed is (l/k). ) times, the required output frequency band at this l times speed is also (l/k) times. Therefore, Figure 1
As shown by the broken line A, at l times the speed, the output frequency band fl is controlled to satisfy the following equation, fl = (l/k)fk. The noise power Pl at this time is expressed by the following equation. Pl =A・Vn2・fl [0018] Therefore, the S/N is reduced by the amount shown by the following equation 1.
ratio is improved. ##EQU1## In order to explain the above principle, the control of the frequency characteristics of the output section was explained, but the control of this frequency characteristic is as follows.
This includes what is performed in the output stage of a solid-state image sensor, a CDS circuit, or a circuit similar thereto (such as an integral CDS circuit). Next, some specific examples of this embodiment are shown in FIG.
- Explanation will be made based on FIG. 7. FIG. 2 shows that by changing the output impedance at the output stage of the CCD solid-state image sensor 1,
The circuit configuration for changing the frequency characteristics of the output section is shown. This circuit configuration basically changes the operating current Ids of the final stage source follower circuit 3 among the source follower circuits 2 and 3 that constitute the output stage of the CCD solid-state image sensor 1, thereby increasing the output impedance of the output stage. This modulates Ro (see Equation 2). ##EQU2## FIG. 2A is a circuit diagram of the main part of the solid-state imaging device according to the first embodiment, in which FETs 3a and 3b constituting the final stage source follower circuit 3 are equivalently resistive. The power supply 4 that externally supplies the gate voltage Vg to the lower stage FET 3b constituting the FET 3b is made variable, and the power supply 4 is switched to three modes: k times speed, l times speed, and normal speed. This is done based on the signal s. In this case, the variable voltage of the power supply 4 is V1.
, V2 and V3 (V1 > V2 > V3), and if the selection signal s means k times the speed, the power supply 4
is set to V1, if it means l times the speed, set the power supply 4 to V2, and if it means normal speed, switch the power supply 4 to V3, and the source follower circuit 3
The output impedance of the output section is changed according to the operating speed of the CCD solid-state image sensor 1, and the output frequency band of the output section at k times speed is fk, the output frequency band of the output section at l times speed is fl, and the output frequency band of the output section at normal time is fk. The output frequency band is set to f (fk > fl > f). [0023]The source terminal b of FET3b is directly connected to GN.
However, in order to stabilize the operating current and remove AC noise, the source terminal b
A resistor Rs and a capacitor Cs may be connected in parallel between the terminal and GND, respectively. FIG. 2B is a circuit diagram of a main part of a solid-state imaging device according to a first modification of the first embodiment. The power supply 4 that supplies the gate voltage from the outside via the terminal a to the lower stage FET 3b that constitutes a resistor is set to a constant voltage Vg, and the source terminal b of the FET 3b is connected to GND.
The resistor Rs connected therebetween is made variable. Specifically, three resistors are prepared corresponding to the three modes described above, and the switch 5 switches between these resistors based on a selection signal s instructing the three modes. In this case, R1, R2, and R3 (R1 < R2 < R3) are prepared as each resistor, and if the selection signal s means k times speed, the resistor is set to R1, and if it means l times speed, If so, the resistor is set to R2, and if it means normal speed, the resistor is switched to R3, and the output impedance of the source follower circuit 3 is changed according to the operating speed of the CCD solid-state image sensor 1. The output frequency band of the output section in fk
, the output frequency band of the output section at l times the speed is fl ,
The output frequency band of the output section during normal operation is set to f. [0026] In order to remove AC noise, FET3b
In addition to the resistor Rs, a capacitor Cs may be connected in parallel between the source terminal b and GND. FIG. 3 is a circuit diagram of a main part of a solid-state imaging device according to a second modification of the first embodiment, in which a constant current source 6 is connected at the subsequent stage of the output stage. This constant current source 6 is configured so that its constant current I can be changed. in particular,
The power supply voltage Vgg of a power supply 7 that supplies a gate voltage to the gate of the FET 6a constituting the constant current source 6 is made variable, and the power supply voltage Vgg is switched based on the selection signal s instructing the above three modes. In this way, the output impedance of the source follower circuit 3 is changed according to the operating speed, and the output frequency band of the output section at k times the speed is fk, the output frequency band of the output section at the l times speed is fl, and the output frequency band of the output section at the normal time is fk. The output frequency band of the output section is set to f. Next, FIG. 4 shows the case where the frequency characteristics of the output section are changed by changing the time constant of the prefilter 12 connected to the front stage of the CDS circuit 11 or a circuit similar thereto (integral type CDS, etc.). The circuit configuration is shown (the basic configuration is shown in FIG. 3A). Here, since various circuits can be considered as the CDS circuit 11 or a circuit similar thereto, FIG. 3 typically shows the prefilter 12 and the sampling circuit.
Only the hold (S/H) circuit 13 is shown. FIG. 4B is a circuit diagram of the main part (prefilter 12) of the solid-state imaging device according to the second embodiment, and shows the circuit diagram of the resistor R and capacitor C constituting the prefilter (low-pass filter) 12. Of these, the resistance R is made variable. Specifically, three resistors are prepared corresponding to the three modes described above, and these resistors are switched by a switch 14 based on a selection signal s instructing the three modes. In this case, prepare Rf1, Rf2, and Rf3 (Rf1<Rf2<Rf3) as each resistor, and if the selection signal means k times the speed, set the resistor to Rf1,
The time constant of the prefilter 12 is set according to the operating speed of the CCD solid-state image pickup device 1 by setting the resistor to Rf2 if it means l times the speed, and switching the resistor to Rf3 if it means the normal speed. The output frequency band of the output section at k times speed is set to fk, the output frequency band of the output section at l times speed is set to fl, and the output frequency band of the output section at normal time is set to f. FIG. 4C is a circuit diagram of a main part of a solid-state imaging device according to a modification of the second embodiment. do. Specifically, three capacitors are prepared corresponding to the three modes described above, and switching of these capacitors is performed by a switch 15 based on a selection signal s instructing the three modes. In this case, each capacitor is Cf1, C
Prepare f2 and Cf3 (Cf1<Cf2<Cf3),
If the selection signal s means k times speed, the capacitor is set to Cf1, if it means l times speed, the capacitor is set to Cf2, and if it means normal speed, the capacitor is switched to Cf3. The time constant of the prefilter 12 is changed according to the operating speed, and the output frequency band of the output section at k times speed is fk, the output frequency band of the output section at l times speed is fl, and the output frequency of the output section at normal time. Set the band to f. Next, FIG. 5 shows a circuit configuration for controlling the response of the S/H circuit 13 constituting a CDS circuit or a circuit similar thereto to change the frequency characteristics of the output section. In the figure, numeral 21 indicates a switch (generally an FET is used) that turns on and off based on the sampling pulse p. FIG. 5A is a circuit diagram of the main part (S/H circuit 13) showing the solid-state imaging device according to the third embodiment, and
/H circuit 13 includes a resistor Rh and a capacitor Ch
Of these, the resistance Rh is made variable. Specifically, three resistors are prepared corresponding to the three modes described above, and these resistors are switched by the switch 22 based on a selection signal s instructing the three modes. In this case, Rh1, Rh2, and Rh3 (Rh1<Rh2<Rh3) are prepared as each resistor, and if the selection signal s means k times the speed, the resistor is set to Rh1, and if it means l times the speed, If so, set the resistor to Rh2, and if it means normal speed, switch the resistor to Rh3 to change the response (response time) of the S/H circuit 13 to C.
The output frequency band of the output section at k times speed is fk, the output frequency band of the output section at l times speed is fl, and the output frequency band of the output section at normal time is changed according to the operating speed of the CD solid-state image sensor 1. make it f. FIG. 5B is a circuit diagram of a main part of a solid-state imaging device according to a first modification of the third embodiment, in which the S/H
Of the resistor Rh and capacitor Ch constituting the circuit 13, the capacitor Ch is made variable. Specifically, three capacitors are prepared corresponding to the three modes mentioned above,
These capacitors are switched by a switch 23 based on a selection signal s instructing three modes. In this case, each capacitor is Ch1, C
Prepare h2 and Ch3 (Ch1<Ch2<Ch3),
If the selection signal s means k times speed, the capacitor is set to Ch1, if it means l times speed, the capacitor is set to Ch2, and if it means normal speed, the capacitor is switched to Ch3. S/H circuit 1
The response (response time) of 3 is changed according to the operating speed, and k
The output frequency band of the output section at double speed is fk, the output frequency band of the output section at l times speed is fl, and the output frequency band of the output section at normal time is f. FIG. 6 is a circuit diagram of a main part of a solid-state imaging device according to a second modification of the third embodiment, and shows an IC type S/H circuit 13 using a current mirror circuit. In this example, two NPNs make up a current mirror circuit.
A sampling switch 21 and a constant current source 2 are connected between the common emitter terminal e of transistors Q1 and Q2 and GND.
It consists of 4 connected. This constant current source 24 is configured so that its constant current IE can be changed. Next, the operation of the S/H circuit 13 according to the second modification will be briefly explained. First, the input terminal φin and the output terminal φ in a state where the switch 21 is turned on.
The potential difference ΔV between out and out is expressed by the following equation. ΔV=VT [lnI1 −lnI2] Furthermore, I1 =
(IE +ΔI)/2, I2 = (IE −ΔI)/2
, VT = kT/q (thermal voltage). Therefore, ΔV/VT = ln(IE +ΔI)/2
−ln(IE −ΔI)/2
=ln(IE+ΔI)−ln(IE−ΔI
) Here, when expanded as |ΔI|≪IE,
ΔV/VT = [lnIE +ΔI/IE
] − [lnIE −ΔI/IE ]
=2ΔI/IE From this, ΔI=(IE/2VT)·ΔV =gm·ΔV is obtained. Viewed equivalently, this constitutes a low-pass filter consisting of a resistor Rg determined by 1/gm and a capacitor C, as shown in FIG. Therefore, constant current source 2
By making the constant current IE of No. 4 variable, the mutual conductance gm can be modulated, the resistance Rg can be changed, and the time constant of the low-pass filter can be changed. That is, by making the constant current IE of the constant current source 24 variable, the response (response time) of the S/H circuit 13 shown in FIG. 6 can be controlled. Specifically, the power supply voltage Vgg of the power supply 25 that supplies the gate voltage to the gate of the FET 24a constituting the constant current source 24 is made variable, and the power supply voltage Vgg
The switching is performed based on a selection signal s instructing the above three modes. As a result, the operating current IE of the constant current source 24
can be changed according to three modes, the output frequency band of the output section at k times speed is fk, the output frequency band of the output section at l times speed is fl, and the output frequency band of the output section at normal time is f. It becomes possible to make it. As described above, according to this example, means is provided for changing the frequency characteristics (maximum operating frequency) of the output section in accordance with the output frequency of the CCD solid-state image sensor, so that, for example, the maximum operating speed is k times the normal speed (output frequency band fk), and when operated at l times slower than k times speed (l times the normal speed), the output frequency band of the output part becomes (l/k )fk. That is, since the cutoff frequency of the noise spectrum can be controlled in accordance with the frequency of the operating conditions, the white noise superimposed on the output signal from the output section can be reduced, and the S/N ratio of the output signal can be improved. be able to. Specifically, if this embodiment is applied to a video camera designed to have a maximum operating speed of 4x speed, the S/N ratio when shooting at normal speed can be improved by about 6 dB. Therefore, as an application of this embodiment, for example, in a still image camera, it is effective when a low-speed mode is introduced in order to reduce power consumption. In the above embodiment, an example is shown in which the frequency characteristic of the output section is changed by modulating the output impedance of the output stage of the CCD solid-state image sensor 1 in the first embodiment shown in FIG. In the second embodiment shown in FIG. 2
In the embodiment, an example was shown in which the frequency characteristics of the output section were changed by controlling the response of the external circuit, especially the S/H circuit 13, but these first, second, and third embodiments may be arbitrarily combined. Alternatively, the frequency characteristics of the output section may be changed. [0045] According to the solid-state imaging device according to the present invention, deterioration of the S/N ratio that occurs when switching from high-speed photography to low-speed or normal-speed photography can be suppressed.

[Brief explanation of drawings]

FIG. 1 is a characteristic diagram for explaining the principle of this embodiment. A is a characteristic diagram showing the frequency characteristics of the output section (for k times speed). B is a characteristic diagram showing the noise spectrum of the output section (for k times speed). C is a characteristic diagram showing the operating frequency band of the solid-state image sensor at l times the speed.

FIG. 2A is a circuit diagram showing a main part (output stage of the solid-state image sensor) of the solid-state image sensor according to the first embodiment. B is a circuit diagram showing a main part (an output stage of a solid-state image sensor) of a solid-state imaging device according to a first modification of the first embodiment.

FIG. 3 is a circuit diagram showing a main part (an output stage of a solid-state image sensor) of a solid-state imaging device according to a second modification of the first embodiment.

FIG. 4A is a block diagram showing the basic configuration of a solid-state imaging device according to a second embodiment. B is a circuit diagram showing a main part (prefilter) of a solid-state imaging device according to a second embodiment. C is a circuit diagram showing a main part (front filter) of a solid-state imaging device according to a modification of the second embodiment.

FIG. 5A shows the main part of the solid-state imaging device according to the third embodiment (S
/H circuit). B is a circuit diagram showing a main part (S/H circuit) of a solid-state imaging device according to a first modification of the third embodiment.

FIG. 6 is a circuit diagram showing a main part (S/H circuit) of a solid-state imaging device according to a second modification of the third embodiment.

FIG. 7 is an equivalent circuit diagram of an S/H circuit according to a second modification of the third embodiment.

FIG. 8 is a circuit diagram showing main parts of a conventional solid-state imaging device.

FIG. 9 is a circuit diagram illustrating the configuration of a conventional solid-state imaging device mainly using a white noise source.

FIG. 10A is a characteristic diagram showing the spectrum of a white noise source. B is a characteristic diagram showing the frequency characteristics of the output section (for k times speed). C is a characteristic diagram showing the noise spectrum of the output section (for k times speed). D is a characteristic diagram showing the operating frequency band of the solid-state image sensor at l times the speed.

FIG. 11A is a characteristic diagram showing the frequency characteristics of an output section dedicated to l-times speed. B is a characteristic diagram showing the noise spectrum of the output section dedicated to l times the speed.

[Explanation of symbols]

1 CCD solid-state image sensor 2, 3 Source follower circuit 3a, 3b FET 4 Power supply 5 Switch 6 Constant current source (variable constant current) 6a FET 7 Power supply 11 CDS circuit 12 Prefilter 13 S/H circuit 14,15 Switch 21 Switch (for sampling) 22, 23 Switch 24 Constant current source (variable constant current) 24a FET 25 Power supply

Claims (1)

[Claims] 1. A solid-state imaging device that is used by switching the output frequency of a solid-state imaging device, comprising means for changing the frequency characteristics of an output section in accordance with the output frequency of the solid-state imaging device. .