JPH04344613A - Active matrix type liquid crystal display device - Google Patents

Abstract

PURPOSE:To realize low cost and high manufacture yield although a screen is large as to the active matrix type liquid crystal display device which performs voltage writing and holding operation for liquid crystal cells by using thin film transistors(TFT). CONSTITUTION:The active matrix type liquid crystal display device has reference potential supply buses 16 and scan bus lines 12 formed between arrays of display electrodes 14 formed in matrix on one of two insulating substrates which are formed opposite each other, address TFTs 20 connected to them and the display electrodes 14, and TFTs 22 for compensation which are connected to them and other display electrodes 14; and the address TFTs 20 and TFTs 22 for compensation are provided slantingly opposite each other across the reference potential supply bus lines 16.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix liquid crystal display device in which a thin film transistor is provided corresponding to each pixel, and the switching action of the thin film transistor is used to write and hold a voltage to a liquid crystal cell.

0002

2. Description of the Related Art Active matrix display devices use liquid crystal as a display medium, and are used as thin display devices for information terminals like simple matrix display devices. Active matrix display devices can operate as if a large number of pixels are each driven independently, so even if the number of pixels increases with an increase in display capacity, the duty ratio remains the same as in simple matrix display devices. Problems such as a decrease in contrast and a decrease in viewing angle due to a decrease in contrast do not occur. For this reason, active matrix liquid crystal display devices can provide a color display comparable to that of a cathode ray tube (CRT), and are increasingly being used as thin flat displays.

[0003]As a system that can realize high manufacturing yields and beautiful full-color display, as shown in (Japanese Patent Application No. 2-218966), thin film transistors (TFT-C) are used to compensate for DC level shifts that cause afterimages. ) has been proposed. This proposed active matrix display device will be explained using FIG. 19.

A display electrode 1 is disposed on one insulating substrate 1 of two insulating substrates that are arranged opposite to each other with a liquid crystal (not shown) in between.
4 are arranged in a matrix. Display electrode 14 in the figure
A reference potential supply bus line 16 is formed at the center between the display electrodes 14 in the row direction. Two scan canvas lines 12 having a common terminal are formed in parallel on both sides of the reference potential supply bus line 16 between the display electrodes 14.

The display electrode 14 includes one of the source and drain of an address thin film transistor (TFT-A) 20 and a compensation thin film transistor (TFT-C) 22 that compensates for DC level shift and provides redundancy. sauce·
One side of the drain is connected. The other one of the source and drain of TFT-A20 and the other one of the source and drain of TFT-C22 are connected to the reference potential supply bus line 16.
It is connected to the.

[0006] One of the 12 two scan canvas lines
The gate of TFT-A20 is connected to one of the wires, and the gate of TFT-C22 is connected to the other one. These 2
The two thin film transistors are operated by configuring the drive waveform of the scan canvas line 12 with an address pulse and a compensation pulse. Striped data bus lines 10 are formed on the other insulating substrate (not shown) sandwiching the liquid crystal in the column direction of the display electrodes 14 in the figure, facing the display electrodes 14.

Display is performed by controlling the voltage applied between the data bus line 10 and the display electrode 14. With this configuration, a high yield can be obtained because no intersection occurs between the scan canvas line 12 and the data bus line 10 on the TFT substrate 1, and a beautiful display can be realized by compensating for the DC level shift.

Further, the reference potential supply bus line 16 is connected to T
By using two electrode layers: the electrode that constitutes the source/drain of FT-A20 and TFT-C22, and the electrode that constitutes the gate, it can be completely multi-layered, so the structure is difficult to cause disconnection defects. Can be done.

[0009]

[Problems to be Solved by the Invention] However, although the scan canvas line 12 can partially have a multilayer structure by using these two electrode layers,
The connection portion between 20 and TFT-C 22 needs to be composed of only a gate layer, and cannot have a multilayer structure, so disconnection defects are likely to occur.

Furthermore, since the two parallel scan canvas lines 12 are connected only at the terminal portions, if even one disconnection occurs in the scan canvas lines 12, it will be displayed as a line defect. In this way, the active matrix display device uses T as a switching element for each pixel.
The structure becomes complicated because FT must be formed.
There is a problem in that the above-mentioned defects are likely to occur during the manufacturing process. In addition, when trying to manufacture a large-screen active matrix display device, large manufacturing equipment is required, resulting in high equipment costs, and at the same time, the above-mentioned defects reduce manufacturing yields, resulting in high costs. be. Therefore, there is a problem in that its practical use is currently limited to relatively small screen sizes.

An object of the present invention is to provide an active matrix type display device that can realize a high manufacturing yield at low cost even with a large screen.

0012

[Means for Solving the Problems] The above object is to provide two insulating substrates that are arranged opposite to each other with a liquid crystal interposed therebetween, and a plurality of display electrodes formed in a matrix on one of the two insulating substrates. , a reference potential supply bus line formed between the rows of the plurality of display electrodes, and a reference potential supply bus line formed between the rows of the plurality of display electrodes,
A set of two scan canvas lines formed in parallel on both sides of the reference potential supply bus line, a gate connected to one of the two scan canvas lines, and the display electrode or the reference potential. an addressing thin film transistor having a drain connected to one of the supply bus lines and a source connected to the other of the display electrode or the reference potential supply bus line; a connected gate, another display electrode disposed opposite to the display electrode with respect to the reference potential supply bus line, or a drain connected to one of the reference potential supply bus lines, and the other display electrode or a compensating thin film transistor having a source connected to the other of the reference potential supply bus lines; and a compensation thin film transistor formed on the other of the two insulating substrates, facing the display electrode and in the column direction of the display electrode. In a facing matrix type active matrix liquid crystal display device having striped data bus lines, the addressing thin film transistor and the compensation thin film transistor are provided at positions diagonally opposite to each other with the reference potential supply bus line in between. This is achieved by an active matrix liquid crystal display device characterized by:

[0013] The above object also includes two insulating substrates that are arranged opposite to each other with a liquid crystal in between, a plurality of display electrodes formed in a matrix on one of the two insulating substrates, and a plurality of display electrodes formed in a matrix on one of the two insulating substrates. a reference potential supply bus line formed between rows of display electrodes; a pair of scan canvas lines formed parallel to both sides of the reference potential supply bus line between the plurality of display electrode rows; A gate connected to one of the pair of scan canvas lines, a drain connected to one of the display electrode or the reference potential supply bus line, and a drain connected to the other of the display electrode or the reference potential supply bus line. an addressing thin film transistor having a source connected thereto, a gate connected to the other of the pair of scan canvas lines, and a transistor disposed opposite the display electrode with respect to the reference potential supply bus line; a compensating thin film transistor comprising a drain connected to one of the display electrode or the reference potential supply bus line, and a source connected to the other display electrode or the other of the reference potential supply bus line; In the active matrix type liquid crystal display device of the facing matrix type, the active matrix type liquid crystal display device has a striped data bus line formed in the column direction of the display electrodes and facing the display electrodes on the other side of the insulating substrate. This is achieved by an active matrix type liquid crystal display device characterized in that it has connecting portions that respectively connect the scan canvas lines of the set of two scan canvas lines between the rows.

[0014]

[Operation] According to the present invention, it is possible to realize multilayering of two scan canvas lines formed in parallel on both sides of the reference potential supply bus line, and to suppress the occurrence of line defects in the scan canvas lines. It is possible to realize a large-screen active matrix type display device, and furthermore, it is possible to realize a high manufacturing yield at low cost.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An active matrix liquid crystal display device according to a first embodiment of the present invention will be described with reference to FIG. liquid crystal(
A plurality of display electrodes 14 are formed in a matrix on one insulating substrate 1 of two insulating substrates that are arranged to face each other with a substrate (not shown) interposed therebetween.

A reference potential supply bus line 16 is formed between rows of a plurality of display electrodes 14. multiple display electrodes 14
A pair of scan canvas lines 12 are formed parallel to both sides of the reference potential supply bus line 16 between the rows. A gate is connected to one scan canvas line 12 among a set of scan canvas lines 12, and a display electrode 14
An addressing thin film transistor TFT-A20 is formed connected between the reference potential supply bus line 16 and the reference potential supply bus line 16.

Further, a gate is connected to the other scan canvas line 12 of the set of scan canvas lines 12,
A compensating thin film transistor TFT-C22 connected between the other display electrode 14 and the reference potential supply bus line 16 is formed. Address thin film transistor TFT-A2
0, the display electrodes 14 arranged adjacent to each other form a set, and the compensation thin film transistor TFT-C22 is
Other display electrodes 14 provided on the opposite side via the reference potential supply bus line 16 and arranged adjacent to each other form a set, and are compensated with the address thin film transistor TFT-A 20 set on the reference potential supply bus line 16. The sets of thin film transistors TFT-C22 are arranged alternately.

Striped data bus lines (not shown) are formed on the other insulating substrate (not shown), facing the display electrodes 14, in the column direction of the display electrodes 14. Display is performed by controlling the voltage applied between the data bus line and the display electrode 14. Like the active matrix liquid crystal display device according to this embodiment, the TF
If T is arranged, the position of the part where the scan canvas line 12 is composed only of the gate electrode layer of the TFT (the TFT section and its vicinity) will be far away between the two scan canvas lines 12, for example, the active Even if large foreign matter gets mixed in during the formation of the gate electrode layer in the manufacturing process of a matrix type liquid crystal display device and the gate electrode corresponding layer portions of the two scan canvas lines 12 are simultaneously disconnected, the two scan canvas lines 12 in this area At least one of the scan canvas lines 12 is multilayered and does not become a line defect in the scan canvas lines 12. In other words, the source of one multi-layered scan canvas line 12
This means that they are connected by the layer corresponding to the drain electrode.

A method of manufacturing an active matrix liquid crystal display device according to a first embodiment of the present invention will be explained with reference to FIGS. 2 to 6. 2 to 5 show the substrate bottom pattern of the active matrix liquid crystal display device of this example, and FIG.
a) to (d) show schematic cross-sectional views taken along the line XX of FIGS. 2 to 5. First, in order to form the display electrode 31, which is a transparent electrode, on the glass substrate 1, ITO 30 is formed to a thickness of 50 nm by sputtering. Next, n+ a- on ITO30
The ohmic contact layer 32 of the Si layer is formed by plasma CVD.
After forming the substrate to a thickness of 30 nm using the method, openings 34 for connecting source/drain electrodes, display electrodes 31, and scan canvas lines 12 are patterned. The shaded areas in the figure are the source/drain and electrode patterns (Fig. 2, Fig. 6(a)
).

Next, a 30 nm thick a-S film is applied to the entire surface of the substrate 1.
A semiconductor layer 36 is formed by growing and patterning i. First layer gate insulating film 3 of SiN layer on semiconductor layer 36
8 to a thickness of about 50 nm by plasma CVD, patterning for element isolation is performed. The shaded area in FIG. 3 is the element isolation pattern (FIG. 3, FIG. 6(b)). Next, S.
After forming the second gate insulating film 40 of the iN layer to a thickness of about 250 nm by plasma CVD, an opening 42 is formed (FIGS. 4 and 6(c)).

Furthermore, Al was deposited to a thickness of 60 mm by sputtering.
After forming by 0 nm, the scan canvas line 12 and the reference voltage supply bus line 16 are patterned. Figure 5
The middle shaded area is the bus line pattern (Fig. 5, Fig. 6(d)
)). By doing this, the reference potential supply bus line 1
6 and the scan canvas line 12 can each be multilayered using ITO, which is a source/drain electrode material, and Al, which is a gate electrode material.

An active matrix liquid crystal display device according to a second embodiment of the present invention will be explained with reference to FIG. A plurality of display electrodes 14 are formed in a matrix on one insulating substrate 1 of two insulating substrates placed opposite each other with a liquid crystal (not shown) in between. A reference potential supply bus line 16 is formed between rows of the plurality of display electrodes 14. A pair of scan canvas lines 1 are arranged between the rows of the plurality of display electrodes 14 and parallel to both sides of the reference potential supply bus line 16.
2 is formed. An addressing thin film transistor TFT-A 20 is formed whose gate is connected to one scan canvas line 12 out of a set of scan canvas lines 12 and connected between the display electrode 14 and the reference potential supply bus line 16 .

Further, a gate is connected to the other scan canvas line 12 of the set of scan canvas lines 12,
A compensating thin film transistor TFT-C22 connected between the other display electrode 14 and the reference potential supply bus line 16 is formed. The addressing thin film transistor TFT-A20 of the display electrode 14 in a certain row and the display electrode 14 in the adjacent row
A compensation thin film transistor TFT-C22 is connected symmetrically to the reference potential supply bus line 16.

Each of the two scan canvas lines 12 is connected by a connecting portion 50 at the center of the figure. Striped data bus lines (not shown) are formed on the other insulating substrate (not shown), facing the display electrodes 14, in the column direction of the display electrodes 14. Display is performed by controlling the voltage applied between the data bus line and the display electrode 14.

[0025] By doing this, unless there are two or more disconnections between adjacent connection points, drive voltage can be supplied to the gates of all TFTs even if there is a disconnection, which will prevent display defects. Never. In particular, when the TFTs constituting the matrix have a top gate staggered structure, by using the same conductive layer as the drain and source of the TFT as the conductive layer connecting the two scan canvas lines 12, the reference potential can be supplied when connected. The influence of the intersection with the bus line 16 can be minimized. That is, the cross-sectional structure of this intersection can be made the same as the cross-sectional structure of the overlapping portion of the source/drain and gate of the TFT, and the increase in the overlapping area due to connecting the two scan canvas lines 12 is minimal. For example, if the panel is 480x64
0 color pixel (stripe configuration), the overlap of the gate and drain in the channel direction per TFT is 5 μm (the overlap in the channel and vertical direction is 20 μm), the overlap of the gate and drain per line of the scan canvas is , 5×20×640×3=192000 μm2
becomes.

On the other hand, two scan canvas lines 1
2. If 10 connection points are provided per line, the overlap in this part will be 10 per line of scan canvas.
×10×10=1000 μm2, and the increase in overlap can be suppressed to 1% or less. As described above, according to the present embodiment, by connecting the two scan canvas lines 12 provided in parallel on both sides of the reference potential supply bus line 16 at several points within the display area, multiplexing of the scan canvas lines 12 can be achieved. The yield rate for disconnection display defects can be greatly improved.

A method of manufacturing an active matrix liquid crystal display device according to a second embodiment of the present invention will be described with reference to FIGS. 8 to 12. 8 to 11 show the substrate bottom pattern of the active matrix liquid crystal display device of this example, and FIGS. 12(a) to 12(d) are schematic cross-sectional views taken along the line
a') to (d') show schematic cross-sectional views along the Y-Y line. First, in order to form a display electrode 31 which is a transparent electrode on a glass substrate 1, an ITO film having a thickness of 50 nm is formed by sputtering.
form 30. Next, n+ a-Si on ITO30
After forming the ohmic contact layer 32 with a thickness of 30 nm by plasma CVD method, source/drain electrodes,
The display electrode 31 and the opening 34 for connection to the scan canvas are patterned. The shaded area in Figure 8 is the source and drain.
It is an electrode pattern (Fig. 8, Fig. 12(a), (a'))
.

Next, a 30 nm thick a-S film is applied to the entire surface of the substrate 1.
A semiconductor layer 36 is formed by growing and patterning i. First layer gate insulating film 3 of SiN layer on semiconductor layer 36
8 to a thickness of about 50 nm by plasma CVD, patterning for element isolation is performed. The shaded area in FIG. 9 is the element isolation pattern (FIG. 9, FIG. 12(b), (b'))
.

Next, after forming second gate insulating films 40 and 43 of the SiN layer to a thickness of about 250 nm by plasma CVD, openings 42 and 44 are formed (FIG. 10,
Fig. 12(c), (c')). Furthermore, after forming Al to a thickness of 600 nm by sputtering, the scan canvas line 12 and the reference voltage supply bus line 16 are patterned. The shaded area in FIG. 11 is a bus line pattern. At this time, the two scan canvas lines 12 are connected by the connection electrode (ITO) 30 through the already formed opening 44 (FIGS. 11, 12(d),
(d')).

As described above, according to this embodiment, multiplexing of scan canvas lines can be realized by connecting two scan canvas lines, so that it is possible to manufacture a TFT liquid crystal display with high yield and low cost. becomes. An active matrix liquid crystal display device according to a third embodiment of the present invention will be explained using FIG. 13.

A plurality of display electrodes 14 are formed in a matrix on the insulating substrate 1, one of two insulating substrates placed opposite to each other with a liquid crystal (not shown) interposed therebetween. A reference potential supply bus line 16 is formed between rows of the plurality of display electrodes 14. A pair of scan canvas lines 12 are formed between rows of the plurality of display electrodes 14 and parallel to both sides of the reference potential supply bus line 16 .

An addressing thin film transistor TFT-A 20 is formed whose gate is connected to one scan canvas line 12 out of a set of scan canvas lines 12 and connected between the display electrode 14 and the reference potential supply bus line 16. There is. In addition, a compensating thin film transistor TFT-C22 is formed whose gate is connected to another one of the scan canvas lines 12 of the set of scan canvas lines 12 and connected between the other display electrode 14 and the reference potential supply bus line 16. has been done.

Addressing thin film transistor TFT-A2
0, the display electrodes 14 arranged adjacent to each other form a set, and the compensation thin film transistor TFT-C22 is
Other display electrodes 14 provided on the opposite side via the reference potential supply bus line 16 and arranged adjacent to each other form a set, and are compensated with the address thin film transistor TFT-A 20 set on the reference potential supply bus line 16. The sets of thin film transistors TFT-C22 are arranged alternately.

Each of the two scan canvas lines 12 is connected by a connecting portion 50 at the center of the figure. Striped data bus lines (not shown) are formed on the other insulating substrate (not shown), facing the display electrodes 14, in the column direction of the display electrodes 14. Display is performed by controlling the voltage applied between the data bus line and the display electrode 14.

A method for manufacturing an active matrix liquid crystal display device according to a third embodiment of the present invention is illustrated in FIGS. 14 to 18.
Explain using. 14 to 17 show the substrate bottom pattern of the active matrix liquid crystal display device of this example, and FIGS. 18(a) to 18(d) are schematic cross-sectional views taken along line X-X, and FIGS. d') shows a schematic cross-sectional view along the Y-Y line.

First, in order to form the display electrode 31, which is a transparent electrode, on the glass substrate 1, a thickness of 50 mm is formed by sputtering.
Form ITO30 of nm thickness. Next, n on ITO30
+ After forming an ohmic contact layer 32 of a-Si layer to a thickness of 30 nm by plasma CVD, patterning is performed for source/drain electrodes, display electrodes 31, and openings 34 for scan canvas connection. The shaded areas in Fig. 14 are the source/drain and electrode patterns (Fig. 14, Fig. 18(
a), (a′)).

Next, a-S with a thickness of 30 nm is applied to the entire surface of the substrate 1.
A semiconductor layer 36 is formed by growing and patterning i. First layer gate insulating film 3 of SiN layer on semiconductor layer 36
8 to a thickness of about 50 nm by plasma CVD, patterning for element isolation is performed. The shaded area in FIG. 15 is the element isolation pattern (FIG. 15, FIG. 18(b), (b'
)).

Next, after forming second-layer gate insulating films 40 and 43 of SiN layers to a thickness of about 250 nm by plasma CVD, openings 42 and 44 are formed (FIG. 16,
Fig. 18(c), (c')). Furthermore, after forming Al to a thickness of 600 nm by sputtering, the scan canvas line 12 and the reference voltage supply bus line 16 are patterned. The shaded area in FIG. 17 is a bus line pattern. At this time, the two scan canvas lines 12 are connected by the connection electrode (ITO) 30 through the opening 44 that has already been formed (FIGS. 17, 18(d),
(d')).

As described above, according to this embodiment, it is possible to effectively combine the multiplexing of two scan canvas lines and multilayering, so that the yield is high even on a large screen, and a low-cost TFT liquid crystal display can be used. Manufacturing becomes possible.

[0040]

As described above, according to the present invention, it is possible to suppress the occurrence of line defects in scan canvas lines, and it is possible to manufacture a TFT liquid crystal display at a low cost and with a high yield even on a large screen.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an active matrix liquid crystal display device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a manufacturing process of an active matrix liquid crystal display device according to a first embodiment of the present invention.

FIG. 3 is a diagram showing a manufacturing process of an active matrix liquid crystal display device according to a first embodiment of the present invention.

FIG. 4 is a diagram showing a manufacturing process of an active matrix liquid crystal display device according to a first embodiment of the present invention.

FIG. 5 is a diagram showing a manufacturing process of an active matrix liquid crystal display device according to a first embodiment of the present invention.

FIG. 6 is a diagram showing a manufacturing process of an active matrix liquid crystal display device according to a first embodiment of the present invention.

FIG. 7 is a diagram showing an active matrix liquid crystal display device according to a second embodiment of the present invention.

FIG. 8 is a diagram showing a manufacturing process of an active matrix liquid crystal display device according to a second embodiment of the present invention.

FIG. 9 is a diagram showing a manufacturing process of an active matrix liquid crystal display device according to a second embodiment of the present invention.

FIG. 10 is a diagram showing a manufacturing process of an active matrix liquid crystal display device according to a second embodiment of the present invention.

FIG. 11 is a diagram showing a manufacturing process of an active matrix liquid crystal display device according to a second embodiment of the present invention.

FIG. 12 is a diagram showing a manufacturing process of an active matrix liquid crystal display device according to a second embodiment of the present invention.

FIG. 13 is a diagram showing an active matrix liquid crystal display device according to a third embodiment of the present invention.

FIG. 14 is a diagram showing a manufacturing process of an active matrix liquid crystal display device according to a third embodiment of the present invention.

FIG. 15 is a diagram showing a manufacturing process of an active matrix liquid crystal display device according to a third embodiment of the present invention.

FIG. 16 is a diagram showing a manufacturing process of an active matrix liquid crystal display device according to a third embodiment of the present invention.

FIG. 17 is a diagram showing a manufacturing process of an active matrix liquid crystal display device according to a third embodiment of the present invention.

FIG. 18 is a diagram showing a manufacturing process of an active matrix liquid crystal display device according to a third embodiment of the present invention.

FIG. 19 is a diagram showing a proposed active matrix liquid crystal display device.

[Explanation of symbols]

1... Insulating substrate 10... Data bus line 12... Scan canvas line 14... Display electrode 16... Reference potential supply bus line 20... Thin film transistor (TFT-A) 22... Thin film transistor (TFT-C) 30... ITO 31... Display electrode 32 …Ohmic contact layer 34…Opening 36…Semiconductor layer 38…Gate insulating film 40…Gate insulating film 42…Opening 43…Gate insulating film 44…Opening 50…Connecting portion

Claims (4)

[Claims] 1. Two insulating substrates facing each other with a liquid crystal interposed therebetween, a plurality of display electrodes formed in a matrix on one of the two insulating substrates, and a distance between the rows of the plurality of display electrodes. a set of two scan canvas lines formed between the plurality of display electrode rows and parallel to both sides of the reference potential supply bus line, and a set of the two scan lines. a gate connected to one of the scan canvas lines, a drain connected to one of the display electrode or the reference potential supply bus line, and a source connected to the other of the display electrode or the reference potential supply bus line. an addressing thin film transistor comprising;
A gate connected to the other of the pair of scan canvas lines, and another display electrode arranged opposite to the display electrode with respect to the reference potential supply bus line or one of the reference potential supply bus lines. a compensating thin film transistor including a connected drain and a source connected to the other display electrode or the other of the reference potential supply bus lines; In the active matrix liquid crystal display device of a facing matrix type having striped data bus lines formed in the column direction of the display electrodes, the addressing thin film transistor and the compensation thin film transistor are connected to the reference potential supply bus line. An active matrix liquid crystal display device characterized in that the active matrix liquid crystal display device is provided at diagonally opposite positions with the two sides in between. 2. The active matrix liquid crystal display device according to claim 1, further comprising: a set of thin film transistors for addressing the display electrodes arranged adjacent to each other in the row direction;
A set of the compensation thin film transistors of the other display electrodes provided on the opposite side of the reference potential supply bus line and arranged adjacent to each other are alternately connected to the reference potential supply bus line. An active matrix liquid crystal display device characterized by: 3. Two insulating substrates facing each other with a liquid crystal in between, a plurality of display electrodes formed in a matrix on one of the two insulating substrates, and a distance between the rows of the plurality of display electrodes. a set of two scan canvas lines formed between the plurality of display electrode rows and parallel to both sides of the reference potential supply bus line, and a set of the two scan lines. a gate connected to one of the scan canvas lines, a drain connected to one of the display electrode or the reference potential supply bus line, and a source connected to the other of the display electrode or the reference potential supply bus line. an addressing thin film transistor comprising;
A gate connected to the other of the pair of scan canvas lines, and another display electrode arranged opposite to the display electrode with respect to the reference potential supply bus line or one of the reference potential supply bus lines. a compensating thin film transistor including a connected drain and a source connected to the other display electrode or the other of the reference potential supply bus lines; In the active matrix liquid crystal display device of a facing matrix type having striped data bus lines formed in the column direction of the display electrodes, the pair of scan bus lines is arranged between the rows of the display electrodes. An active matrix liquid crystal display device characterized in that it has a connection part that connects each scan canvas line to each other. 4. The active matrix liquid crystal display device according to claim 1, further comprising connecting portions for connecting each scan canvas line of the pair of scan canvas lines between the rows of the display electrodes. An active matrix liquid crystal display device featuring: