JPH04329155A - Method for forming control grid - Google Patents

Method for forming control grid

Info

Publication number
JPH04329155A
JPH04329155A JP12660691A JP12660691A JPH04329155A JP H04329155 A JPH04329155 A JP H04329155A JP 12660691 A JP12660691 A JP 12660691A JP 12660691 A JP12660691 A JP 12660691A JP H04329155 A JPH04329155 A JP H04329155A
Authority
JP
Japan
Prior art keywords
pins
control grid
axes
forming
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12660691A
Other languages
Japanese (ja)
Other versions
JP2837286B2 (en
Inventor
Hidemasa Aiba
相羽 英全
Masayuki Tone
利根 昌幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP12660691A priority Critical patent/JP2837286B2/en
Publication of JPH04329155A publication Critical patent/JPH04329155A/en
Application granted granted Critical
Publication of JP2837286B2 publication Critical patent/JP2837286B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Dot-Matrix Printers And Others (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
  • Electrophotography Using Other Than Carlson'S Method (AREA)

Abstract

PURPOSE:To substantially make gathering and bonding processing possible using a row or line direction as one unit by providing connection pin groups erected at a pitch interval of an integral multiple of loop electrodes in one row or a plurality of rows along the direction crossing an axial wire group extending direction at an almost right angle. CONSTITUTION:In a connection pin stand 20, pins 22 are vertically implanted in an insulating connector resin plate 21 in the number corresponding to the number of loop electrodes to be formed in two rows so as to be positionally shifted before and behind each other and the implanting interval of the pins 22 is set twice that of the loop electrodes at every row. The connection pin stand 20 is inserted from below in such a state that a flat cable 10 is provided under tension to be brought into contact with the loop surfaces of the pins 22 corresponding to axial wires 10a from which insulating coatings 10b are removed and heat is applied to the pins 22 in a degree melting solder and the solder only of the regions being in contact with the pins 22 is melted through the pins 22 to electrically connect the axial wires 10a and the pins 22.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、所定方向に平行に延設
してなる絶縁被膜軸線群の隣接する軸線同士を夫々電気
接合して多数本のループ電極からなる制御グリッドの形
成方法に係り、特に電磁気的に開閉可能なトナー通過孔
群を所定方向に沿って配列した制御グリッドを挟んでト
ナー担持体と背面電極を対面配置してなる画像形成装置
に用いる制御グリッドの形成方法に関する。
[Field of Industrial Application] The present invention relates to a method of forming a control grid consisting of a large number of loop electrodes by electrically connecting adjacent axes of a group of insulating coating axes extending parallel to a predetermined direction. In particular, the present invention relates to a method of forming a control grid used in an image forming apparatus in which a toner carrier and a back electrode are disposed facing each other with a control grid in which a group of electromagnetically openable and closable toner passage holes are arranged in a predetermined direction.

【0002】0002

【従来の技術】従来より潜像担持体として機能する感光
体ドラムを用いずにトナー担持体上に担持させたトナー
を直接、画像情報に対応させてドットパターン上に記録
材上に転送させる画像形成装置は公知である。(スエー
デン国特許願第8704883号他)
[Prior Art] Conventionally, images are created in which toner carried on a toner carrier is directly transferred onto a recording material in a dot pattern corresponding to image information without using a photosensitive drum that functions as a latent image carrier. Forming devices are known. (Swedish Patent Application No. 8704883, etc.)

【0003】かかる装置構成を図5に示す基本構成図に
基づいて簡単に説明するに、電磁気的にトナーを薄膜状
に保持したスリーブ状の現像ローラを含むトナー担持体
1と、該トナー担持体1に対向配置された背面電極2と
の間にマトリックス状の制御グリッド3を配し、該制御
グリッド3をX−Y軸方向に通電制御することにより、
該マトリックス間のトナー通過孔3aに作用する現像電
界を画像情報に対応させて選択的に遮断若しくは導通可
能に構成し、これにより前記背面電極2表面に配した記
録紙4上に前記制御グリッド3内のトナー通過孔3aを
介して画像情報に対応したトナーの転送が可能構成する
とともに、図6に示すように前記制御グリッドを主走査
方向(X)に延在する、夫々各対づつループ状に形成し
た複数本のX軸線X1ーX2…と、該軸線に対し所定角
度傾斜させて狭幅に平行に延設する各一対のループ状Y
軸線Ya1ーYa2…からなるマトリックス状の導線群
により形成し、前記各対毎のY軸線Ya1ーYa2とX
軸線X1ーX2に挟まれる部位をトナー通過孔3aとな
すように形成する。
The configuration of such an apparatus will be briefly explained based on the basic configuration diagram shown in FIG. 5. The toner carrier 1 includes a sleeve-shaped developing roller that electromagnetically holds toner in a thin film, and the toner carrier 1. A matrix-like control grid 3 is disposed between the back electrode 2 and the back electrode 2 disposed opposite to the control grid 1, and the control grid 3 is energized in the X-Y axis direction.
The developing electric field acting on the toner passage hole 3a between the matrices is configured to be selectively cut off or conductive in accordance with image information, thereby causing the control grid 3 to appear on the recording paper 4 disposed on the surface of the back electrode 2. As shown in FIG. 6, each pair of control grids is arranged in a loop shape extending in the main scanning direction (X). A plurality of X-axis lines X1-X2... formed in
It is formed by a matrix-like conductor group consisting of axes Ya1-Ya2..., and the Y-axes Ya1-Ya2 and X of each pair are
A portion sandwiched between the axes X1 and X2 is formed to form a toner passage hole 3a.

【0004】そしてかかる制御グリッド3は記録紙4の
挿通速度と対応させてX1ーX2線…を順次時間差をも
って通電させる事により、前記通過孔3aを通過するド
ット状の印字パターン30は結果として1列状になり、
この結果前記Y軸ループ線Ya1ーYa2…幅、言換え
れば主走査方向におけるトナー通過孔間隔を特に密にし
なくても密なドットパターンの形成が可能となるもので
ある。
[0004]The control grid 3 sequentially energizes the X1 to X2 lines with a time difference in accordance with the insertion speed of the recording paper 4, so that the dot-shaped printing pattern 30 passing through the passage hole 3a is made into one pattern as a result. form a row,
As a result, it is possible to form a dense dot pattern without making the width of the Y-axis loop line Ya1-Ya2, or in other words, the interval between the toner passage holes in the main scanning direction particularly dense.

【0005】[0005]

【発明が解決しようとする課題】さて前記装置において
本出願人は、導線を絶縁層で被覆したワイヤ電極をマト
リクス状に配列固定して制御グリッドを製造する方法を
検討しているが、ワイヤ電極を用いた場合は多数本のワ
イヤ電極をX軸方向とY軸方向に夫々平行に延設してマ
トリックス状に配列接合した後、若しくは前記配列接合
する前に、夫々隣接する一対のワイヤ電極端同士を電気
的に接合して閉ループを形成すると共に該接合部に夫々
引出し線と連結して制御グリッドを形成するものである
為に、言い換えればワイヤ電極対の端部同士と引出し線
との接合処理をトナー通孔の行及び列数の各2倍(両端
)行わなければならず、例えば300ドットのグリッド
を製作する場合は、300×2回(行方向)+8×2回
(列方向)分だけ、引き出し線との接合処理を行なう必
要があり、製造工程が極めて煩雑化する。
[Problems to be Solved by the Invention] In the above-mentioned device, the present applicant has investigated a method of manufacturing a control grid by arranging and fixing wire electrodes in a matrix, in which conductive wires are covered with an insulating layer. If a large number of wire electrodes are used, after extending them parallel to each other in the X-axis direction and the Y-axis direction and arranging them in a matrix, or before arranging and joining them, connect the ends of each adjacent pair of wire electrodes. They are electrically connected to each other to form a closed loop, and each connected portion is connected to a lead wire to form a control grid. In other words, the ends of the wire electrode pair are connected to each other and the lead wires. The processing must be performed twice the number of rows and columns of toner holes (on both ends). For example, to make a grid of 300 dots, the processing must be performed 300 x 2 times (row direction) + 8 x 2 times (column direction). Therefore, it is necessary to perform bonding processing with the lead wire, which makes the manufacturing process extremely complicated.

【0006】かかる欠点を解消するために本発明者は先
に、図7に示すように、一体的に平行に延設する一対の
ワイヤ電極101、102間に間隔保持用のダミー線1
00を介在して形成されるフラットケーブル10を用い
、該ケーブル10群の端側と引き出し線群の端側同士を
テープ状フィルム110を用いて仮固定した後、前記隣
接するフラットケーブル10の、対峙するワイヤ電極1
01A、101Bの端側同士と引き出し線111端間の
電気的接合を行ない、そして最後に前記ダミー線100
を引裂くように除去して閉ループの隣り合わせに位置す
る電極101、102端間の電気的接合を解除する技術
を提案している。(特願昭2ー218155号)
In order to eliminate such drawbacks, the present inventor first proposed a dummy wire 1 for maintaining a distance between a pair of wire electrodes 101 and 102 that are integrally extended in parallel, as shown in FIG.
After temporarily fixing the end sides of the group of cables 10 and the ends of the group of lead-out wires using a tape-like film 110 using the flat cables 10 formed with 00 interposed therebetween, the adjacent flat cables 10 are Opposing wire electrode 1
Electrical connection is made between the end sides of 01A and 101B and the end of the lead wire 111, and finally the dummy wire 100
A technique is proposed in which the electrical connection between the adjacent ends of the electrodes 101 and 102 in a closed loop is broken by tearing and removing the electrodes. (Patent Application No. 2-218155)

【00
07】しかしながら前記構成を取っても前記ダミー線1
00を引裂く際にテープ状フィルムを円滑に引裂く事が
出来ない場合があるのみならず、例え引裂き可能である
にしても、引裂いた後の切断面がきれいにならず、又引
裂き端同士が再接合してリークの恐れが発生する。
00
[07] However, even with the above configuration, the dummy wire 1
When tearing 00, it may not be possible to tear the tape-like film smoothly, and even if it is possible to tear it, the cut surface will not be clean after tearing, and the torn edges may not be close to each other. There is a risk of leakage due to re-bonding.

【0008】本発明はかかる従来技術の欠点に鑑み、前
記接合処理を個々の電極対毎行うことなく前記列方向若
しくは行方向を1単位として実質的に集合接合処理を可
能にし、而も誤接続が生じることなく簡便且つ確実に前
記処理を可能にした制御グリッドの形成方法を提供する
ことを目的とする。
In view of the drawbacks of the prior art, the present invention makes it possible to substantially perform collective bonding processing in the column direction or row direction as one unit, without performing the bonding processing for each individual electrode pair. It is an object of the present invention to provide a method for forming a control grid that enables the above-mentioned processing simply and reliably without causing any problems.

【0009】[0009]

【課題を解決する為の手段】本発明は、前記したワイヤ
電極端同士を電気接合するものであるが、この場合下記
の様な問題点を解決しなければ前記目的を達成し得ない
[Means for Solving the Problems] The present invention electrically connects the ends of the wire electrodes described above, but in this case, the above object cannot be achieved unless the following problems are solved.

【0010】その第1が間隔設定である。即ち前記画像
形成装置において、高解像度で且つ高品質のドッド画像
を実現するにはトナー通過孔をの位置精度とともに、前
記ループ電極を形成するワイヤ対間隔を精度よく設定す
る事が前提となる。このため前記先願技術においてはワ
イヤ電極101A、101B端をテープ状フィルムを用
いて仮固定するように構成しているが、これのみでは精
度よい間隔設定が困難である。
The first is interval setting. That is, in order to realize a high-resolution and high-quality dot image in the image forming apparatus, it is necessary to accurately set the positional accuracy of the toner passage holes and the distance between the wire pairs forming the loop electrodes. For this reason, in the prior art, the ends of the wire electrodes 101A and 101B are temporarily fixed using a tape-like film, but it is difficult to accurately set the spacing using only this.

【0011】次にその第2は一体的な電気接合の問題で
ある。即ち前記制御グリッドは他側ループ電極を形成す
る隣接するワイヤ電極101、102同士が極めて近接
した位置にあるために、その電極同士の絶縁性を確保し
つつ対側のワイヤ電極端同士を接合するのは中々困難で
あり、この為前記先願技術においてはダミー電極とテー
プフィルムの組合せでその解決を図ったが、これのみで
も尚前記した問題が生じる。
The second problem is the problem of integral electrical connection. That is, in the control grid, since the adjacent wire electrodes 101 and 102 forming the other side loop electrode are located extremely close to each other, the ends of the wire electrodes on the opposite side are connected to each other while ensuring insulation between the electrodes. Therefore, in the prior art, the problem was solved by a combination of a dummy electrode and a tape film, but even this alone causes the above-mentioned problems.

【0012】そこで本発明は前記問題点を解決するため
に下記の特徴からなるターミナル処理方法を提案する。 即ち本発明は、前記軸線群延設方向とほぼ直交する方向
に沿って一列若しくは複数列状にループ電極の整数倍ピ
ッチ間隔で立設する接続ピン群を設けた点を第1の特徴
とする。この場合前記軸線が接触する部位におけるピン
幅は各ループ電極を構成する軸線間の離接間隔とほぼ同
等に設定するのがよい。
In order to solve the above problems, the present invention proposes a terminal processing method having the following features. That is, the first feature of the present invention is that a group of connection pins are provided in a row or in a plurality of rows along a direction substantially perpendicular to the direction in which the group of axes extends at intervals of an integer multiple of the pitch of the loop electrodes. . In this case, the pin width at the portion where the axes come into contact is preferably set to be approximately equal to the spacing between the axes constituting each loop electrode.

【0013】この場合前記ピンは、各端側で夫々ループ
電極と対応する数だけ必要であるが、前記ループ電極ピ
ッチは極めて狭小であるために、前記ピンをその狭小ピ
ッチ間隔に合せて植設するのは困難な場合がある。この
様な場合は各ピンを交互に前後に位置をずらせて2列若
しくは3列状に配置し、これに対応させて前記ピンピッ
チ間隔をループ電極の2倍若しくは3倍のピッチ間隔に
してもよい。
In this case, the number of pins corresponding to the number of loop electrodes is required on each end side, but since the pitch of the loop electrodes is extremely narrow, the pins are implanted in accordance with the narrow pitch interval. It can be difficult to do so. In such a case, the pins may be alternately shifted back and forth and arranged in two or three rows, and the pin pitch may be set to be twice or three times as large as the loop electrode. .

【0014】本発明の第2の特徴とするところは、前記
隣接するワイヤ電極101、102(以下軸線という)
同士を夫々の対応するピンに接触させた状態で熱、高周
波若しくはレーザエネルギーを前記ピンの接触部位に付
与する事にある。これにより必要に応じて前記軸線表面
の絶縁膜を除去しながら電気接合を行なう事を可能もす
る。尚、前記エネルギー付与は外部より付与してもよく
、又ピンを介して付与してもよい。
A second feature of the present invention is that the adjacent wire electrodes 101, 102 (hereinafter referred to as axis lines)
The purpose is to apply heat, high frequency, or laser energy to the contact portions of the pins while the two are in contact with their corresponding pins. This also makes it possible to perform electrical bonding while removing the insulating film on the surface of the axis, if necessary. Note that the energy may be applied from outside or may be applied via a pin.

【0015】[0015]

【作用】かかる技術手段によれば、ループ電極の整数倍
ピッチ間隔で立設するピンにより軸線同士の間隔設定を
精度よく行ない得る。この場合他側ループ側の軸線との
間の間隔設定については規定されていないが、これにつ
いては前記先願技術に記載したように、他側ループ電極
を形成する隣接する軸線同士を間隔保持用の1又は複数
のダミー線100を介して一体的に接続してなるフラッ
トケーブル10を用いる事により容易に解決し得る。
[Operation] According to this technical means, it is possible to accurately set the spacing between the axes using pins that are set up at pitches that are integral multiples of the loop electrodes. In this case, there is no provision for setting the distance between the axis of the other side loop, but as described in the prior art, it is necessary to maintain the distance between the adjacent axes forming the other side loop electrode. This can be easily solved by using a flat cable 10 that is integrally connected via one or more dummy wires 100.

【0016】又本発明はレーザ、高周波の様な結果的に
熱に変換するエネルギーか、若しくは熱エネルギーを直
接前記ピンとの接触部位に付与する構成を取るために、
前記他側ループ側の軸線が近接していても接続ピンと接
触する部分のみの電気接合が可能であるとともに、特に
熱エネルギーを用いた場合においては、必要に応じて電
気接合とともにその接触部位のみの絶縁膜除去を同時に
行ない得る。この場合前記絶縁膜除去と電気接合は同時
に行なう必要はなく、何等かの手段により絶縁膜を除去
した後電気接合を行なってもよい、又電気接合は一般的
に半田接合により行なわれるが、これのみに限定されな
い。
[0016] Also, the present invention adopts a configuration in which energy that is converted into heat as a result, such as a laser or high frequency, or thermal energy is applied directly to the contact portion with the pin,
Even if the axes of the other side loops are close to each other, it is possible to electrically bond only the part that contacts the connecting pin, and especially when thermal energy is used, it is possible to electrically bond only the contact area as necessary. Insulating film removal can be performed at the same time. In this case, it is not necessary to perform the insulating film removal and electrical bonding at the same time, and the electrical bonding may be performed after removing the insulating film by some means.Also, the electrical bonding is generally performed by soldering, but this is not necessary. Not limited to only.

【0017】又前記ピンと軸線との位置的安定性を確保
するために、その接触部位に対応するピン側を略L字状
に凹設し、該凹設部に軸線が載置可能に構成するのがよ
い。これにより位置精度の向上とともに接合面が2面と
なるために接合強度が安定し且つ強固になり、更にはL
字状の凹みである為にレーザ等の指向性エネルギー照射
も容易化する。
Furthermore, in order to ensure positional stability between the pin and the axis, the pin side corresponding to the contact area is recessed in a substantially L-shape so that the axis can be placed in the recess. It is better. This improves positional accuracy, and since there are two joint surfaces, the joint strength becomes stable and strong, and furthermore, L
Since it is a letter-shaped recess, it is also easier to irradiate with directional energy such as a laser.

【0018】[0018]

【実施例】以下、図面に基づいて本発明の実施例を例示
的に詳しく説明する。但しこの実施例に記載されている
構成部品の寸法、材質、形状、その相対配置などは特に
特定的な記載がない限りは、この発明の範囲をそれのみ
に限定する趣旨ではなく単なる説明例に過ぎない。図4
は本発明の実施例にかかるフラットケーブル10で、一
体的に平行に延設する一対の軸線101,102間に間
隔保持用のダミー線100を介在して形成している。こ
の場合、軸線101,102は、アルミ又は銅線からな
る芯線10aの周囲に絶縁被膜10bを被覆した2層構
造となし、一方前記ダミー線100は軸線101,10
2と同一の材料線を用いてもよいが、好ましくは軸線1
01,102より引張り強度が大なる絶縁性の異種材料
で形成するのがよい。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail by way of example with reference to the drawings. However, unless otherwise specified, the dimensions, materials, shapes, and relative positions of the components described in this example are not intended to limit the scope of this invention, but are merely illustrative examples. Not too much. Figure 4
1 is a flat cable 10 according to an embodiment of the present invention, in which a dummy wire 100 for maintaining a distance is interposed between a pair of axes 101 and 102 extending integrally in parallel. In this case, the axes 101 and 102 have a two-layer structure in which a core wire 10a made of aluminum or copper wire is covered with an insulating coating 10b, while the dummy wire 100
The same material wire as 2 may be used, but preferably the axis 1
It is preferable to use a different type of insulating material that has a higher tensile strength than 01 and 102.

【0019】又前記ダミー線100は1本のみに限定さ
れることなく、複数本を並列させて形成してもよいが、
その直径を軸線101,102の直径より大にすると、
図1に示す平面接合が困難になるために、前記ダミー線
100の直径は軸線101,102の直径と同等か小に
形成するのがよい。又軸線周囲の絶縁被膜は、ポリウレ
タンその他の熱昇華性樹脂若しくは熱溶融性樹脂を用い
るのがよい。
Further, the number of the dummy wires 100 is not limited to one, but a plurality of wires may be formed in parallel.
If the diameter is made larger than the diameter of the axes 101 and 102,
Since the plane joining shown in FIG. 1 becomes difficult, the diameter of the dummy wire 100 is preferably formed to be equal to or smaller than the diameter of the axes 101 and 102. The insulating coating around the axis is preferably made of polyurethane or other heat-sublimable resin or heat-melt resin.

【0020】図3は本発明の実施例にかかる接続ピン台
20の構成を示し、絶縁性のコネクタ樹脂板21上に形
成すべきループ電極数と対応する数のピン22を交互に
前後に位置をずらしながら2列状に垂直に植設するとと
もに、該ピン22の植設間隔を各列毎にループ電極のピ
ッチ間隔の2倍のピッチ間隔に設定する。尚、前記樹脂
板21はループ電極の引張りに耐え得る程度の肉厚と後
記する接合時における熱付与で劣化しない程度の耐熱性
が必要とされる。
FIG. 3 shows the configuration of a connecting pin stand 20 according to an embodiment of the present invention, in which a number of pins 22 corresponding to the number of loop electrodes to be formed on an insulating connector resin plate 21 are alternately positioned back and forth. The pins 22 are vertically planted in two rows while being shifted from each other, and the pitch between the pins 22 is set to be twice the pitch between the loop electrodes in each row. The resin plate 21 needs to be thick enough to withstand the tension of the loop electrode and have heat resistance to the extent that it will not deteriorate due to heat application during bonding, which will be described later.

【0021】又前記ピン22の幅寸法Lは形成すべきル
ープ電極間幅とほぼ同一に設定し、又前後に位置をずら
した隣接するピン22間の離接間隔Mは前記フラットケ
ーブル10と同一幅に設定している。
Further, the width L of the pin 22 is set to be almost the same as the width between the loop electrodes to be formed, and the spacing M between adjacent pins 22 whose positions are shifted back and forth is the same as that of the flat cable 10. It is set to width.

【0022】次にかかる実施例における接合方法につい
て説明する。先ず前もって、前記フラットケーブル10
の絶縁被膜10bを除去する。除去の方法は例えば図8
に示す様にフラットケーブル10を張設した状態で、対
応する軸線部位101、102にヒータ120(例えば
異方性導電膜接続用ヒータ)を押し当て該ヒータ120
により絶縁被膜10bが熱昇華する程度の熱を加える事
により簡単に除去出来る。そして図3に示すように、前
記フラットケーブル10の張設状態を維持した状態で、
下方より前記接続ピン台20を挿入し絶縁被膜10bを
除去した軸線10aと対応するピン22の腹面とを接触
させる。
Next, a joining method in this embodiment will be explained. First, in advance, the flat cable 10
The insulation coating 10b is removed. For example, the removal method is shown in Figure 8.
With the flat cable 10 stretched as shown in FIG.
This can be easily removed by applying heat to the extent that the insulation coating 10b is thermally sublimated. As shown in FIG. 3, with the flat cable 10 maintained in the stretched state,
The connecting pin stand 20 is inserted from below, and the axis 10a from which the insulating coating 10b has been removed is brought into contact with the ventral surface of the corresponding pin 22.

【0023】一方前記ピン22の腹面には前もって共晶
半田23が付着されており、この状態で前記ピン22に
半田23が溶融する程度の熱を加える事により該ピン2
2を介してピン22と接触している部位のみの半田23
が溶融し、導線10aとピン22間の電気接合がなされ
る。尚、前記ピン22の前記絶縁被膜部10bの除去は
前もって行なう必要もなく、例えば半田とともに前記絶
縁被膜部10bが熱昇華し得る程度の熱を加える事によ
り絶縁被膜10bの除去とともに導線10aとピン22
間の電気接合も同時に行なう事が出来るように構成して
もよい。
On the other hand, eutectic solder 23 is attached to the bottom surface of the pin 22 in advance, and in this state, heat is applied to the pin 22 to an extent that the solder 23 melts.
Solder 23 only on the part that is in contact with pin 22 via 2
is melted, and an electrical connection is made between the conductive wire 10a and the pin 22. Note that it is not necessary to remove the insulating coating 10b of the pin 22 in advance; for example, by applying heat to the extent that the insulating coating 10b is thermally sublimated together with solder, the insulating coating 10b is removed and the conductor 10a and the pin are removed. 22
The configuration may be such that electrical connection between the two can be made simultaneously.

【0024】図1は他の実施例で前記ピン22の上面両
角隅部をL字状に削成し、該L字削成部22aにフラッ
トケーブル10の軸線101A、101Bが載置可能に
構成する。尚前記削成部22aには軸線101A、10
1Bの少なくとも2面が接触可能に、その一辺を軸線半
径より大で好ましくはその直径より僅かに小に設定する
。又前記削成部22aのピン先端幅寸法Lは形成すべき
ループ電極間幅とほぼ同一に設定する。又前記削成部2
2aには前もって前記共晶半田26を付着させておく。 尚、前記ピンには燐青銅に銅を無電界メッキしたものを
用い、又半田はディップ付けする事により前記コーナ部
に多く付着し、好ましい。
FIG. 1 shows another embodiment in which both corners of the upper surface of the pin 22 are cut into an L-shape, and the axes 101A and 101B of the flat cable 10 can be placed on the L-shaped cut parts 22a. do. Note that the axes 101A and 10 are attached to the cut portion 22a.
One side is set to be larger than the axis radius and preferably slightly smaller than the diameter so that at least two surfaces of 1B can come into contact with each other. Further, the pin tip width dimension L of the cut portion 22a is set to be approximately the same as the width between the loop electrodes to be formed. In addition, the cut portion 2
The eutectic solder 26 is previously attached to 2a. It is preferable to use phosphor bronze plated with copper for the pins, and to dip the pins so that a large amount of solder adheres to the corner portions.

【0025】そし前記ピン削成部22aと軸線10aと
の接触部に矢印方向よりレーザ25を照射することによ
り、削成部22aに付着している半田が溶融し、導線1
0aとピン22間の電気接合がなされる。尚前記レーザ
には出力が30〜40W程度のヤグレーザ(1064n
m)を用い、又前記半田26にフラックスを用いるとレ
ーザの熱でフラックスが燃える恐れがあるために、フラ
ックスなし用いるのがよい。
By irradiating the contact portion between the pin cut portion 22a and the axis 10a with the laser 25 in the direction of the arrow, the solder adhering to the cut portion 22a is melted, and the conductor 1
An electrical connection is made between Oa and pin 22. The laser mentioned above is a YAG laser (1064n) with an output of about 30 to 40W.
m) and if flux is used for the solder 26, there is a risk that the flux will burn due to the heat of the laser, so it is better to use no flux.

【0026】図4は前記のターミナル処理により形成さ
れた図6に示す制御グリッド3とIC搭載基板30の接
合方法で、IC搭載基板30側にバネ状の接合端子31
を前記ピン22配設間隔に対応して配設し、その接合端
子31の自由端側がピン22頭部を圧接可能に構成する
。この際前記端子31とピン22頭部間を半田接合をし
てもよい。
FIG. 4 shows a method of joining the control grid 3 shown in FIG. 6 formed by the terminal processing described above to the IC mounting board 30, in which a spring-shaped joining terminal 31 is attached to the IC mounting board 30 side.
are arranged corresponding to the spacing between the pins 22, and the free end side of the connecting terminal 31 is configured to be able to press against the head of the pin 22. At this time, the terminal 31 and the head of the pin 22 may be joined by soldering.

【0027】[0027]

【発明の効果】以上記載した如く本発明によれば、ルー
プ電極を形成するための軸線同士の接合処理を個々の軸
線対毎行うことなく前記列方向若しくは行方向を1単位
として実質的に集合接合処理を可能にし、而もピンと接
触する部位のみが電気接合が行なわれるために、簡便且
つ確実にターミナル処理が可能となるとともに、必要に
応じて絶縁被膜10b除去と電気接合を同時に行なえる
ために段取工程が極めて簡略化する。等の種々の著効を
有す。
As described above, according to the present invention, the axes can be substantially assembled in the column direction or the row direction as one unit without performing the joining process for each pair of axes to form a loop electrode. This makes it possible to perform a bonding process, and since electrical bonding is performed only at the part that contacts the pin, it is possible to easily and reliably process the terminal, and if necessary, the insulation coating 10b can be removed and the electrical bonding can be performed at the same time. The setup process is extremely simplified. It has various effects such as

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本発明の実施例にかかるループ電極の形成方法
を示す作用図。
FIG. 1 is an operational diagram showing a method for forming a loop electrode according to an embodiment of the present invention.

【図2】本発明の実施例にかかるループ電極の形成方法
を示す要部正面図とその平面図。
FIG. 2 is a front view of a main part and a plan view thereof showing a method of forming a loop electrode according to an embodiment of the present invention.

【図3】本発明の実施例に使用されるフラットケーブル
の断面図。
FIG. 3 is a cross-sectional view of a flat cable used in an embodiment of the present invention.

【図4】前記実施例とIC搭載基板との接合図を示す。FIG. 4 shows a bonding diagram of the embodiment and an IC mounting board.

【図5】本発明が適用される基本技術を示す全体構成図
[Fig. 5] Overall configuration diagram showing the basic technology to which the present invention is applied

【図6】制御グリッドのΧーY軸ループ線の配列状態を
示す概略図
[Figure 6] Schematic diagram showing the arrangement of the Χ-Y axis loop lines of the control grid

【図7】先願技術にかかるループ電極の形成方法を示す
作用図。
FIG. 7 is an operational diagram showing a method for forming a loop electrode according to the prior art.

【図8】本発明の実施例に使用されるフラットケーブル
の絶縁被膜除去方法を示す。
FIG. 8 shows a method for removing an insulation coating from a flat cable used in an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

101、102  軸線 22  ピン 3    制御グリッド 23、26  半田 101, 102 Axis line 22 pin 3 Control grid 23, 26 Solder

Claims (1)

【特許請求の範囲】 【請求項1】  所定方向に平行に延設してなる絶縁被
膜を有する軸線群の隣接する軸線同士を夫々電気接合し
て多数本のループ電極からなる制御グリッドの形成方法
において、前記軸線群延設方向とほぼ直交する方向に沿
って一列若しくは複数列状にループ電極の配設間隔の整
数倍ピッチ間隔で立設する接続ピン群を設け、前記隣接
する軸線同士を夫々の対応するピンに接触させた状態で
熱、高周波若しくはレーザエネルギーを前記接触部位に
付与する事により該接触部位におけるピンと軸線間の電
気接合を行なう事を特徴とする制御グリッドの形成方法
【請求項2】  他側ループ電極を形成する隣接する軸
線同士を間隔保持用の1又は複数のダミー線を介して一
体的に接続してなるフラットケーブルを用いることを特
徴とする請求項1記載の制御グリッドの形成方法【請求
項3】  前記隣接する軸線同士を夫々の対応するピン
に半田膜を介して接触させた状態で熱エネルギーを付与
する事により前記軸線表面の絶縁膜を除去しながらピン
と軸線間の半田接合を行なう事を特徴とする請求項1記
載の制御グリッドの形成方法 【請求項4】  前記ピンの軸線との接触部位を略L字
状に凹設し、該凹設部に軸線が載置可能に構成した請求
項1記載の制御グリッドの形成方法
[Scope of Claims] [Claim 1] A method for forming a control grid consisting of a large number of loop electrodes by electrically connecting adjacent axes of a group of axes having insulating coatings extending parallel to a predetermined direction. In this method, a group of connecting pins are provided in a row or in a plurality of rows along a direction substantially orthogonal to the direction in which the group of axes extends, and are arranged at pitches that are integral multiples of the distance between the loop electrodes, and the adjacent axes are connected to each other. A method for forming a control grid, characterized in that an electric connection is established between a pin and an axis at a contact site by applying heat, high frequency, or laser energy to the contact site while the control grid is in contact with a corresponding pin of the control grid. 2. The control grid according to claim 1, characterized in that a flat cable is used in which adjacent axes forming the other side loop electrode are integrally connected via one or more dummy wires for maintaining the distance. [Claim 3] A method for forming a bond between the pins and the axes while removing an insulating film on the surface of the axes by applying thermal energy while the adjacent axes are in contact with their corresponding pins via a solder film. 4. A method for forming a control grid according to claim 1, characterized in that a contact portion with the axis of the pin is recessed in a substantially L-shape, and the axis line is formed in the recessed portion. A method for forming a control grid according to claim 1, which is configured to be able to be placed on the control grid.
JP12660691A 1991-04-30 1991-04-30 Method of forming control grid Expired - Fee Related JP2837286B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12660691A JP2837286B2 (en) 1991-04-30 1991-04-30 Method of forming control grid

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12660691A JP2837286B2 (en) 1991-04-30 1991-04-30 Method of forming control grid

Publications (2)

Publication Number Publication Date
JPH04329155A true JPH04329155A (en) 1992-11-17
JP2837286B2 JP2837286B2 (en) 1998-12-14

Family

ID=14939362

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12660691A Expired - Fee Related JP2837286B2 (en) 1991-04-30 1991-04-30 Method of forming control grid

Country Status (1)

Country Link
JP (1) JP2837286B2 (en)

Also Published As

Publication number Publication date
JP2837286B2 (en) 1998-12-14

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