JPH05124251A - Control grid - Google Patents

Control grid

Info

Publication number
JPH05124251A
JPH05124251A JP31362591A JP31362591A JPH05124251A JP H05124251 A JPH05124251 A JP H05124251A JP 31362591 A JP31362591 A JP 31362591A JP 31362591 A JP31362591 A JP 31362591A JP H05124251 A JPH05124251 A JP H05124251A
Authority
JP
Japan
Prior art keywords
loop
loop electrode
control grid
sides
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP31362591A
Other languages
Japanese (ja)
Other versions
JP2837301B2 (en
Inventor
Hidemasa Aiba
英全 相羽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP31362591A priority Critical patent/JP2837301B2/en
Publication of JPH05124251A publication Critical patent/JPH05124251A/en
Application granted granted Critical
Publication of JP2837301B2 publication Critical patent/JP2837301B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a control grid which can form a print dot with good accuracy and high resolution by forming facing side of each toner carrier on two sides facing each other through a toner through hole except a crossing position in a loop electrode and two sides facing each other of another loop electrode in approximately the same plane. CONSTITUTION:Bonding together of loop electrodes 11 and 21 formed respectively on an upper pattern and a lower pattern is performed while heat setting resins with which the loop electrodes 11 and 21 are covered are melted and cured. In the formed control grid, the upper face of two sides 11A of the loop electrode corresponding to a toner through hole 3a coincides with the upper face of two sides 21A of the other loop electrode and the loop electrode of the upper pattern and the loop electrode of the lower pattern are positioned up and down through an insulation layer at the crossing positions 11B and 21B to be able to obtain a sufficient thickness for the insulation layer.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、現像電界を形成するト
ナー担持体と背面電極間に介装され、電磁気的に開閉可
能なトナー通過孔群をマトリックス状に配列してなる制
御グリッドに係り、特に前記制御グリッドを利用して感
光体ドラムその他の潜像担持体を介さずに直接普通紙そ
の他の記録材にトナー像を付着可能に構成した画像形成
装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control grid which is arranged between a toner carrier for forming a developing electric field and a back electrode and has a group of electromagnetically openable and closable toner passage holes arranged in a matrix. In particular, the present invention relates to an image forming apparatus in which a toner image can be directly attached to a recording material such as plain paper without using a photosensitive drum or other latent image carrier by utilizing the control grid.

【0002】[0002]

【従来の技術】従来より潜像担持体として機能する感光
体ドラムを用いずに現像ローラ上に担持させたトナーを
直接、画像情報に対応させてドットパターン状に記録材
上に転移させる画像形成装置は特開平3ー168766
〜70等で公知であり、かかる装置構成を図6に示す概
要図に基づいて簡単に説明するに、電磁気的にトナーを
薄膜状に保持したスリーブ状の現像ローラを含むトナー
担持体1と、該トナー担持体1に対向配置された背面電
極2との間にマトリックス状の制御グリッド3を配し、
該制御グリッド3をX−Y軸方向に通電制御することに
より、該マトリックス間のトナー通過孔3aに作用する
現像電界を画像情報に対応させて選択的に遮断若しくは
導通可能に構成し、これにより前記背面電極2表面に配
した記録紙4上に前記制御グリッド3内のトナー通過孔
3aを介して画像情報に対応したトナーの転移が可能に
構成するとともに、図7に示すように前記制御グリッド
3を主走査方向(X)にスリット状に延在する複数本の
第一のループ電極と、該線に対し所定角度斜交させて多
数本平行に延設する第二のループ電極からなるマトリッ
クス状のループ電極群により形成し、前記第一のループ
電極と第二のループ電極に囲繞される夫々のマトリック
ス状の空間部にトナー通過孔3aを開口させる。
2. Description of the Related Art Image formation in which toner carried on a developing roller is directly transferred onto a recording material in a dot pattern corresponding to image information without using a photosensitive drum functioning as a latent image carrier has hitherto been performed. The device is Japanese Unexamined Patent Publication No. 3-168766.
To 70 etc., and briefly describes such a device configuration based on the schematic view shown in FIG. 6, a toner carrier 1 including a sleeve-shaped developing roller electromagnetically holding toner in a thin film shape; A matrix-shaped control grid 3 is arranged between the toner carrier 1 and a back electrode 2 arranged to face the toner carrier 1.
By controlling the energization of the control grid 3 in the X-Y axis directions, the developing electric field acting on the toner passage holes 3a between the matrices is selectively cut off or made conductive in correspondence with image information. On the recording paper 4 arranged on the surface of the back electrode 2, the toner corresponding to the image information can be transferred through the toner passage hole 3a in the control grid 3, and as shown in FIG. A matrix composed of a plurality of first loop electrodes 3 extending in a slit shape in the main scanning direction (X) and a plurality of second loop electrodes extending in parallel at a predetermined angle with respect to the line. And a toner passage hole 3a is formed in each of the matrix-shaped spaces surrounded by the first loop electrode and the second loop electrode.

【0003】そしてかかる制御グリッド3は記録紙4の
挿通速度と対応させて第一のループ電極を順次時間差を
もって通電させる事により、前記通過孔3aを通過する
ドット状の印字パターン30は結果として1列状になり、
この結果第2のループ電極幅、言換えれば主走査方向に
おけるトナー通過孔間隔を特に密にしなくても密なドッ
トパターンの形成が可能となるものである。
The control grid 3 energizes the first loop electrode sequentially with a time lag corresponding to the insertion speed of the recording paper 4, so that the dot-shaped print pattern 30 passing through the passage hole 3a is 1 as a result. In rows,
As a result, it is possible to form a dense dot pattern without particularly narrowing the width of the second loop electrode, that is, the interval between the toner passing holes in the main scanning direction.

【0004】[0004]

【発明が解決しようとする課題】従ってかかる基本技術
によれば、例えば図8に示すように、前記制御グリッド
を形成する第一のループ電極と第二のループ電極には夫
々個別に制御電圧を印加してトナー通過孔を電磁気的に
開閉制御させる必要があるために、前記両ループ電極間
に絶縁層9を介在させて、該絶縁層9の上下両面側に夫
々のループ電極を形成する配線パターンを一体的に接着
し、更にその表面を絶縁被覆して形成しているが、この
様に構成すると前記両ループ電極に印加する制御電圧レ
ベルを同一レベルに設定すると、前記夫々のループ電極
11、21と現像ローラとの間の距離が異なるために現
像ローラ1との間の電位勾配が前記両ループ電極間の距
離差に比例して異なってしまい、而も、制御グリッド3
と現像ローラ1との間の空隙は0.2mm前後と極めて
薄層の為に、前記両ループ電極11、21間の絶縁層9
が厚肉になると、前記電位勾配差を無視し得ないほど大
きくなり、この為前記現像ローラ1との間の電位勾配を
一定に維持する為に、その距離に比例して夫々のループ
電極11、21に印加する制御電圧を調整する必要があ
り、この事は回路構成の煩雑化と装置の大型化につなが
る。
Therefore, according to such a basic technique, for example, as shown in FIG. 8, a control voltage is individually applied to the first loop electrode and the second loop electrode forming the control grid. Since it is necessary to apply and control electromagnetically opening and closing the toner passage hole, an insulating layer 9 is interposed between the both loop electrodes, and wirings for forming respective loop electrodes on the upper and lower surfaces of the insulating layer 9 are formed. The patterns are integrally bonded, and the surfaces thereof are formed by insulating coating. With this structure, if the control voltage levels applied to both the loop electrodes are set to the same level, the respective loop electrodes 11 are formed. , 21 and the developing roller are different from each other, the potential gradient between the developing roller 1 and the developing roller 1 is different in proportion to the difference in distance between the two loop electrodes.
Since the gap between the developing roller 1 and the developing roller 1 is an extremely thin layer of about 0.2 mm, the insulating layer 9 between the loop electrodes 11 and 21 is formed.
Is thicker, the potential gradient difference becomes so large that it cannot be ignored. Therefore, in order to maintain the potential gradient between the developing roller 1 and the developing roller 1 constant, the respective loop electrodes 11 are proportional to the distance. , 21 is required to be adjusted, which leads to a complicated circuit configuration and an increase in size of the device.

【0005】又、前記両ループ電極11、21間の電圧
差が無視できないほど大きくなると、両電圧差により、
ループ電極11、21間に逆電界が発生し、該逆電界が
トナー通過を阻止する方向に働いたり、又隣接する他の
通過孔に悪影響を及ぼしたりする恐れがある。かかる欠
点を解消するために前記絶縁層9を極めて薄肉に設定す
ると絶縁耐力等に不安が生じるのみならず、リークの恐
れが発生する。
When the voltage difference between the loop electrodes 11 and 21 becomes too large to be ignored, the voltage difference causes
A reverse electric field is generated between the loop electrodes 11 and 21, and the reverse electric field may act in a direction to prevent passage of toner, or may adversely affect other adjacent through holes. If the insulating layer 9 is set to be extremely thin in order to solve such a drawback, not only the dielectric strength and the like become uncertain, but also leakage may occur.

【0006】本発明はかかる従来技術の欠点に鑑み、前
記絶縁層の厚肉化を図った場合においても、言換えれば
その上下両面側に配置したループ電極の制御電圧を同一
電圧レベルに設定した場合においても、現像ローラとの
間の電位勾配が変動する事なく、これにより精度よい且
つ高解像度の印字ドットを生成可能な制御グリッドを提
供する事を目的とする。
In view of the drawbacks of the prior art, the present invention sets the control voltage of the loop electrodes arranged on the upper and lower sides of the insulating layer to the same voltage level even when the thickness of the insulating layer is increased. Even in such a case, it is an object of the present invention to provide a control grid capable of generating an accurate and high-resolution printing dot without changing the potential gradient between the developing roller and the developing roller.

【0007】[0007]

【課題を解決する為の手段】本発明は、少なくともその
交叉部位が、絶縁層を介してその上下両面側に配設さ
れ、一のループ電極が他のループ電極に対し平面投影面
に対し互いに交叉する方向に延在させた第一及び第二の
ループ電極群と、該両ループ電極群の夫々の交叉空間内
に開口されたトナー通過孔群を具えた制御グリッドに適
用されるものである。即ち本発明は、絶縁層を介してそ
の上下両面側全域に配線パターンを形成するFPCや後
記する実施例に示すエッチング加工により形成される制
御グリッドのみならず、交差部位上のみで絶縁層を介し
てその上下両面にループ電極が位置する平織りにより網
目状に形成されたワイヤ電極からなる制御グリッドにも
適用可能である。
According to the present invention, at least the intersecting portions are arranged on both upper and lower sides of the insulating layer with an insulating layer interposed therebetween, and one loop electrode is formed relative to another loop electrode with respect to a plane projection plane. The present invention is applied to a control grid having first and second loop electrode groups extending in the intersecting direction and a toner passage hole group opened in each intersecting space of the both loop electrode groups. .. That is, the present invention is not limited to the FPC that forms a wiring pattern on the entire upper and lower surfaces of the insulating layer via the insulating layer and the control grid formed by the etching process described in the examples below, as well as interposing the insulating layer only on the intersection portion. The present invention is also applicable to a control grid including wire electrodes formed in a mesh shape by plain weaving in which loop electrodes are located on both upper and lower surfaces thereof.

【0008】そして本発明は、前記夫々のループ電極の
内、前記両ループ電極間の交叉部位を除く、トナー通過
孔を介して対峙する二辺のトナー担持体対面側と、他の
ループ電極の対峙する二辺の前記対面側とを、ほぼ同一
平面上に設定した事を特徴とする。そしてこの様なルー
プ電極の形成方法は、ループ電極の対応する二辺をプレ
ス加工にて矩形状に隆起させるか、若しくは交差部位と
対応するループ電極上面の適宜箇所をエッチング処理に
て削成し、該削成部に絶縁層を介して他のループ電極を
交差させて制御グリッドを形成してもよい。
Further, in the present invention, among the respective loop electrodes, excluding the crossing portion between the both loop electrodes, the two sides of the toner carrier facing each other through the toner passage holes and the other loop electrodes are provided. It is characterized in that the two facing sides and the facing side are set on substantially the same plane. And such a method of forming a loop electrode is such that two corresponding sides of the loop electrode are raised in a rectangular shape by press working, or an appropriate portion on the upper surface of the loop electrode corresponding to the intersecting portion is abraded by etching treatment. Alternatively, the control grid may be formed by intersecting another loop electrode with the cut portion through an insulating layer.

【0009】[0009]

【作用】かかる技術手段によれば、トナー通過孔の周囲
に位置する四辺のいずれもが前記現像ローラ1に対し同
一距離に設定できるために、従来技術の様にループ電極
11、21夫々に印加する制御電圧を変化させる必要が
なく、結果として回路構成の簡単化と小型化を図る事が
出来る。又、前記両ループ電極11、21間の制御電圧
の電圧差が生じない事は、該ループ電極11、21間に
逆電界が発生する事もなく、この事は該逆電界に起因す
る画像の乱れや悪影響を阻止する事が出来、これにより
精度よい且つ高解像度の印字ドットの生成を可能とす
る。又本発明は前記両ループ電極間の交叉部位は面一に
設定する必要がないために、言換えれば前記両ループ電
極間に厚肉の絶縁層形成の為の段差をもたす事が出来、
これにより十分なる絶縁耐力とリーク発生の恐れを防止
出来る。
According to such a technical means, since all the four sides located around the toner passage hole can be set to the same distance with respect to the developing roller 1, they are applied to the loop electrodes 11 and 21 as in the prior art. It is not necessary to change the control voltage to be used, and as a result, the circuit configuration can be simplified and downsized. In addition, the fact that there is no difference in the control voltage between the loop electrodes 11 and 21 does not cause a reverse electric field between the loop electrodes 11 and 21, which means that the image caused by the reverse electric field is Disturbances and adverse effects can be prevented, which enables accurate and high-resolution printing dot generation. Further, according to the present invention, it is not necessary to set the intersecting portion between the both loop electrodes to be flush with each other. In other words, a step for forming a thick insulating layer can be provided between the both loop electrodes. ,
This makes it possible to prevent a sufficient dielectric strength and the risk of leakage.

【0010】[0010]

【実施例】以下、図面に基づいて本発明の実施例を例示
的に詳しく説明する。但しこの実施例に記載されている
構成部品の寸法、材質、形状、その相対配置などは特に
特定的な記載がない限りは、この発明の範囲をそれのみ
に限定する趣旨ではなく単なる説明例に過ぎない。図3
は本発明に基づいて製作された制御グリッドで、図4及
び図5は該制御グリッドを製造する為の上下配線パター
ンを示す。次に、前記制御グリッドの製造手順に従って
その構成を説明する。図4は主走査方向に延在するトラ
バースループ電極21を有する下パターン20、図5は
記録紙が搬送される方向(副走査方向)に対し僅かに上
向きに傾斜させた方向に延在するプリントループ電極1
1を有する上パターン10で、いずれも銅箔をエッチン
グ処理して形成されている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described in detail below as an example with reference to the drawings. However, unless otherwise specified, the dimensions, materials, shapes, relative positions, etc. of the components described in this embodiment are not intended to limit the scope of the present invention thereto, but are merely illustrative examples. Not too much. Figure 3
Is a control grid manufactured according to the present invention, and FIGS. 4 and 5 show upper and lower wiring patterns for manufacturing the control grid. Next, the structure of the control grid will be described according to the manufacturing procedure. FIG. 4 is a lower pattern 20 having a traverse loop electrode 21 extending in the main scanning direction, and FIG. 5 is a print extending in a direction slightly tilted upward with respect to the direction in which the recording paper is conveyed (sub-scanning direction). Loop electrode 1
The upper pattern 10 having the number 1 is formed by etching the copper foil.

【0011】次に夫々のパターンの形状について詳細に
説明する。下パターン20は、現像ローラ1の軸長より
僅かに大なる長さを有する、主走査方向に長く延在する
帯状をなし、その長手方向左右両側を矩形状にエッチン
グして空間域22を形成すると共に該空間域22に挟ま
れる中央部に、小ピッチ間隔で夫々所定方向に平行に延
設してなる8本のループ電極21と、夫々のループ電極
21の長手方向中心線に沿ってその両端側に延在する引
出し線23A、23Bを形成し、該引出し線23A、2
3Bの両端側に信号受信用の方形ランド部24A、24
Bを形成するとともに、該ランド部24A、24B形成
域の短手方向左右両側に上パターン10と位置合わせを
行なう馬蹄状のマーク26を開孔する。
Next, the shape of each pattern will be described in detail. The lower pattern 20 has a strip shape having a length slightly larger than the axial length of the developing roller 1 and extending long in the main scanning direction, and the left and right sides in the longitudinal direction are etched into a rectangular shape to form a space area 22. At the same time, eight loop electrodes 21 extending in parallel in a predetermined direction with a small pitch are provided in the central portion sandwiched by the space regions 22, and the loop electrodes 21 are arranged along the longitudinal center line of each loop electrode 21. Leader wires 23A and 23B extending to both ends are formed, and the leader wires 23A and 2B are formed.
Square lands 24A, 24 for receiving signals are provided on both ends of 3B.
B is formed, and horseshoe-shaped marks 26 for aligning with the upper pattern 10 are formed on both right and left sides in the lateral direction of the land portions 24A and 24B formation areas.

【0012】一方図5に示す上パターン10は、下パタ
ーン20とほぼ同形の帯状方形状をなし、その短手方向
左右両側を矩形状にエッチングして空間部12を形成す
ると共に該空間域に挟まれる中央部に、小ピッチ間隔で
夫々短手方向に対し僅かに傾斜させた方向に平行に延設
してなる300本のループ電極11と、夫々のループ電
極11の中心線に沿ってその両端側に延在する引出し線
13A、13Bを形成し、該引出し線13A、13Bの
一端側に信号受信用のランド部14Aを、又他端側にパ
ターン検査用の円形ランド部14Bを夫々形成するとと
もに、前記ループ電極形成域の長手方向左右両側に下パ
ターン20の馬蹄状マーク25と合致させて位置合わせ
を行なう為に、該馬蹄形マーク25と同一直径に設定し
た円形マーク15を開孔させる。尚18、及び28は前
記パターンの位置決め用のガイド穴である。
On the other hand, the upper pattern 10 shown in FIG. 5 has a band-like rectangular shape which is substantially the same as the lower pattern 20, and the left and right sides in the lateral direction thereof are etched into a rectangular shape to form a space portion 12 and at the same time in the space area. 300 loop electrodes 11 extending parallel to each other at a small pitch at small pitch intervals in a direction slightly inclined with respect to the lateral direction, and along the center line of each loop electrode 11 Leader lines 13A and 13B extending to both end sides are formed, a signal receiving land portion 14A is formed on one end side of the lead wire lines 13A and 13B, and a circular land portion 14B for pattern inspection is formed on the other end side. At the same time, the circular marks 15 are set to have the same diameter as the horseshoe-shaped mark 25 in order to align the horseshoe-shaped mark 25 of the lower pattern 20 on the left and right sides in the longitudinal direction of the loop electrode formation region. To the opening. Reference numerals 18 and 28 are guide holes for positioning the pattern.

【0013】そして前記の様に形成された上下両パター
ン10、20は夫々前記ガイド穴18、28を利用して
ループ電極11、21を位置保持させた状態で、図1
(A)に示すように制御グリッドを形成した場合に各ト
ナー通過孔3aの周囲に位置する互いに対峙する各二辺
11A、21Aが矩形状に凸設する如くプレス加工す
る。尚、11B、21Bは交差部位である。この場合下
パターンループ電極11の二辺11Aの凸設高さを上パ
ターンループ電極21の凸設高さより大に設定し、その
上面を面一に設定する。尚、上下両パターンのループ電
極11、21をいずれもプレス加工する事なく(B)に
示すように下パターン20のループ電極11、21のみ
を凸設させて形成させてもよい。
The upper and lower patterns 10 and 20 formed as described above are shown in FIG. 1 with the loop electrodes 11 and 21 held in position using the guide holes 18 and 28, respectively.
When the control grid is formed as shown in (A), the two sides 11A and 21A facing each other around each toner passage hole 3a are pressed so as to have a rectangular shape. Note that 11B and 21B are intersections. In this case, the protruding height of the two sides 11A of the lower pattern loop electrode 11 is set to be larger than the protruding height of the upper pattern loop electrode 21, and the upper surface thereof is set to be flush. Alternatively, only the loop electrodes 11 and 21 of the lower pattern 20 may be formed to be convex as shown in (B) without pressing the loop electrodes 11 and 21 of both the upper and lower patterns.

【0014】又前記プレス加工ではなく、図2(A)に
示すように前記配線パターン10、20を厚肉の胴箔で
形成した後、交差部位と対応するループ電極11、21
上面をエッチング処理にて矩形状に削成し、後記するよ
うに該削成部11B、21Bに絶縁層31を介して他の
ループ電極11、21を交差させて制御グリッド3を形
成した際に各トナー通過孔3aの周囲に位置する各ルー
プ電極の各二辺11A、21A上面がいずれも面一にな
る如く形成する。勿論この場合も(A)に示すように上
下両パターンループ電極11、21のいずれも前記エッ
チング処理する事なく(B)に示すように上パターンル
ープ電極11を薄肉に設定し、下パターンループ電極2
1を厚肉に形成した後エッチングにてその交差部位11
B、21Bを矩形状に作成してもよい。
Further, instead of the press working, after forming the wiring patterns 10 and 20 with a thick body foil as shown in FIG. 2A, the loop electrodes 11 and 21 corresponding to the intersecting portions are formed.
When the control grid 3 is formed by cutting the upper surface into a rectangular shape by etching and crossing the cut portions 11B and 21B with the other loop electrodes 11 and 21 via the insulating layer 31 as described later. The upper surfaces of the two sides 11A and 21A of each loop electrode located around each toner passage hole 3a are flush with each other. Of course, in this case as well, the upper pattern loop electrode 11 is set thin as shown in (B) without etching the upper and lower pattern loop electrodes 11 and 21 as shown in (A). Two
1 is formed into a thick wall and then the crossing portion 11 is formed by etching.
B and 21B may be formed in a rectangular shape.

【0015】そして前記の様にループ電極11、21を
矩形波状に形成した各パターン10、20は夫々各ラン
ド部14A、14B、24A、24Bをマスキング処理
した後、ガラエポ樹脂若しくはポリイミドアミド樹脂等
の絶縁性熱硬化樹脂を塗布し予備乾燥しこれを数回繰返
して所定の膜厚の絶縁被膜処理を行なう。、 次に、前
記上下パターン10、20夫々に開孔させた馬蹄形マー
ク25と該マーク25と同一直径の円形マーク15を合
致させて位置合わせを行なった後、前記ループ電極形成
域に熱を加えながら圧接することにより、前記ループ電
極11、21に被覆されている熱硬化樹脂を溶融硬化さ
せながら前記上下パターン10、20夫々に形成したル
ープ電極11、21同士の接合を行なう。
In the patterns 10 and 20 in which the loop electrodes 11 and 21 are formed in the rectangular wave shape as described above, after masking the land portions 14A, 14B, 24A and 24B, glass epoxy resin or polyimide amide resin or the like is used. An insulating thermosetting resin is applied and pre-dried, and this is repeated several times to perform an insulating film treatment of a predetermined film thickness. Next, after aligning the horseshoe-shaped mark 25 formed in each of the upper and lower patterns 10 and 20 with the circular mark 15 having the same diameter as the mark 25 for alignment, heat is applied to the loop electrode formation region. By press-contacting the loop electrodes 11 and 21, the thermosetting resin coated on the loop electrodes 11 and 21 is melted and cured, and the loop electrodes 11 and 21 formed on the upper and lower patterns 10 and 20 are joined to each other.

【0016】そして前記の様にして形成された制御グリ
ッド3は図1及び図2に示すようにトナー通過孔3aと
対応するループ電極二辺11Aの上面は他のループ電極
二辺21Aの上面と一致すると共に、その交差部位11
B、21B上で図1(C)及び図2(C)に示すように
は絶縁層31を介して上パターンのループ電極と、下パ
ターンのループ電極が上下に位置し、十分なる絶縁層3
1の肉厚を得る事が出来る。そして元に戻り、前記接合
後、前記工程でランド部のマスキングを除去し、該ラン
ド部を利用して所定のパターン検査を行なった後、図1
に示すように、想像線で示す部分より切断して筐体1
9、29からループ電極11、21とこれに接続されて
いる引き出し線13、23を切り離した後に前記信号受
信用のランド部14A、14B、24A、24Bを介し
てIC基板等と接続して制御グリッドが完成する。
In the control grid 3 formed as described above, as shown in FIGS. 1 and 2, the upper surface of the loop electrode two sides 11A corresponding to the toner passage holes 3a is the upper surface of the other loop electrode two sides 21A. Matches and intersects 11
As shown in FIGS. 1 (C) and 2 (C) on B and 21B, the upper pattern loop electrode and the lower pattern loop electrode are located above and below the insulating layer 31, and a sufficient insulating layer 3 is formed.
A wall thickness of 1 can be obtained. Then, returning to the original state, after the joining, the masking of the land portion is removed in the above step, and a predetermined pattern inspection is performed using the land portion.
As shown in, the housing 1 is cut off from the part indicated by the imaginary line.
After disconnecting the loop electrodes 11 and 21 and the lead wires 13 and 23 connected to the loop electrodes 11 and 21 from 9, 29, control is performed by connecting to the IC substrate or the like through the signal receiving lands 14A, 14B, 24A and 24B. The grid is completed.

【0017】[0017]

【発明の効果】以上記載した如く本発明によれば、前記
絶縁層の厚肉化を図った場合においても、言換えればそ
の上下両面側に配置したループ電極の制御電圧を同一電
圧レベルに設定した場合においても、現像ローラとの間
の電位勾配が変動する事なく、これにより精度よい且つ
高解像度の印字ドットを生成可能な制御グリッドを提供
し得る。等の種々の著効を有す。
As described above, according to the present invention, even when the thickness of the insulating layer is increased, in other words, the control voltage of the loop electrodes arranged on the upper and lower sides of the insulating layer is set to the same voltage level. Even in this case, the potential gradient between the developing roller and the developing roller does not fluctuate, so that it is possible to provide a control grid capable of generating highly accurate print dots with high resolution. And so on.

【図面の簡単な説明】[Brief description of drawings]

【図1】(A)(B)(C)は本発明の実施例にかかる
ループ電極の形状とその断面構造を示す
1A, 1B, and 1C show the shape of a loop electrode and its cross-sectional structure according to an embodiment of the present invention.

【図2】(A)(B)(C)は本発明の実施例にかかる
ループ電極の形状とその断面構造を示す
2 (A), (B) and (C) show the shape of a loop electrode and its cross-sectional structure according to an embodiment of the present invention.

【図3】本発明の実施例にかかる制御グリッドの完成
図。
FIG. 3 is a completed view of a control grid according to an embodiment of the present invention.

【図4】図1の制御グリッドを製造する為の一の配線パ
ターンを示す
FIG. 4 shows one wiring pattern for manufacturing the control grid of FIG.

【図5】図1の制御グリッドを製造する為の他の配線パ
ターンを示す
5 shows another wiring pattern for manufacturing the control grid of FIG.

【図6】本発明が適用される基本技術を示す全体構成図FIG. 6 is an overall configuration diagram showing a basic technique to which the present invention is applied.

【図7】制御グリッドのΧーY軸ループ電極の配列状態
を示す概略図
FIG. 7 is a schematic diagram showing an arrangement state of the α-Y axis loop electrodes of the control grid.

【図8】図6の装置と共に制御グリッドの断面を示す概
略図
8 is a schematic diagram showing a cross section of a control grid with the apparatus of FIG.

【符号の説明】[Explanation of symbols]

1 トナー担持体 2 背面電極 3 制御グリッド 10、20 配線パターン 11、21 ループ電極 11A、21B 二辺 11B、21B 交差部位 3a 通過孔 1 Toner Carrier 2 Back Electrode 3 Control Grid 10, 20 Wiring Pattern 11, 21 Loop Electrode 11A, 21B Two Sides 11B, 21B Crossing Site 3a Pass Hole

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 現像電界を形成するトナー担持体と背面
電極間に介装され、電磁気的に開閉可能なトナー通過孔
群をマトリックス状に配列してなる制御グリッドにおい
て、 一のループ電極が他のループ電極に対し平面投影面に対
し互いに交叉する方向に延在させた第一及び第二のルー
プ電極群と、該両ループ電極群の夫々の交叉空間内に開
口されたトナー通過孔群を具え、 少なくとも前記第一及び第二のループ電極の交叉部位
が、絶縁層を介してその上下両面側に配設すると共に、
該夫々のループ電極の内、前記交叉部位を除く、トナー
通過孔を介して対峙する二辺と、他のループ電極の対峙
する二辺の夫々のトナー担持体対面側を、ほぼ同一平面
上に形成した事を特徴とする制御グリッド
1. A control grid in which a group of toner passage holes that are electromagnetically openable and closable are interposed between a toner carrier that forms a developing electric field and a back electrode, and one loop electrode is connected to the other. A first and a second loop electrode group extending in a direction intersecting the plane projection plane with respect to the loop electrode, and a toner passage hole group opened in each crossing space of the both loop electrode groups. At least the crossing portions of the first and second loop electrodes are arranged on both upper and lower sides of the insulating layer via an insulating layer,
Of the respective loop electrodes, the two sides facing each other through the toner passage hole and the two facing sides of the other loop electrodes, excluding the intersecting portion, are respectively located on substantially the same plane. Control grid characterized by being formed
JP31362591A 1991-10-31 1991-10-31 Control grid Expired - Fee Related JP2837301B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31362591A JP2837301B2 (en) 1991-10-31 1991-10-31 Control grid

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31362591A JP2837301B2 (en) 1991-10-31 1991-10-31 Control grid

Publications (2)

Publication Number Publication Date
JPH05124251A true JPH05124251A (en) 1993-05-21
JP2837301B2 JP2837301B2 (en) 1998-12-16

Family

ID=18043577

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31362591A Expired - Fee Related JP2837301B2 (en) 1991-10-31 1991-10-31 Control grid

Country Status (1)

Country Link
JP (1) JP2837301B2 (en)

Also Published As

Publication number Publication date
JP2837301B2 (en) 1998-12-16

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