JPH04326849A - Image sensor - Google Patents

Abstract

PURPOSE:To read original information at high speed with high sensitivity. CONSTITUTION:This image sensor is composed of a source follower part composed of a photodiode 1, first step FET 2 to receive the anode terminal potential of the photodiode at a gate electrode and FET 3 for constant current source, amplification part composed of an FET 4 for amplification to receive the source terminal potential of the above-mentioned first step FET at a gate electrode and FET 5 for access, picture element having a reset part composed of an FET 6 for reset to reset the inter-terminal voltage of the above-mentioned photodiode 1 to a fixed potential, and shift register 100 for scanning to successively drive the FET 5 for access and the FET 6 for reset as mentioned above. Thus, since the sensitivity of the gate potential at the first step FET 2 can be improved and the source terminal potential of the first step FET lowering the impedance at the amplification part in the next step is received at the gate electrode of the FET 4 for amplification, the W (channel width)/L (channel length) ratio of the FET 4 for amplification can be enlarged. As the result, a high output can be obtained.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image sensor capable of reading document information at high speed and with high sensitivity.

0002

2. Description of the Related Art With the advancement of information processing equipment, the need for image sensors as input devices is increasing. For example, in a photodiode, electron-hole pairs generated by light irradiation on a semiconductor pn junction move electrons to the n-type layer and holes to the p-type layer due to the internal electric field existing at the junction. The generated signal charges can be accumulated. Therefore, MOS, amplified MOS, and CCD image sensors have been developed and put into practical use as image sensors that read signal charges in a charge accumulation mode using a photodiode array.

[0003] First, let's talk about the CCD image sensor.
The CCD image sensor is composed of a photodiode, a transfer gate, a CCD shift register for transfer, an output amplifier, and the like. The signal charge accumulated in the photodiode is transferred to the potential well of the CCD shift register for transfer by the transfer gate, and further transferred to the output amplifier by moving this potential well in accordance with the clock pulse. The output amplifier converts the signal charge into voltage, amplifies it, and extracts it as an image signal.

Although this CCD image sensor has high sensitivity, as can be inferred from the gate capacitance and line capacitance of the transfer CCD shift register, its driving capacity is considerably large, especially in a multi-chip type image sensor. It is necessary to increase the drive capacity of the drive circuit,
Therefore, the higher the scanning speed, the more difficult it becomes in terms of power consumption.

On the other hand, driving circuits for both MOS and amplification type MOS image sensors can be easily formed, and therefore the driving capacitance is small and high-speed scanning is easy. The MOS image sensor has a simple configuration and uses a method in which the signal charge of the photodiode is sequentially extracted as an image signal through an access MOSFET.However, in order to achieve higher sensitivity, an amplification method consisting of a pixel configuration as shown in Figure 4 is used. A type MOS image sensor has been realized. This sensor has an amplification function for each pixel, and as shown in FIG.
8d), and depending on the gate voltage, the amplification MO
SFET8/access MOSFET9 (9a to 9d)
This method extracts the output current flowing through the image signal as an image signal. Here, VDD is a power supply voltage terminal, VBB is a reset voltage terminal, and Is is an image signal output terminal. To reset, turn on the reset MOSFET 10 (10a to 10d) and apply a reverse bias voltage (VDD-) to the photodiode.
This is done by applying VBB) to charge the junction capacitance of the photodiode.

[0006]

[Problem to be solved by the invention] However, this method
Although it has higher sensitivity than an OS image sensor, it is still lower in sensitivity than a CCD image sensor. The reason for this is as follows. In the case of an amplification type MOS image sensor, the anode terminal capacitance of the photodiode consists of three capacitances: the junction capacitance of the photodiode, the gate terminal capacitance of the amplification FET, and the drain terminal capacitance of the reset FET, as shown in Figure 5. In order to increase the sensitivity of diodes, it is necessary to reduce the capacitance value of the anode terminal of these photodiodes, as predicted from the relational expression V (output voltage) = Q (signal charge) / C (capacitance). Ru. However, even if the minimum dimension of the mask rule of the process used is used, there is a limit to its reduction because the capacitance value is determined by the designed area. As the area of the photodiode decreases as the resolution increases, the ratio of the gate capacitance of the amplification FET to the anode terminal capacitance of the entire photodiode increases, especially among these three capacitances.

As described above, among conventional image sensors, MOS and amplified MOS image sensors can easily perform high-speed scanning, but these systems have the problem that it is difficult to increase sensitivity due to their physical limitations. . In other words, in the case of an amplified MOS image sensor, its sensitivity depends on the capacitance of the anode terminal of the photodiode and the amplification FET.
It is determined by the value of the W (channel width)/L (channel length) ratio. In order to increase the drain current output, it is sufficient to increase the W (channel width)/L (channel length) ratio of this amplification FET, but if this value is increased, the gate capacitance of the amplification FET must be increased. As a result, the anode terminal capacitance of the photodiode increases and the sensitivity of the gate potential of the amplification FET decreases, making it difficult to increase the sensitivity.

SUMMARY OF THE INVENTION The present invention has been made in consideration of the problems of conventional image sensors, and an object of the present invention is to provide an image sensor that is capable of high-speed scanning and has high sensitivity.

[0009]

[Means for Solving the Problems] The image sensor of the present invention includes a photodiode, a first-stage FET with a small gate capacitance,
and a pixel having a source follower section including a constant current source FET, an amplification section including an amplification FET and an access FET, and a reset section including a reset FET;
It is composed of a scanning shift register for sequentially driving the access FET and the reset FET. These elements can be formed on the same semiconductor substrate using integrated circuit technology.

0010

[Operation] According to the above structure of the present invention, first, in the source follower section, the anode terminal potential of the photodiode generated by the signal charge accumulated in the photodiode for a certain period of time is transferred to the first stage FET with the gate capacitance as small as possible.
It will be received by the gate electrode of. As a result, the first FE
The input capacitance of T can be reduced, the anode terminal capacitance of the photodiode is reduced, and the potential change of the anode terminal with respect to a given exposure amount is increased. That is, this makes it possible to achieve higher sensitivity of the photodiode. Furthermore, in the amplification section consisting of an amplification FET and an access FET in the next stage, a high output current can be extracted by increasing the W (channel width)/L (channel length) ratio of the amplification FET. In other words, this method makes it possible to reduce the anode terminal capacitance of the photodiode and increase the W (channel width)/L (channel length) ratio of the amplification FET, making it possible to achieve both a reduction in the anode terminal capacitance of the photodiode and an increase in the value of the W (channel width)/L (channel length) ratio of the amplification FET. It is possible to dramatically increase the sensitivity compared to the case of .

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an image sensor according to the present invention will be described below with reference to the drawings.

FIG. 1 is an equivalent circuit diagram of four pixels (pixels a to d) of the image sensor of the present invention, and includes a photodiode 1 (1a to 1d), a first stage n-channel MOSFET 2 (
2a to 2d) and constant current source n-channel MOSFET 3 (
3a to 3d), an amplifying n-channel MOSFET whose gate electrode receives the source terminal potential of the first-stage n-channel MOSFET 2 (2a to 2d);
T4 (4a to 4d) and n-channel MOSFE for access
T5 (5a to 5d), the voltage between the terminals of the photodiode 1 (1a to 1d) is set to a constant potential (VD
A pixel having a reset section consisting of reset n-channel MOSFETs 6 (6a to 6d) for resetting to D-VBB), and the access n-channel MOSFETs
5 (5a to 5d), n-channel MOSFET for reset
6 (6a to 6d) sequentially.

[0013] Here, VDD is a power supply voltage (for example, 5V to
6V) terminal, VBB is the reset voltage (e.g. 2.5V~
3V) terminal, Is is an image signal output terminal, VF is a constant voltage (e.g. 2.5V) applied to the gate electrode of the n-channel MOSFET for constant current source, A1 to A5 are output terminals of the scanning pulse of the scanning shift register 100. It is. The scanning pulse output terminals A1 to A5 are connected to the gates of the access n-channel MOSFETs 5 (5a to 5d) of each pixel and the reset n-channel MOSFETs 6 (6a to 6d) of the pixels in the preceding stage.
), and the scan pulse simultaneously performs an access operation for that pixel and a reset operation for the previous pixel. Note that although FIG. 1 shows a case of only four pixels to simplify the explanation, it is easy to expand to a larger number of pixels. FIG. 2 is a timing diagram showing the operation of the image sensor of the present invention. To explain the operation of the image sensor of the present invention with reference to FIGS. 1 and 2, the scan pulse from the scan shift register 100 first
1 becomes HIGH level, the access n-channel MOSFET 5a of pixel a turns on, and the photodiode 1
The image signal output current due to the signal charges accumulated in a is taken out from the image signal output terminal Is. MOSFET
Due to its characteristics, the output current is a step current. At the next timing, A1 becomes LOW level and A2 becomes HIGH level, and the reset n-channel MOSFET 6a of pixel a and the access n-channel MOSFET 5b of pixel b are turned on.
Then, the reset operation of pixel a after signal readout and the access operation of pixel b are performed simultaneously, and the voltage across the terminals of photodiode 1a of pixel a becomes reverse bias voltage (VDD - V
BB) is charged and reset, and the image signal output current of pixel b is taken out from the terminal Is. Similarly, pixels b, c,
The access/reset operation of d is performed.

FIG. 3 shows a device structure diagram of a pixel of an image sensor according to the present invention. As can be seen from this figure, the anode terminal of photodiode 1 is the first stage n-channel MOSFE.
T2 gate electrode and reset n-channel MOSFET
It is connected to the drain terminal of 6. Therefore, the total capacitance associated with the anode terminal of photodiode 1 is the junction capacitance of photodiode 1, the first stage n-channel MOSFE
Gate capacitance of T2 and n-channel MOSF for reset
This is the sum of the drain capacitances of ET6. In order to achieve high sensitivity, it is only necessary to reduce these capacitances, and the first stage FET
The gate capacitance of is kept as small as possible. On the other hand, the W (channel width)/L (channel length) ratio of the gate electrode of the amplification FET is made as large as possible.

As described above, when the image sensor of the present invention is used, first, in the source follower section, the anode terminal potential of the photodiode generated by the signal charge accumulated in the photodiode for a certain period of time is transferred to the first stage FET with the gate capacitance as small as possible. Since the gate electrode of the first stage FET receives the signal, it is possible to increase the sensitivity of the gate potential of the first stage FET, and furthermore, the first stage FE has a low impedance in the next stage amplifier section.
Since the source terminal potential of T is received at the gate electrode of the amplification FET, it is possible to increase the W (channel width)/L (channel length) ratio of the amplification FET.

In other words, the voltage sensitivity of the anode terminal of the photodiode is kept high, and the voltage value at this time is output as a follower and then amplified by the amplification FET, so a high output can be obtained, which is superior to the conventional amplification type MOS image sensor. It is possible to dramatically increase the sensitivity compared to the conventional case. Furthermore, the reading speed does not decrease compared to conventional image sensors.

[0017]

As described above, according to the present invention, a high-speed , it is possible to provide a highly sensitive and readable image sensor, which is extremely useful in practice.

[Brief explanation of drawings]

FIG. 1 is an equivalent circuit diagram of an embodiment of an image sensor of the present invention.

FIG. 2 is an operation timing diagram of the same embodiment of the image sensor of the present invention.

FIG. 3 is a device structure diagram of a pixel of the same embodiment of the image sensor of the present invention.

FIG. 4 is an equivalent circuit diagram of a conventional amplification type MOS image sensor.

FIG. 5 is a device structure diagram of a pixel of a conventional amplification type MOS image sensor.

[Explanation of symbols]

1 (1a to 1d) Photodiode 2 (2a to 2d) First stage n-channel MOSFET 3 (3a
~3d) Constant current source n-channel MOSFET4 (4a~
4d) N-channel MOSFET 5 for amplification (5a to 5d)
Access n-channel MOSFET 6 (6a-6d) Reset n-channel MOSFET 7 (7a-7d) Photodiode 8 (8a-8d) Amplification FET 9 (9a-9d) Access FET

Claims (2)

[Claims] Claim 1: A photodiode, a first stage field effect transistor (hereinafter referred to as FET) having one terminal of the photodiode at its gate electrode, and a constant current source FET having its own drain terminal receiving the source terminal of this first stage FET. a source follower section, an amplification FET whose gate electrode receives the source terminal of the first stage FET, and the amplification FE;
an amplifying section having an access FET that receives the source terminal of the photodiode at its own drain terminal; and a reset section having a reset FET for resetting the voltage between the terminals of the photodiode to a constant potential; An image sensor comprising: a scanning shift register for sequentially driving an access FET and a reset FET. [Claim 2] The gate capacitance of the first stage FET is made as small as possible, and the gate of the amplification FET is set to W (channel width).
2. The image sensor according to claim 1, wherein the /L (channel length) ratio is made larger.