JPH04326169A - Circuit diagram generating device - Google Patents

Circuit diagram generating device

Info

Publication number
JPH04326169A
JPH04326169A JP3125574A JP12557491A JPH04326169A JP H04326169 A JPH04326169 A JP H04326169A JP 3125574 A JP3125574 A JP 3125574A JP 12557491 A JP12557491 A JP 12557491A JP H04326169 A JPH04326169 A JP H04326169A
Authority
JP
Japan
Prior art keywords
circuit diagram
output
elements
input
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3125574A
Other languages
Japanese (ja)
Inventor
Hiroyuki Fukuda
浩之 福田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3125574A priority Critical patent/JPH04326169A/en
Publication of JPH04326169A publication Critical patent/JPH04326169A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To generate a circuit diagram in which the input/output relation of every element is easy to understand by generating data in which the position of the element in a lateral direction is re-arranged in the order of the flow of a signal from an output terminal to an input terminal on the basis of the position of the output terminal whose position is determined in a circuit part corresponding to the generated data. CONSTITUTION:An arranging means 1 to generate the data in which the arrangement of the element in the lateral direction is arranged in the order of the flow of the signal from the input terminal to the output terminal on the basis of logical connection information inputted through an input means 3 is provided. The position of the output terminal whose position is determined by the circuit part corresponding to the data generated by this arranging means 1 is made a reference. Then, a re-arranging means 2 to generate the data in which the arrangement of the element is re-arranged in the order of the flow of the signal from this output terminal to the input terminal, and gives it to an output means 4 is provided. Thus, the elements can be prevented from being concentrated at the vicinity of the position of the input terminal, and besides, since two elements in the relation of input/output are arranged in adjacent to each other, the circuit diagram easier to see can be generated.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、LSIの設計装置に利
用する。特に、計算機を用いて論理接続記述から回路図
の自動生成処理を行う装置に関する。
[Industrial Field of Application] The present invention is utilized in an LSI design device. In particular, the present invention relates to a device that automatically generates a circuit diagram from a logical connection description using a computer.

【0002】0002

【従来の技術】従来例では、素子の横方向の配置位置の
決定は入力端子からの信号の流れに沿ってその素子に至
るまでの(もしあれば複数の)経路に対して(通過する
素子の大きさの総和+配線領域のための余裕の総和)の
最大値を横方向の素子の配置位置とすることで行われて
いた。
[Prior Art] In the conventional art, the lateral arrangement position of an element is determined with respect to (multiple paths, if any) along the signal flow from an input terminal to the element. This was done by setting the maximum value of the sum of the sizes of + the sum of allowances for the wiring area as the horizontal element arrangement position.

【0003】0003

【発明が解決しようとする課題】このような従来例では
、一般的な傾向として入力端子位置(通常左端)近くに
素子が集中し、また多くの場合に入力と出力との関係に
ある2つの素子が離れて配置されてしまい、結果として
信号の流れを追いにくい回路図が生成される欠点があっ
た。図3は、素子の横方向の配置位置の決定が従来どお
りに入力端子からの信号の流れのみに注目して行われた
場合の配置の結果の例であり、図4は望まれる配置であ
る。
[Problems to be Solved by the Invention] In such conventional examples, there is a general tendency for elements to be concentrated near the input terminal position (usually the left end), and in many cases, two elements in the relationship between input and output are concentrated. This has the drawback that the elements are placed far apart, resulting in a circuit diagram in which it is difficult to follow the flow of signals. FIG. 3 shows an example of the placement results when the lateral placement position of the elements is determined by focusing only on the signal flow from the input terminal as before, and FIG. 4 shows the desired placement. .

【0004】本発明は、このような欠点を除去するもの
で、素子ごとの入出力関係が理解し易い回路図を作成で
きる回路図作成装置を提供することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a circuit diagram creating apparatus which can eliminate such drawbacks and can create a circuit diagram in which the input/output relationship of each element is easy to understand.

【0005】[0005]

【課題を解決するための手段】本発明は、論理接続情報
に基づき素子の横方向の配置を入力端子から出力端子へ
の信号の流れの順に配置したデータを作成する配置手段
を備えた回路図作成装置において、上記作成手段で作成
されたデータに相当の回路図で位置が決定される出力端
子位置を基準にして、さらにこの出力端子から上記入力
端子への信号の流れの順に素子の横方向の配置を再配置
したデータを作成する再配置手段を備えたことを特徴と
する。
[Means for Solving the Problems] The present invention provides a circuit diagram equipped with an arrangement means for creating data in which elements are arranged in the horizontal direction in the order of signal flow from input terminals to output terminals based on logical connection information. In the creation device, based on the output terminal position whose position is determined in the circuit diagram corresponding to the data created by the creation means, further in the horizontal direction of the element in the order of signal flow from this output terminal to the input terminal. The present invention is characterized by comprising a rearrangement means for creating data in which the arrangement of the data is rearranged.

【0006】[0006]

【作用】素子の横方向の配置を従来例と同じに入力端子
からの信号の流れの順に左から配置した後で、そこで決
定された出力端子位置を基準にしてさらに出力端子から
信号の流れを逆にたどって素子の横方向の配置位置を最
終決定する。
[Operation] After arranging the elements in the horizontal direction from the left in the same order as the conventional example, in the order of the signal flow from the input terminal, the signal flow from the output terminal is further arranged based on the determined output terminal position. The lateral position of the element is finally determined by retracing the steps.

【0007】[0007]

【実施例】以下に、本発明の一実施例を図面に基づき説
明する。図1はこの実施例の構成を示すブロック構成図
である。この実施例は、図1に示すように、入力手段3
を経由して入力した論理接続情報に基づき素子の横方向
の配置を入力端子から出力端子への信号の流れの順に配
置したデータを作成する配置手段1を備え、さらに、本
発明の特徴とする手段として、配置手段1で作成された
データに相当の回路図で位置が決定される出力端子位置
を基準にして、さらにこの出力端子から上記入力端子へ
の信号の流れの順に素子の横方向の配置を再配置したデ
ータを作成し出力手段4に与える再配置手段2を備える
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of this embodiment. In this embodiment, as shown in FIG.
The present invention further comprises an arrangement means 1 for creating data in which the elements are arranged in the horizontal direction in the order of signal flow from the input terminal to the output terminal based on the logical connection information inputted via the As a means, based on the output terminal position whose position is determined in the circuit diagram corresponding to the data created by the arrangement means 1, the lateral direction of the element is further determined in the order of signal flow from this output terminal to the input terminal. A rearrangement means 2 is provided for creating rearranged data and providing it to an output means 4.

【0008】次に、この実施例の動作を説明する。図2
はこの例の素子の横方向の自動配置手順を示す流れ図で
ある。処理は大きく2つの部分に分かれ、処理S1およ
びS2は従来からある処理であり、処理S3およびS4
が本発明で追加された処理である。処理S1およびS2
で横方向の配置位置を仮決定し、処理S3およびS4で
本決定する。まず、処理S1では、全ての入力端子に対
してその横方向の配置位置を「0」と仮決定する。ここ
で入力端子とは、他から信号を入力しない素子である。 次に、処理S2では、その時点で横方向座標値が仮決定
していない素子のうちで、その素子が入力する信号を出
力する全ての素子(前段の素子)の横方向座標値が決定
している素子の座標値を仮決定する。座標値は、((前
段の素子の座標値+前段の素子の横方向の大きさ)の最
大値+配線のための余裕)である。この処理S2を全素
子の座標値が仮決定するまで繰り返す。図3がこの段階
での結果の一例である。
Next, the operation of this embodiment will be explained. Figure 2
is a flowchart illustrating a procedure for automatic lateral arrangement of elements in this example. The process is broadly divided into two parts, processes S1 and S2 are conventional processes, and processes S3 and S4
is the process added in the present invention. Processing S1 and S2
The horizontal arrangement position is tentatively determined in steps S3 and S4, and final determination is made in steps S3 and S4. First, in process S1, the horizontal arrangement positions of all input terminals are tentatively determined to be "0". Here, the input terminal is an element that does not receive signals from other sources. Next, in process S2, among the elements whose horizontal coordinate values have not been tentatively determined at that point, the horizontal coordinate values of all elements (previous elements) that output signals input by that element are determined. tentatively determine the coordinate values of the elements that are The coordinate value is (maximum value of (coordinate value of previous element + lateral size of previous element) + margin for wiring). This process S2 is repeated until the coordinate values of all elements are tentatively determined. Figure 3 shows an example of the results at this stage.

【0009】この後の処理S3では、全ての出力端子に
対してその処理S2で仮決定された横方向の配置位置を
そのまま本決定する。ここで出力端子とは、他へ信号を
出力しない素子である。次に、処理S4では、その時点
で横方向座標値が本決定していない素子のうちで、その
素子が出力する信号を入力する全ての素子(後段の素子
)の横方向座標値が決定している素子の座標値を決定す
る。座標値は、(後段の素子の座標値の最小−配線のた
めの余裕−その素子の横方向の大きさ)である。この処
理S4を全素子の座標値が本決定するまで繰り返す。 図4がこの最終結果の一例である。ここでは、この処理
により素子301および306の配置位置が影響を受け
ている。
In the subsequent process S3, the horizontal arrangement positions tentatively determined in the process S2 are permanently determined for all output terminals. Here, the output terminal is an element that does not output a signal to others. Next, in process S4, among the elements whose lateral coordinate values have not been finalized at that point, the lateral coordinate values of all elements (later-stage elements) that input signals output from that element are determined. Determine the coordinate values of the element that is The coordinate value is (minimum coordinate value of the subsequent element - margin for wiring - lateral size of the element). This process S4 is repeated until the coordinate values of all elements are finally determined. FIG. 4 is an example of this final result. Here, the arrangement positions of elements 301 and 306 are affected by this process.

【0010】0010

【発明の効果】本発明は、以上説明したように、素子が
入力端子の位置の近くに集中することがなくなり、また
、入力出力の関係にある2つの素子が隣接して配置され
るので、より見やすい回路図を生成できる効果がある。
Effects of the Invention As explained above, the present invention prevents elements from being concentrated near the position of the input terminal, and also allows two elements having an input/output relationship to be arranged adjacently. This has the effect of generating a circuit diagram that is easier to see.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明実施例の構成を示すブロック構成図。FIG. 1 is a block configuration diagram showing the configuration of an embodiment of the present invention.

【図2】本発明実施例での処理の内容を示す流れ図。FIG. 2 is a flowchart showing the contents of processing in the embodiment of the present invention.

【図3】従来例により作成した回路図の一例。FIG. 3 is an example of a circuit diagram created using a conventional example.

【図4】図3に示す回路図を本発明実施例で再作成した
回路図の一例。
FIG. 4 is an example of a circuit diagram obtained by reproducing the circuit diagram shown in FIG. 3 according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1  配置手段 2  再配置手段 3  入力手段 4  出力手段 201〜203、301〜303  入力端子204〜
205、304〜305  出力端子206〜211、
306〜311  入力端子および出力端子以外の素子
1 Arrangement means 2 Relocation means 3 Input means 4 Output means 201-203, 301-303 Input terminals 204-
205, 304-305 output terminals 206-211,
306-311 Elements other than input terminals and output terminals

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  論理接続情報に基づき素子の横方向の
配置を入力端子から出力端子への信号の流れの順に配置
したデータを作成する配置手段を備えた回路図作成装置
において、上記作成手段で作成されたデータに相当の回
路図で位置が決定される出力端子位置を基準にして、さ
らにこの出力端子から上記入力端子への信号の流れの順
に素子の横方向の配置を再配置したデータを作成する再
配置手段を備えたことを特徴とする回路図作成装置。
Claim 1. A circuit diagram creation device comprising arrangement means for creating data in which elements are arranged in the lateral direction in the order of signal flow from input terminals to output terminals based on logical connection information, wherein the creation means Based on the output terminal position whose position is determined in the circuit diagram corresponding to the created data, data is further rearranged in the horizontal direction of the elements in the order of signal flow from this output terminal to the above input terminal. A circuit diagram creation device characterized by comprising a circuit diagram creation relocation means.
JP3125574A 1991-04-25 1991-04-25 Circuit diagram generating device Pending JPH04326169A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3125574A JPH04326169A (en) 1991-04-25 1991-04-25 Circuit diagram generating device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3125574A JPH04326169A (en) 1991-04-25 1991-04-25 Circuit diagram generating device

Publications (1)

Publication Number Publication Date
JPH04326169A true JPH04326169A (en) 1992-11-16

Family

ID=14913555

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3125574A Pending JPH04326169A (en) 1991-04-25 1991-04-25 Circuit diagram generating device

Country Status (1)

Country Link
JP (1) JPH04326169A (en)

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