JPH04318513A - Thin film transistor type liquid crystal display device - Google Patents

Abstract

PURPOSE:To eliminate a DC component between a drain electrode and a counter electrode and to reduce a drop in picture element electrode due to the parasitic capacity between a gate and a source. CONSTITUTION:The drain electrode 2 and source electrode 4 constitute a main transistor(TR) and a 1st auxiliary electrode 9 and a 2nd auxiliary electrode 11 constitute a subordinate TR. A shield electrode is formed over the entire surface of the drain electrode 2 except the connection parts between a picture element electrode 5 and the main and subordinate TRs across an insulating film. Then, when an (n-1)th gate pulse is ON, the voltage on the shield electrode is written through the subordinate TR and when an (n)th gate pulse is ON, the voltage on the drain electrode is written through the main TR.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor type liquid crystal display device, and particularly to the structure, electrode pattern, and driving method of a thin film transistor.

0002

[Prior Art] Conventionally, as a technology in this field, for example,
EID90-6, ED90-35, IE90-15, 1
The one described in ``Development of 0.4-inch color TFT-LCD'' is known. FIG. 8 is a partial cross-sectional view of a conventional thin film transistor (hereinafter referred to as "TFT") described in the above-mentioned document.

As shown in the figure, a gate insulating film 34, a semiconductor layer 35, and an ohmic layer 36 are successively formed on a gate electrode 32, and a source-drain electrode 37, which is a signal electrode, is provided thereon. The position of the pixel electrode 33 may be below or above the source-drain electrode 37, but this only differs in the focus of each company and does not significantly change the overall TFT structure. Finally, a passivation film 38 is provided. Furthermore, in this TFT, the gate electrode has a two-layer structure of Al and Ta to prevent image blurring caused by gate pulse delay.

0004

However, although the thin film transistor type liquid crystal display device having the above structure has an effect on gate pulse delay, some voltage is always applied to the drain electrode into which the video signal is input. The resulting potential fluctuation between the drain electrode and the counter electrode drives the liquid crystal molecules, resulting in light leakage. As a countermeasure for this, it is common practice to form a black mask layer on the counter electrode side to block this light leakage, but since the black mask layer is formed, the aperture ratio is inevitably small. There was a problem with this.

Furthermore, even if this light leakage can be prevented by such measures, it is impossible to prevent potential fluctuations occurring between the drain electrode and the pixel electrode. In other words, the drain electrode is located right next to the pixel electrode to which the voltage on the drain electrode has been written by the gate pulse, and some voltage is always applied to the drain electrode.
There is also a pixel potential fluctuation due to capacitive coupling between the drain electrode and the pixel electrode, and generally the center value of the positive and negative levels of the pixel electrode potential is due to the voltage drop caused by the capacitance between the gate electrode and the source electrode of the TFT. Since it is lower than the center value of the positive and negative voltage levels, the drain electrode -
A DC component voltage is always applied between the pixel electrodes. If a DC component is applied to the liquid crystal, the deterioration will be significant and reliability will be lost.To prevent this, the counter electrode voltage is set to be low in accordance with the voltage drop. When this is done, a DC component is no longer added to the liquid crystal between the pixel electrode and the counter electrode, but a DC component is added to the liquid crystal between the drain electrode and the counter electrode, causing the liquid crystal to deteriorate.

The present invention solves the above-mentioned conventional problems, and
It is an object of the present invention to provide a thin film transistor type liquid crystal display device with a large aperture ratio, little deterioration of liquid crystal, and excellent display quality and reliability.

[0007]

[Means for Solving the Problems] In order to solve the above problems, the present invention provides a plurality of gate electrodes, a plurality of drain electrodes intersecting with the gate electrodes, a thin film transistor provided at the intersection, and a thin film transistor. In a thin film transistor type liquid crystal display device including a thin film transistor substrate having a pixel electrode connected to the pixel electrode and a counter electrode substrate facing the thin film transistor substrate with a liquid crystal in between, the thin film transistor substrate has a first insulating layer formed on the gate electrode. the source/drain electrodes and first and second auxiliary electrodes formed on the gate insulating film, and at least the connection portion between the source electrode and the pixel electrode and the second auxiliary electrode and the pixel electrode on each electrode. a second insulating film formed on the entire surface other than the connecting portion, and on the second insulating film, and on the entire surface other than at least the connecting portion between the source electrode and the pixel electrode and the connecting portion between the second auxiliary electrode and the pixel electrode. A shield electrode is formed and to which a voltage similar to that of the counter electrode of the counter electrode substrate is input, and on the shield electrode, at least the connection portion between the source electrode and the pixel electrode, and the connection between the second auxiliary electrode and the pixel electrode. It includes a third insulating film formed on the entire surface other than the connection part, and a pixel electrode formed on the third insulating film, and the source-drain electrode controls the voltage on the drain electrode when the nth gate pulse is turned on. It constitutes a main transistor that writes to the n-th pixel electrode, and the first and second auxiliary electrodes constitute a sub-transistor that writes the voltage on the shield electrode to the n-th pixel when the (n-1)th gate pulse is turned on. It was configured to do so.

[0008]

According to the present invention, since the thin film transistor type liquid crystal display device is constructed as described above, the space between the drain electrode and the counter electrode is shielded by the shield electrode. Therefore, even if a potential difference occurs between the drain electrode and the counter electrode, the drain voltage is shielded by the shielding electrode, so no DC component is generated between these electrodes, and the liquid crystal on the drain electrode is not turned on.

Furthermore, the storage capacitor formed between the shield electrode and the pixel electrode reduces the drop in the pixel electrode voltage waveform caused by the parasitic capacitance between the gate electrode and the source electrode. Furthermore, n-
When the first gate pulse is turned on, the voltage on the shield electrode is n
The voltage on the drain electrode is written to the nth pixel electrode when the nth gate pulse is turned on.

0010

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a plan view of a thin film transistor substrate in an embodiment of the present invention. As shown in the figure, a transistor (main transistor) whose channel is the semiconductor layer 3 is provided at the intersection of the gate electrode 1 and the drain electrode 2. is now written. The source electrode 4 has first and second contact holes 6,
It is electrically connected to the pixel electrode 5 through 7, and the source voltage waveform becomes the pixel voltage waveform as it is. The shield electrode is formed over the entire surface except for the opening 8 (part of the transistor and gate electrode).

On the other hand, another transistor (sub-transistor) is formed on the previous gate electrode. The first auxiliary electrode 9 is electrically connected to the shielding electrode 8 through the third contact hole 10, and forms a channel with the second auxiliary electrode 11 via the previous gate electrode. The electrode 11 is electrically connected to the pixel electrode 5 through fourth and fifth contact holes 12 and 13.

FIG. 2 is a sectional view of the main transistor portion (A-A' in FIG. 1) of a thin film transistor substrate in an embodiment of the present invention. In this embodiment, a gate electrode anodic oxide film 1 obtained by anodizing the gate electrode 1 is placed on the gate electrode 1.
4 is formed. However, this film is mainly for the purpose of preventing short circuit between the gate electrode and the drain electrode, and is not an essential element of the present invention. Then, a first insulating film 16 having a function as a gate insulating film is formed on the entire surface of the substrate. Further, a semiconductor layer 3 and an ohmic contact layer 15 are formed in a predetermined pattern on top of the semiconductor layer 3, and drain-source electrodes 2 and 4 are formed on top of the semiconductor layer 3 and an ohmic contact layer 15.
A second insulating film 17 is formed thereon in areas other than the first contact hole 6, and a shielding electrode 18 made of a transparent electrode is formed on the transistor part and the first and second contact holes 6.
, 7, a third insulating film 19 is formed on the third insulating film 19 in areas other than the first and second contact holes 6 and 7, and a pixel electrode 5 is formed on the third insulating film 19 in areas other than the first and second contact holes 6 and 7. , 7 to be electrically connected to the source electrode 4. From this figure, the pixel electrode 5 is the shield electrode 18
It can be seen that a storage capacitor is formed with the third insulating film 19 sandwiched between them.

FIG. 3 is a sectional view of the sub-transistor portion (BB' in FIG. 1) of the thin film transistor substrate in an embodiment of the present invention. As shown in the figure, the previous gate electrode 1 extends, and a first insulating film 16, a semiconductor layer 3,
The presence of the ohmic contact layer 15 is the same as in the main transistor. The first auxiliary electrode 9 is an electrode formed at the same time as the drain electrode, but is not electrically connected to the drain electrode, and is not electrically connected to the third contact hole 1 of the second insulating film 17.
It is electrically connected to the shielding electrode 18 through 0. Similarly, the second auxiliary electrode 11 is formed simultaneously with the drain-source electrodes 2 and 4, and the first auxiliary electrode 9
A sub-transistor is formed between the two. The second auxiliary electrode 11 is electrically connected to the pixel electrode 5 through the fourth contact hole 12 of the second insulating film 17 and the fifth contact hole 13 of the third insulating film 19 .

FIG. 4 is an explanatory diagram of the electrical connection system of the substrate in the embodiment of the present invention. On the matrix array formed by the gate electrode group 20 and the drain electrode group 21, the counter electrode 22 is formed on the entire surface of the counter electrode substrate opposite to the thin film transistor substrate, as shown in the figure. On the other hand, although a portion of the shield electrode 18 is open, since it is a single solid electrode, only one electric signal is applied as shown in this figure. This shielding electrode 1
8, a voltage comparable to the voltage applied to the counter electrode 22 is input. In this embodiment, the shield electrode 18 and the counter electrode 22 are electrically connected. Note that the connection between the shielding electrode 18 and the counter electrode 22 is extremely easy because both are formed on one solid substrate.

FIG. 5 is an equivalent circuit diagram of one pixel of a thin film transistor type liquid crystal display device according to an embodiment of the present invention. As shown in the figure, there is a main transistor 28 for writing a drain electrode signal at the intersection of the n-th gate electrode 25 and the drain electrode 2, and a main transistor 28 for writing a drain electrode signal is located at the intersection of the n-1th gate electrode 24 and the drain electrode 2. There is a sub-transistor 27 for writing a shield electrode signal. Further, the pixel electrode 5 is connected to these main and sub transistors, and the liquid crystal layer is represented by a parallel circuit of a liquid crystal resistor 29 and a liquid crystal capacitor 30. A counter electrode 22 electrically connected to the shield electrode 18 is provided on the opposite side of the liquid crystal layer.

In the figure, the nth pixel electrode 5 is n-
When the first gate electrode 24 is turned on, the voltage of the counter electrode 22 is written as a shield electrode signal via the sub-transistor 27, and when the n-th gate electrode 25 is turned on, the drain electrode signal is written via the main transistor 28. is written. Since the storage capacitor 34 between the pixel electrode and the shield electrode is in parallel with the liquid crystal resistor 29 and the liquid crystal capacitor 30, it is possible to reduce the source voltage shift down caused by the parasitic capacitance 33 between the gate electrode and the source electrode when the gate is turned off.

FIG. 6 is an explanatory diagram showing a method for driving a thin film transistor type liquid crystal display device according to an embodiment of the present invention. Moreover, FIG. 7 is a pixel voltage waveform diagram obtained by this driving method. First, the drain voltage waveform 35 shown in FIG. 6(a) is inverted between positive and negative every line, and further inverted between positive and negative every frame. This is a commonly used driving method and is effective for reducing flicker and brightness gradients, but unless it is reversed for each line,
This is not to say that the present invention does not have its effects, and there is no problem even if only one frame is inverted.

Next, the counter voltage waveform 36 is set slightly below the center value of the positive and negative levels of the drain voltage. This is because the source, that is, the pixel voltage waveform, shifts down when the gate is turned off due to the parasitic capacitance between the gate electrode and the source electrode of the TFT. This is because a DC voltage is applied to the liquid crystal, causing the liquid crystal to deteriorate. What should be noted here is that due to the low setting of this counter voltage, there is always a DC voltage between the drain electrode 2 and the counter electrode 25.
component is generated. However, in the present invention, since the shield electrode 7 is provided on the drain electrode 2, fluctuations in the drain voltage are shielded by the shield electrode 18, and the shield electrode 1
8 receives the same signal as the counter voltage waveform 22, so no potential difference is generated in the liquid crystal on the drain wiring, and no DC component is generated.

Next, the gate pulse on period shown in FIG. 6(b) starts when the drain voltage signal is switched, and is turned off a little earlier than when the next drain signal is switched. The purpose of this earlier time Δt is to prevent erroneous writing of next line information due to tailing due to gate pulse delay. Although the effectiveness of the present invention is not lost even if it is absent, it is more preferable to have it.

Hereinafter, a method for driving a thin film transistor type liquid crystal display device according to an embodiment of the present invention will be described with reference to FIGS. 6 and 7. Regarding the nth pixel, first, when the n-1th gate is turned on at time tn-1, the counter voltage waveform 36 is written to the pixel electrode. Then,
When the gate is turned off, the pixel voltage waveform is shifted down due to the parasitic capacitance between the gate electrode and the source electrode of the sub-transistor, and then maintained for a period of Δt. Next, time tn
When the n-th gate is turned on, a drain electrode signal is written, and when the gate is turned off, the pixel voltage waveform is shifted down due to the parasitic capacitance between the gate electrode and the source electrode of the main transistor. After that, n in the next frame
- The pixel voltage is held until the first gate is turned on.

When driving in this way, the pixel electrode potential is inverted every frame, regardless of whether it is positive or negative, so charging and discharging occur in the desired direction from the time the n-1th gate is turned on. Therefore, the drain voltage signal to be written when the nth gate voltage is turned on is quickly reached. In other words, sufficient on-characteristics of the transistor can be obtained.

In addition, when the gate pulse width is set equal to one line as in the conventional case, if a delay occurs in the nth gate pulse, the drain signal of the opposite polarity when the n+1th gate is turned on is changed to the drain signal of the opposite polarity when the nth gate pulse is trailing. However, in this embodiment, as mentioned above, sufficient on-characteristics can be obtained, so if the n-th gate is turned off slightly before the input of the n+1-th drain pulse, such erroneous writing can be avoided. It disappears. The time for turning off the gate pulse early at this time is shown as Δt, but since this value varies depending on the material and structure of the TFT, the size of the liquid crystal display device, etc., it will not be discussed in detail. Also, this Δ
The setting of t reduces the writing time, which is not good for the on-characteristics, but this is no longer a problem because of the sub-transistor and shield electrode method described above.

It should be noted that the present invention is not limited to the above-mentioned embodiments, but may be modified according to the spirit of the present invention, such as by forming the shielding electrode 18 on the entire surface other than the first to fourth contact holes 6, 7, 10, and 11. Based on this, various modifications are possible and are not excluded from the scope of the present invention.

[0024]

As described above in detail, according to the present invention, a shielding electrode is provided on the drain line via an insulating film,
In addition, a storage capacitor is formed between the shield electrode and the pixel electrode, and a voltage similar to that of the counter electrode is input to the shield electrode, and the voltage of the shield electrode is applied to the pixel electrode by the sub-transistor when the previous gate is turned on. Since it is written, the following effects are achieved. (1) Since the DC component between the drain electrode and the counter electrode becomes zero, the liquid crystal does not deteriorate. (2) The drain signal prevents the liquid crystal from turning on and causing light leakage. Therefore, since the black mask layer is not required, the aperture ratio is improved. (3) Sufficient on-characteristics of the transistor can be obtained. If the off time of the gate pulse is set earlier than the time when the drain voltage of the next line is generated, erroneous writing of the next line signal due to gate pulse delay can be eliminated. (4) The drop in pixel electrode voltage due to parasitic capacitance between the gate electrode and the source electrode is reduced.

[Brief explanation of drawings]

FIG. 1 is a plan view of a thin film transistor substrate in an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a main transistor portion of a thin film transistor substrate in an embodiment of the present invention.

FIG. 3 is a cross-sectional view of a sub-transistor section of a thin film transistor substrate in an embodiment of the present invention.

FIG. 4 is an explanatory diagram of an electrical connection system of a thin film transistor substrate in an embodiment of the present invention.

FIG. 5 is an equivalent circuit diagram per pixel of a thin film transistor type liquid crystal display device according to an embodiment of the present invention.

FIG. 6 is an explanatory diagram showing a method of driving a thin film transistor type liquid crystal display device according to an embodiment of the present invention.

FIG. 7 is a pixel voltage waveform diagram of a thin film transistor type liquid crystal display device according to an embodiment of the present invention.

FIG. 8 is a partial cross-sectional view of a conventional thin film transistor substrate.

[Explanation of symbols]

1 Gate electrode 2 Drain electrode 3 Semiconductor layer 4 Source electrode 5 Pixel electrode 6 First contact hole 7 Second contact hole 8 Shield electrode opening 9 First auxiliary electrode 10 Third contact hole 11 Second auxiliary electrode 12 4th contact hole 13 5th contact hole 16 First insulation film 17 Second insulating film 18 Shielding electrode 19 Third insulating film 22 Counter electrode

Claims (2)

[Claims] 1. A thin film transistor substrate having a plurality of gate electrodes, a plurality of drain electrodes intersecting with the gate electrodes, a thin film transistor provided at the intersection thereof, a pixel electrode connected to the thin film transistor, and a liquid crystal. A thin film transistor type liquid crystal display device comprising a counter electrode substrate sandwiching the thin film transistor substrate and opposing the thin film transistor substrate,
The thin film transistor substrate includes (a) a first insulating film formed on the gate electrode, (b) a source-drain electrode and first and second auxiliary electrodes formed on the gate insulating film, and (b) a first insulating film formed on the gate insulating film; ) a second insulating film formed on each of the electrodes and on the entire surface other than at least the connection area between the source electrode and the pixel electrode and the connection area between the second auxiliary electrode and the pixel electrode; a counter electrode formed on the second insulating film and on the entire surface other than at least a connection portion between the source electrode and the pixel electrode and a connection portion between the second auxiliary electrode and the pixel electrode, and a counter electrode of the counter electrode substrate; and (d) on the shield electrode, at least a connection portion between the source electrode and the pixel electrode and a connection portion between the second auxiliary electrode and the pixel electrode. (e) the pixel electrode formed on the third insulating film, and the source-drain electrode is connected to the drain when the n-th gate pulse is turned on. A main transistor is configured to write the voltage on the electrode to the n-th pixel electrode, and the first and second auxiliary electrodes write the voltage on the shield electrode to the n-th pixel electrode when the (n-1)th gate pulse is turned on. A thin film transistor type liquid crystal display device comprising a sub-transistor for writing data. 2. The thin film transistor type liquid crystal display device according to claim 1, further comprising a drive circuit that sets the off time of the gate pulse earlier than the time when the drain voltage of the next line is generated.