JPH04312118A - Arithmetic circuit - Google Patents

Abstract

PURPOSE:To improve the processing ability of a date processor by carrying out simultaneously bath masking and computing operations of data. CONSTITUTION:A mask register 10 holds the mask register input 20 serving as a mask pattern which applies the mask control to the data. Then a mask control register 11 is added to designate the mask control register input 23, i.e., a kind of the mask control. Then the mask control circuits (8) 12 and (b) 13 apply the mask control to the arithmetic resources (a) 21 and (b) 22 with the use of the mask register output 24 of the mask pattern given from the register 10 and the mask control register output 25, i.e., the kind of the mask control designated by the register 11 and then outputs the arithmetic inputs (a) 26 and (b) 27. Then the arithmetic inputs (a) 26 and (b) 27 are computed by an arithmetic logic computing circuit 14, and these computing result outputs 28 are outputted.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an arithmetic circuit in a data processing device, and more particularly to mask control of an arithmetic circuit.

0002

[Prior Art] Conventionally, in this type of arithmetic circuit, a mask operation is first performed according to data mask control information to generate mask-controlled data, and this mask-controlled data is used as an arithmetic resource in an arithmetic logic operation circuit. , performs operations such as logical product and logical sum, and outputs the operation results. That is, data masking and arithmetic processing are performed individually.

0003

[Problems to be Solved by the Invention] As mentioned above, in conventional arithmetic circuits, data masking and mask-controlled data operations are performed separately. The drawback is that time is spent on operations such as logical product and logical sum using arithmetic resources, and the processing capacity of the data processing device cannot be improved.

An object of the present invention is to provide a mask register that holds a mask pattern for masking data, a mask control register that specifies the type of mask control, and a mask control circuit that controls arithmetic resources based on the outputs of these registers. Thereby, it is an object of the present invention to provide an arithmetic circuit with improved processing performance of a data processing device, which can eliminate the above-mentioned drawbacks and simultaneously execute data masking and arithmetic operations, which were conventionally executed separately.

[0005]

[Means for Solving the Problems] The arithmetic circuit of the present invention has a mask register that holds a mask pattern for controlling data as a mask in the arithmetic circuit that inputs arithmetic resources into a data processing device and performs operations using an arithmetic and logic circuit. , has a mask control register that specifies the type of mask control, and a mask control circuit that performs mask control on calculation resources and outputs calculation input according to the mask pattern from the mask register and the type of mask control from the mask control register, Arithmetic input is calculated by an arithmetic logic circuit.

[0006]

Embodiments Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an arithmetic circuit according to an embodiment of the present invention.

In FIG. 1, the arithmetic circuit of this embodiment includes a mask register 10, a mask control register 11, a mask control circuit a12, a mask control circuit b13, an arithmetic logic operation circuit 14, a mask register input 20, and an arithmetic resource a21.
, arithmetic resource b22, mask control register 23, mask register output 24, mask control register output 25, arithmetic input a26, arithmetic input b27, and arithmetic result output 28.

The mask register 10 receives and holds a mask register input 20 which is a mask pattern for processing data.

The mask control register 11 receives a mask control register input 23 which is a signal specifying the type of mask control.
Enter and hold. These mask register output 24 and mask control register output 25 are connected to the mask control circuit a1.
2 and b13, and calculation resources a21 and b2
2 is mask-controlled.

Mask control circuits a12 and b13 perform mask control on arithmetic resources a21 and b22 according to a mask register output 24 and a mask control register output 25, and output them as arithmetic inputs a26 and b27.

There are multiple types of mask control, including the following examples.

As a first example, the mask control circuit a12 masks, ie, sets to 0, the bit of the arithmetic resource a21 that corresponds to the 0 bit in the mask register output 24. On the other hand, in the mask control circuit 13, the calculation resource 2 corresponding to the 1 bit in the mask register output 24 is
Mask the bit 2, that is, set it to 0. By ORing these mask-controlled data in the arithmetic logic unit 14, the calculation resource a is output as the calculation result output 28.
Data obtained by combining the data of 21 and b22 according to the pattern of the mask register output 24 is obtained by one operation.

As a second example, the mask register output 24
Arithmetic resources a21 and b2 corresponding to the 0 bits in
By setting both bits of 2 to 2, the partial operation of the operation resources a21 and b22 corresponding to the bit of 1 in the mask register output 24 is performed in one operation.

[0015]

As explained above, the arithmetic circuit of the present invention has a mask register that holds a mask pattern for masking data, a mask control register that specifies the type of mask control, and arithmetic resources that are controlled by the outputs of these registers. Conventionally, by having a mask control circuit that controls
Data masking and calculation, which were previously executed separately, can now be executed at the same time, resulting in an effect that the processing performance of the data processing device can be improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an arithmetic circuit according to an embodiment of the present invention.

[Explanation of symbols]

10 Mask register 11 Mask control register 12 Mask control circuit a 13 Mask control circuit b 14 Arithmetic logic operation circuit 20 Mask register input 21 Computation resource a 22 Computation resource b 23 Mask control register 24 Mask register output 25 Mask control register output 26 Calculation input a 27 Calculation input b 28 Operation result output

Claims (1)

[Claims] Claim 1: In an arithmetic circuit that inputs arithmetic resources into a data processing device and performs arithmetic operations using an arithmetic logic circuit, a mask register that holds a mask pattern for masking data and a mask control register that specifies the type of mask control. and a mask control circuit that performs mask control on the arithmetic resource according to the mask pattern from the mask register and the type of mask control from the mask control register and outputs the arithmetic input, and the arithmetic logic circuit controls the arithmetic operation. An arithmetic circuit characterized by calculating input.