JPH04311028A - Manufacture of hetero epitaxial substrate - Google Patents
Manufacture of hetero epitaxial substrateInfo
- Publication number
- JPH04311028A JPH04311028A JP7641391A JP7641391A JPH04311028A JP H04311028 A JPH04311028 A JP H04311028A JP 7641391 A JP7641391 A JP 7641391A JP 7641391 A JP7641391 A JP 7641391A JP H04311028 A JPH04311028 A JP H04311028A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- substrate
- semiconductor
- gallium arsenide
- silicon wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 31
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 125000005842 heteroatom Chemical group 0.000 title description 3
- 239000013078 crystal Substances 0.000 claims abstract description 37
- 239000004065 semiconductor Substances 0.000 claims abstract description 26
- 239000000463 material Substances 0.000 claims abstract description 22
- 238000000034 method Methods 0.000 claims abstract description 17
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 24
- 239000010409 thin film Substances 0.000 abstract description 23
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 19
- 229910052710 silicon Inorganic materials 0.000 abstract description 19
- 239000010703 silicon Substances 0.000 abstract description 19
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 abstract description 4
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 abstract description 2
- 238000003486 chemical etching Methods 0.000 abstract description 2
- 229910052731 fluorine Inorganic materials 0.000 abstract description 2
- 239000011737 fluorine Substances 0.000 abstract description 2
- 230000001747 exhibiting effect Effects 0.000 abstract 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 22
- FTWRSWRBSVXQPI-UHFFFAOYSA-N alumanylidynearsane;gallanylidynearsane Chemical compound [As]#[Al].[As]#[Ga] FTWRSWRBSVXQPI-UHFFFAOYSA-N 0.000 description 5
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
Abstract
Description
【０００１】0001
【産業上の利用分野】本発明は、高速半導体素子、発光
素子、光演算回路素子等に使用するヘテロ・エピタキシ
ャル基板の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a heteroepitaxial substrate used for high-speed semiconductor devices, light emitting devices, optical arithmetic circuit devices, etc.
【０００２】0002
【従来の技術】従来、ヘテロ・エピタキシャル基板を作
製しようとする場合、異なる材料の格子定数を整合させ
るため、ヘテロ界面に両材料の超格子構造を挟んだり、
ヘテロ界面にアモルファス状態の薄膜を挟んだり等の手
法を用いていた。[Prior Art] Conventionally, when attempting to fabricate a hetero-epitaxial substrate, in order to match the lattice constants of different materials, a superlattice structure of both materials is sandwiched at the hetero interface, or
Techniques such as sandwiching an amorphous thin film between the hetero interfaces were used.
【０００３】0003
【発明が解決しようとする課題】しかしながら、従来の
技術による手法では、その基本的な原理は、ヘテロ材料
の格子定数の差を緩和させるためのものでしかなく、そ
のため安定的に再現性よくヘテロ構造を実現することは
困難であった。[Problems to be Solved by the Invention] However, the basic principle of conventional techniques is only to alleviate the difference in the lattice constants of heterogeneous materials, and therefore it is possible to stabilize and reproducibly create heterogeneous materials. It was difficult to realize the structure.
【０００４】0004
【課題を解決するための手段】本発明は、半導体単結晶
基板の表面に前記半導体単結晶基板と異なる材料を付着
させた後、該半導体単結晶基板を取り去り、前記材料の
該半導体単結晶基板が接していた表面に半導体をエピタ
キシャル成長させることを特徴とするヘテロ・エピタキ
シャル基板の製造方法である。その原理は、半導体単結
晶基板の表面に前記材料と異なる材料を付着させると、
付着された材料の半導体単結晶基板と接した面の原子配
列が、該単結晶基板の表面の原子配列になぞられたもの
になるため、該半導体単結晶基板を取り去り、該半導体
単結晶基板が接していた表面に半導体を付着させたとき
に、該分子構造が反映された結晶成長が再現でき、エピ
タキシャル成長を行なわせることが可能になるからであ
る。[Means for Solving the Problems] The present invention provides a method for attaching a material different from the semiconductor single crystal substrate to the surface of the semiconductor single crystal substrate, and then removing the semiconductor single crystal substrate. This is a method for manufacturing a hetero-epitaxial substrate, characterized by epitaxially growing a semiconductor on the surface that was in contact with the substrate. The principle is that when a material different from the above material is attached to the surface of a semiconductor single crystal substrate,
Since the atomic arrangement of the surface of the deposited material in contact with the semiconductor single crystal substrate is similar to the atomic arrangement of the surface of the single crystal substrate, the semiconductor single crystal substrate is removed and the semiconductor single crystal substrate is This is because when a semiconductor is attached to the surface that was in contact with it, crystal growth that reflects the molecular structure can be reproduced, making it possible to perform epitaxial growth.
【０００５】[0005]
【実施例】図１（ａ）〜（ｃ）は、本発明による実施例
を示す、ヘテロ・エピタキシャル基板の製造方法で、半
導体単結晶基板としてはシリコン・ウェハ、付着させる
材料としてはガリウム砒素を用いたものである。[Embodiment] FIGS. 1(a) to 1(c) show a method of manufacturing a hetero-epitaxial substrate according to an embodiment of the present invention, in which a silicon wafer is used as a semiconductor single crystal substrate, and gallium arsenide is used as a material to be deposited. This is what was used.
【０００６】図１（ａ）は、清浄な表面を持つシリコン
・ウェハ１０１上にＭＯＣＶＤ法を用いてガリウム砒素
薄膜１０２を形成する工程。ガリウム砒素薄膜１０２は
、後のハンドリングのしやすさ等から、０．３ｍｍの厚
さになるように付着させた。ここで、１０３は、前記ガ
リウム砒素薄膜１０２の、前記シリコン・ウェハ１０１
の結晶構造を反映した原子構造を表面に持つ領域を示す
。FIG. 1(a) shows a step of forming a gallium arsenide thin film 102 on a silicon wafer 101 having a clean surface using the MOCVD method. The gallium arsenide thin film 102 was deposited to a thickness of 0.3 mm for ease of handling later. Here, 103 is the silicon wafer 101 of the gallium arsenide thin film 102.
It shows a region whose surface has an atomic structure that reflects the crystal structure of.
【０００７】図１（ｂ）は、前記シリコン・ウェハ１０
１を弗素系の気体を用いた化学エッチング法を用いて取
り去った後洗浄することにより、前記シリコン・ウェハ
１０１の結晶構造を反映した原子構造を表面に持つガリ
ウム砒素薄膜１０２を作製する工程。FIG. 1(b) shows the silicon wafer 10.
1 using a chemical etching method using a fluorine-based gas and then cleaning, thereby producing a gallium arsenide thin film 102 having an atomic structure reflecting the crystal structure of the silicon wafer 101 on its surface.
【０００８】図１（ｃ）は、前記ガリウム砒素薄膜１０
２の前記シリコン・ウェハ１０１に接していた面上に減
圧ＣＶＤ法を用いてシリコンをエピタキシャル成長させ
て、エピタキシャル・シリコン薄膜１０４を形成する工
程。FIG. 1(c) shows the gallium arsenide thin film 10.
Step 2 of epitaxially growing silicon on the surface that was in contact with the silicon wafer 101 using a low pressure CVD method to form an epitaxial silicon thin film 104.
【０００９】図２（ａ）〜（ｃ）は、本発明による実施
例を示す、半導体薄膜の製造方法で、半導体単結晶基板
としてはガリウム砒素・ウェハ、付着させる材料として
アルミニウム・ガリウム・砒素混晶を用いたものである
。FIGS. 2(a) to 2(c) show a method for manufacturing a semiconductor thin film according to an embodiment of the present invention, in which a gallium arsenide wafer is used as the semiconductor single crystal substrate, and an aluminum-gallium-arsenic mixture is used as the material to be deposited. It uses crystal.
【００１０】図２（ａ）は、清浄な表面を持つガリウム
砒素・ウェハ２０１上にＭＯＣＶＤ法を用いてアルミニ
ウム・ガリウム・砒素混晶薄膜２０２を形成する工程。
アルミニウム・ガリウム・砒素混晶薄膜２０２は、後の
ハンドリングのしやすさ等から、０．３ｍｍの厚さにな
るように付着させた。ここで、２０３は、前記アルミニ
ウム・ガリウム砒素混晶薄膜２０２の、前記シリコン・
ウェハ２０１の結晶構造を反映した原子構造を表面に持
つ領域を示す。FIG. 2(a) shows a step of forming an aluminum-gallium-arsenic mixed crystal thin film 202 on a gallium-arsenide wafer 201 having a clean surface by using the MOCVD method. The aluminum-gallium-arsenic mixed crystal thin film 202 was deposited to a thickness of 0.3 mm for ease of handling later. Here, 203 is the silicon layer of the aluminum gallium arsenide mixed crystal thin film 202.
A region whose surface has an atomic structure reflecting the crystal structure of the wafer 201 is shown.
【００１１】図２（ｂ）は、前記ガリウム砒素・ウェハ
２０１を硫酸・過酸化水素系の溶液を用いてエッチング
することにより取り去った後洗浄することにより、前記
ガリウム砒素・ウェハ２０１の結晶構造を反映した原子
構造を表面に持つアルミニウム・ガリウム・砒素混晶薄
膜２０２を作製する工程。FIG. 2(b) shows that the crystal structure of the gallium arsenide wafer 201 is removed by etching the gallium arsenide wafer 201 using a sulfuric acid/hydrogen peroxide solution and then cleaning it. A step of producing an aluminum/gallium/arsenic mixed crystal thin film 202 having a reflected atomic structure on its surface.
【００１２】図２（ｃ）は、前記アルミニウム・ガリウ
ム・砒素混晶薄膜２０２の前記ガリウム砒素・ウェハ２
０１に接していた面上にＭＯＣＶＤ法を用いてガリウム
砒素をエピタキシャル成長させて、エピタキシャル・ガ
リウム砒素薄膜２０４を形成する工程。FIG. 2(c) shows the gallium arsenide wafer 2 of the aluminum gallium arsenide mixed crystal thin film 202.
A step of epitaxially growing gallium arsenide on the surface that was in contact with 01 using the MOCVD method to form an epitaxial gallium arsenide thin film 204.
【００１３】なお、本発明による実施例では、単結晶材
料としてシリコン、ガリウム砒素を、その上に付着させ
る材料としてガリウム砒素、アルミニウム・ガリウム・
砒素混晶を用いたが、他の材料を用いても同様な効果が
得られるのは明らかであり、それらも本発明の範疇に属
する。In the embodiment according to the present invention, silicon and gallium arsenide are used as the single crystal material, and gallium arsenide, aluminum, gallium, and gallium arsenide are used as the materials to be deposited thereon.
Although arsenic mixed crystal is used, it is clear that similar effects can be obtained by using other materials, and these also belong to the scope of the present invention.
【００１４】[0014]
【発明の効果】以上説明したように本発明の実施例によ
る製造方法を用いて、従来作製することが困難であった
ヘテロ・エピタキシャル基板を、原材料に用いる単結晶
基板の大きさまでの大面積のものまで、安価に、安定的
に作製することが可能になった。[Effects of the Invention] As explained above, by using the manufacturing method according to the embodiment of the present invention, a hetero-epitaxial substrate, which has been difficult to produce in the past, can be manufactured with a large area up to the size of a single crystal substrate used as a raw material. It has become possible to stably produce many things at low cost.
【図１】本発明による実施例を示す、ヘテロ・エピタキ
シャル基板の製造方法で、半導体単結晶基板としてはシ
リコン・ウェハ、付着させる材料としてはガリウム砒素
を用いた図である。FIG. 1 is a diagram showing a method for manufacturing a hetero-epitaxial substrate according to an embodiment of the present invention, in which a silicon wafer is used as the semiconductor single crystal substrate and gallium arsenide is used as the material to be deposited.
【図２】本発明による実施例を示す、半導体薄膜の製造
方法で、半導体単結晶基板としてはガリウム砒素・ウェ
ハ、付着させる材料としてアルミニウム・ガリウム・砒
素混晶を用いた図である。FIG. 2 is a diagram showing a method for manufacturing a semiconductor thin film according to an embodiment of the present invention, in which a gallium arsenide wafer is used as a semiconductor single crystal substrate and an aluminum-gallium-arsenide mixed crystal is used as a material to be deposited.
１０１ シリコン・ウェハ
１０２ ガリウム砒素薄膜
１０３ ガリウム砒素１０２の、シリコン・ウェハ１
０１の結晶構造を反映した原子構造を表面に持つ領域１
０４ エピタキシャル・シリコン薄膜２０１ ガリ
ウム砒素・ウェハ
２０２ アルミニウム・ガリウム・砒素混晶薄膜１０
３ アルミニウム・ガリウム・砒素混晶薄膜２０２の
、ガリウム砒素・ウェハ101 Silicon wafer 102 Gallium arsenide thin film 103 Silicon wafer 1 of gallium arsenide 102
Region 1 whose surface has an atomic structure reflecting the crystal structure of 01
04 Epitaxial silicon thin film 201 Gallium arsenide wafer 202 Aluminum gallium arsenide mixed crystal thin film 10
3 Gallium arsenide wafer of aluminum gallium arsenide mixed crystal thin film 202
Claims (2)
単結晶基板と異なる材料を付着させた後、該半導体単結
晶基板を取り去り、前記材料の該半導体単結晶基板が接
していた表面に半導体をエピタキシャル成長させること
を特徴とするヘテロ・エピタキシャル基板の製造方法。1. After attaching a material different from the semiconductor single-crystal substrate to the surface of the semiconductor single-crystal substrate, the semiconductor single-crystal substrate is removed, and a semiconductor is applied to the surface of the material that was in contact with the semiconductor single-crystal substrate. A method for manufacturing a hetero-epitaxial substrate characterized by epitaxial growth.
が、半導体単結晶基板と同一の材料であることを特徴と
する請求項１記載のヘテロ・エピタキシャル基板の製造
方法。2. The method of manufacturing a heteroepitaxial substrate according to claim 1, wherein the semiconductor material to be epitaxially grown is the same material as the semiconductor single crystal substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7641391A JPH04311028A (en) | 1991-04-09 | 1991-04-09 | Manufacture of hetero epitaxial substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7641391A JPH04311028A (en) | 1991-04-09 | 1991-04-09 | Manufacture of hetero epitaxial substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04311028A true JPH04311028A (en) | 1992-11-02 |
Family
ID=13604540
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7641391A Pending JPH04311028A (en) | 1991-04-09 | 1991-04-09 | Manufacture of hetero epitaxial substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04311028A (en) |
-
1991
- 1991-04-09 JP JP7641391A patent/JPH04311028A/en active Pending
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