JPH04293331A - Reset type scramble code transmission system - Google Patents

Abstract

PURPOSE:To much reduce the possibility that a pattern after scrambling is coincident with a frame pattern and the system enters pseudo synchronization. CONSTITUTION:The system is provided with a transmission reception section 108 consisting of a 1st scramble circuit 101 scrambling a transmission signal of its own station at a 1st period while an opposite station is synchronously with the transmission signal of its own station, a frame insertion circuit 102 inserting a frame synchronization pattern to the transmission signal, a synchronization information insertion circuit 103 inserting synchronization information representing whether or not its own station is synchronously with a reception signal sent from the opposite station to the transmission signal of the frame insertion circuit, a 2nd scramble circuit 104 scrambling the transmission signal at a 2nd period different from the 1st period and sending the scrambled signal to the opposite station, a frame synchronization circuit 105 taking frame synchronization with the reception signal to generate the synchronization information of its own station, a synchronization information detection circuit 106 detecting the synchronization information of the opposite station in the reception signal and a descramble circuit 107 descrambling the reception signal.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reset type scramble code transmission system.

0002

2. Description of the Related Art In a conventional reset type scramble code transmission system, as shown in FIG. Receiving unit 2 of the opposite station that transmits and receives this transmitted signal
A frame synchronization circuit 23 of No. 6 performs frame synchronization, and a descrambling circuit 24 performs descrambling to obtain a received signal.

0003

[Problem to be Solved by the Invention] In the conventional reset-type scramble code transmission system described above, when a specific fixed pattern is input as a transmission signal during the frame synchronization process, there is a possibility that the scrambled pattern will match the frame pattern. There is a drawback that if a certain pattern of the transmitted signal enters pseudo-synchronization, it will not be possible to escape from it.

0004

[Means for Solving the Problems] The method of the present invention provides a method for scrambling the transmission signal of the local station in the first cycle only while the opposite station is not in synchronization with the transmission signal of the local station. a scrambling circuit, a frame insertion circuit that inserts a frame synchronization pattern into the transmission signal of the first scrambling circuit, and whether or not the own station is in synchronization with the received signal sent from the opposite station. a synchronization information insertion circuit for inserting synchronization information indicating the frame insertion circuit into the transmission signal of the frame insertion circuit; a second scrambling circuit for transmitting, a frame synchronization circuit for performing frame synchronization of the received signal and generating the synchronization information of the own station, and a synchronization information detection for detecting the synchronization information of the opposite station in the received signal. The local station and the opposing station are each provided with a transmitting/receiving section each having a circuit and a descrambling circuit for descrambling the received signal.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, illustrating a case where scramble code transmission is performed between a transmitting/receiving section 108 of a local station and a transmitting/receiving section 116 of an opposite station. In the scramble circuit 101, the transmission signal 11 of the own station is
7 at an interval set to 2 frames or more,
It is sent to the frame insertion circuit 102. Frame insertion circuit 10
In step 2, a frame pattern is inserted into the output signal of the scrambling circuit 101. The synchronization information insertion circuit 103 receives the output signal of the frame insertion circuit 102 and the synchronization information of the transmission signal 121 of the opposite station in the frame synchronization circuit 105, and inserts the frame synchronization circuit into the empty bit of the output signal of the frame insertion circuit 102. The synchronization information from 105 is inserted and sent to the scramble circuit 104. Scramble circuit 10
4, the output signal of the synchronization information insertion circuit 103 is scrambled at one frame interval and transmitted to the opposite station.

[0007] In the transmitter/receiver section 116 of the opposite station that receives this transmission signal 118, frame synchronization circuit 109 performs frame synchronization, and outputs information indicating whether or not a synchronization state has been entered to synchronization information insertion circuit 113. Synchronous information insertion circuit 1
13, upon receiving the synchronization information sent by the frame synchronization circuit 109 and the output signal of the frame insertion circuit 114, the synchronization information from the frame synchronization circuit 109 is inserted into the empty bits of the output signal of the frame insertion circuit 114, and the scramble circuit Send to 112. A scrambling circuit 112 scrambles the output signal of the synchronization information insertion circuit 113 at one frame interval and transmits it to the transmitting/receiving section 108 .

[0008] In the transmitting/receiving section 108 of the local station that receives this transmission signal 121, a frame synchronization circuit 105 performs frame synchronization, and a synchronization information detection circuit 106 receives the synchronization information inserted by the information insertion circuit 113 of the opposite station. It is detected, it is determined whether or not the opposite station has entered synchronization, and this information is output to the scrambling circuit 101. In the scramble circuit 101,
When the output signal of the synchronization information detection circuit 106 indicates that the opposite station is in synchronization, scrambling is stopped and the transmission signal 117 is output as is to the frame insertion circuit 102. The frame insertion circuit 102 receives the output signal of the scrambling circuit 101, that is, the transmission signal 117, and
Insert a frame pattern into this. The synchronization information insertion circuit 103 receives the output signal of the frame insertion circuit 102 and information indicating the synchronization state of its own station from the frame synchronization circuit 105, and inserts this into the empty bit of the output signal of the frame insertion circuit 102. Then, the scramble circuit 104 scrambles the output signal of the synchronization information insertion circuit 103 at one frame interval and transmits it to the opposite station.

[0009] In the descrambling circuit 110 of the opposite station that received this transmission signal 118, the frame synchronization circuit 109
When the synchronization state is entered, the transmitted signal 118 is descrambled at frame intervals to obtain a received signal 119.

As described above, in this embodiment, when frame synchronization is not achieved at the opposing station, the scramble circuits 101 and 104 perform two types of scrambling at different intervals, so that the transmission signal 117 is not specified. Even if a fixed pattern appears and matches the frame pattern in the scrambled transmission signal 118, when viewed in frame units,
The probability of this occurring in consecutive frames is extremely low. Once the opposite station enters a synchronized state, it detects the synchronization information sent from the opposite station and stops the scrambling of the scrambling circuit 101, which is similar to the conventional method (FIG. 2). Can shift to scramble operation.

[0011] Transmitting/receiving sections 108 and 11 of the own station and the opposite station
6 has the same configuration. Therefore, the scrambling operation at the opposite station is also the same as in the above case.

0012

[Effects of the Invention] As explained above, the present invention performs double scrambling with different scrambling intervals until frame synchronization is achieved at the opposite station, and only performs one type of scrambling once frame synchronization is achieved at the opposite station. This has the effect that even if a specific fixed pattern appears in the transmission signal, the possibility that the scrambled pattern will match the frame pattern and enter pseudo-synchronization can be extremely reduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the invention.

FIG. 2 is a block diagram of a conventional method.

[Explanation of symbols]

101, 104, 112, 115 Scramble circuit 102, 114 Frame insertion circuit 103,
113 Synchronization information insertion circuit 105, 109
Frame synchronization circuit 106, 111 Synchronization information detection circuit 107, 110 Descrambling circuit 10
8,116 Transmitting/receiving section

Claims (1)

[Claims] 1. A first scrambling circuit that scrambles a transmission signal of the own station in a first period only while the opposite station is not in synchronization with the transmission signal of the own station; a frame insertion circuit that inserts a frame synchronization pattern into a transmission signal of the circuit; and a frame insertion circuit that inserts synchronization information indicating whether or not the local station is in a synchronized state with respect to the received signal sent from the opposite station. a synchronization information insertion circuit for inserting into a transmission signal; a second scrambling circuit for scrambling the transmission signal of the synchronization information insertion circuit at a second period different from the first period and transmitting it to the opposite station; a frame synchronization circuit that performs frame synchronization of received signals and generates the synchronization information of the local station;
A transmitting/receiving unit each having a synchronization information detection circuit for detecting the synchronization information of the opposite station in the received signal and a descrambling circuit for descrambling the received signal is provided in the own station and the opposite station, respectively. A reset type scramble code transmission method characterized by: