JPH04293295A - Manufacture of circuit substrate - Google Patents

Abstract

PURPOSE:To provide a manufacturing method for a circuit board in which a circuit can perform an original function by preventing a remarkable decrease of an electric conductivity by a porous or rough surface wiring pattern. CONSTITUTION:Since a circuit pattern 10 after a baking step is finished is porous, a ceramic board 1 having the pattern 10 is calendered by a pair of calender rolls 11, 12. A pressure is applied to a wiring part 10a of the pattern 10 by a calendering step, and the part 10a is elongated. As a result, many holes 10b, 10b,... existed in the part 10a are eliminated, and the part 10a becomes nonporous. Further, the rough surface of the part 10a becomes smooth.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a circuit board such as a ceramic circuit board used in an electronic control device such as a semiconductor device.

0002

2. Description of the Related Art Conventionally, circuit boards such as ceramic circuit boards are often used in electronic control devices such as semiconductor devices. This circuit board has a conductor circuit pattern formed on an insulating substrate. By the way, in manufacturing such a circuit board, it is necessary to form a circuit pattern of a conductor, and printing methods and photo-etching methods have been generally employed as methods for forming circuit patterns.

In the printing method, as shown in FIG. 3, a screen 2 on which a pattern 2a identical to the circuit pattern is formed in advance is placed on a ceramic substrate 1, and a conductor 3 such as a conductive paste is passed through the screen 2. A circuit pattern is formed by transferring the pattern 2a onto the ceramic substrate 1 in accordance with the pattern 2a.

[0004] However, this printing method cannot perform fine processing. Particularly in recent years, for example, the number of pins in semiconductor devices has been rapidly increasing, and along with this, there has been an even stronger demand for finer pitches for wiring leads on circuit boards.This printing method can meet these demands reliably and efficiently. We cannot respond adequately. Therefore, as a method for forming circuit patterns that allows finer processing,
There is a photo-etching method.

In this photo-etching method, as shown in FIG. 4, a metal layer 4 that will become wiring is formed on the entire surface of a ceramic substrate 1 by laminating metal foil with an adhesive, sputtering, or printing a metal paste over the entire surface. is formed, and then a photosensitive resin 5 is applied on this metal layer 4, and
This photosensitive resin 5 is exposed and developed using a photomask 6 on which the same pattern 6a as the circuit pattern is formed in advance, and then the metal layer 4 is etched using the exposed and developed photosensitive resin 5. By this, a circuit pattern is formed. According to this photoetching method, finer processing becomes possible.

However, in this photo-etching method, gold is often used in the production of ceramic circuit boards, for example, but it is difficult to find an etching solution (etchant) that is compatible with this gold, and furthermore, there is a shortage of etchants that are compatible with this gold and resists. Combination with photosensitive resin 5 is extremely difficult. Therefore, it cannot be said that the above-mentioned printing method and photo-etching method are necessarily capable of sufficiently responding to the microfabrication of circuit boards, which has been increasingly demanded in recent years.

On the other hand, in recent years, ultraviolet rays (Ultra Vio
Research and development is underway on a circuit board formation method in which a circuit pattern is formed on a ceramic substrate using a material that becomes sticky when irradiated with UV light (hereinafter referred to as the phototacky method). This phototacky method has extremely good resolution. Therefore, it is conceivable to apply this photo-tacky method to the production of circuit boards.As an example of applying the photo-tacky method to the production of circuit boards, for example, There is a method for manufacturing a ceramic circuit board using a -(2'-nitrophenyl)-1,4-dihydropyridine compound.

As shown in FIG. 2, in this manufacturing method, a phototacky material is first coated on a ceramic substrate 1 to form a phototachy layer 7, and a photomask 6 having a pattern 6a identical to the circuit pattern is formed. Exposure is performed using UV light 9. Since this phototacky material becomes sticky when irradiated with UV light 9, adhesive portions 7a are formed on the ceramic substrate 1 in the areas irradiated with UV light 9.
A latent image of the non-adhesive portion 7b is formed in the portion irradiated with the UV light 9. Next, development is performed by toner-ringing these latent images using metal powder (toner) 8 such as gold powder. In this case, the circuit pattern is developed because the toner 8 adheres only to the adhesive portion 7a and does not adhere to the non-adhesive portion 7b.

In this state, the ceramic substrate 1, phototachy layer 7, and toner 8 are fired at, for example, 250° C. or higher. By this baking at 250° C. or higher, the toner 8 is dissolved, and the non-adhesive portion 7b of the phototacky layer 7 that is not irradiated with the UV light 9 is sublimated, leaving only the adhesive portion 7a below the melted toner 8. In this way, the ceramic substrate 1
A metal circuit pattern 10 is formed on the ceramic substrate 1 in tight contact with the ceramic substrate 1 .

0010

[Problems to be Solved by the Invention] However, when forming a circuit pattern using the above-mentioned phototacky method, the circuit pattern tends to be porous and have a rough surface due to the above-mentioned manufacturing process, and the electrical conductivity is not as high as above. There is a problem in that the circuit pattern is significantly lower than that formed by the printing method and photoetching method.

The present invention was made in view of the above problems, and its purpose is to prevent the electrical conductivity from being significantly reduced due to porous or rough surface wiring patterns, and to maintain the circuit as it originally was. An object of the present invention is to provide a method for manufacturing a circuit board that can exhibit the following functions.

0012

[Means for Solving the Problems] In order to solve the above-mentioned problems, the present invention provides a method for manufacturing a circuit board in which a predetermined circuit pattern is formed on an insulating substrate through a firing step, in which a predetermined circuit pattern is formed on an insulating substrate through a firing step. , is characterized in that the circuit pattern is subjected to a calendering process.

[0013]

[Operation] In the method for manufacturing a circuit board of the present invention configured as described above, by performing a calendering process after forming a circuit pattern by a baking process, many holes existing in the circuit pattern are eliminated and the circuit pattern is formed. The roughness of the pattern surface is also smoothed out. Therefore, in the circuit pattern formed in this way, good electrical conductivity can be obtained.

[0014]

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIGS. 1(A) and 1(B) are diagrams illustrating a calendering process in an embodiment of the method for manufacturing a circuit board according to the present invention, and FIGS. 1(C), (D), (E), and (F) This explains that the holes in the circuit pattern disappear when the circuit pattern is formed according to this example, and (
C) and (D) are plan views corresponding to (A) and (B), respectively, and (E) and (F) are cross sections along the IE-IE line and IF-IF line in (C) and (D), respectively. It is a diagram.

In the method for manufacturing a circuit board according to this embodiment, the steps (1) to (7) shown in FIG. explain. In this example, as a phototacky material, 10 g of 2,6-dimethyl-4-(2'-nitrophenyl)-1,4-dihydropyridine-3,5-dicarboxylic acid diisopropyl ester was dissolved in 200 cm3 of methyl ethyl ketone. Use a solution. First, apply this solution on the ceramic substrate 1 until the film thickness is 1 after drying.
The phototachy layer 7 is formed by applying the photoacrylate to a thickness of .mu.m.

Next, using a photomask 6 on which the same pattern 6a as the circuit pattern is formed, the phototachy layer 7 on the ceramic substrate 1 is exposed to UV light 8 from a mercury vapor lamp (306 nm, 350 mJ/cm2). Linear exposure is performed on the image. By this exposure, a latent image of the adhesive portion 7a and the non-adhesive portion 7b is formed on the phototacky layer 7 in correspondence with the circuit pattern.

Next, toner 8 made of copper powder having an average particle size of 5 μm is applied to the exposed phototacky layer 7 using a cotton pad, and when the toner 8 is removed, only the toner 8 attached to the adhesive portion 7a is removed. remains, and the circuit pattern is developed. Next, in this state, the ceramic substrate 1, phototachy layer 7, and toner 8 are fired at, for example, 250° C. or higher. By this baking at 250° C. or higher, the toner 8 is dissolved, and the non-adhesive portion 7b of the phototacky layer 7 that is not irradiated with the UV light 9 is sublimated.
Only the adhesive portion 7a remains below the dissolved toner 8. In this way, the copper circuit pattern 10 is formed on the ceramic substrate 1 in tight contact with the ceramic substrate 1.

By the way, in this state, the circuit pattern 10 is porous as in the conventional case. Therefore, in this example, after the firing step of FIG. 2(7),
A calendering step is carried out as shown in B). That is, the ceramic substrate 1 having the porous circuit pattern 10 after the firing process is completed by the pair of calender rolls 11 and 12.
Make a calendar for

By performing such a calendering process, pressure is applied to the wiring portion 10a of the circuit pattern 10,
The wiring portion 10a is extended. As a result, many holes 10b and 10 exist in the wiring part 10a as shown in FIG.
b,... disappear, and the wiring part 10 as shown in FIG.
A becomes non-porous, and the rough surface 10c of the wiring portion 10a as shown in FIG. 10E becomes smooth as shown in FIG. As a result, the circuit pattern 10 has the electrical conductivity required for the circuit board to perform its original function.

Note that the present invention is not limited to the above-described embodiments, and various design changes are possible. For example, it goes without saying that materials other than the above-mentioned materials can be used as the phototacky material and the metal toner material. In addition, this type of calendar is also used for circuit boards manufactured by a manufacturing method other than the phototacky method, and when the wiring part is porous or the surface of the wiring part is uneven. By going through the process,
Similarly, it is possible to form a circuit board that is non-porous and has a smooth surface at the wiring portion.

[0021]

As is clear from the above description, according to the method of manufacturing a circuit board according to the present invention, a circuit pattern having a predetermined electrical conductivity can be obtained. Therefore, the original function of the circuit board can be accurately and fully performed.

[Brief explanation of drawings]

[Fig. 1] (A) and (B) illustrate a calendering process in an embodiment of the method for manufacturing a circuit board according to the present invention;
) is a diagram showing the state before the circuit board is passed through the calender roll, (B) is a diagram showing the state after the circuit board is passed through the calender roll, (C), (D), (E), (F) (C) explains that the holes in the circuit pattern disappear when the circuit pattern is formed according to this example.
and (D) are plan views corresponding to (A) and (B), respectively, and (E) and (F) are respectively (C) and (
FIG. 4 is a sectional view taken along the IE-IE line and the IF-IF line in D).

FIG. 2 is a diagram illustrating the manufacturing process of a ceramic circuit board by the phototacky method.

FIG. 3 is a diagram illustrating a manufacturing process of a ceramic circuit board using a printing method.

FIG. 4 is a diagram illustrating a process of manufacturing a ceramic circuit board using a photo-etching method.

[Explanation of symbols]

Claims (3)

[Claims] 1. A method for manufacturing a circuit board in which a predetermined circuit pattern is formed on an insulating substrate through a baking process, characterized in that, after the baking process, a calender process is performed on the circuit pattern. Substrate manufacturing method. 2. The method of manufacturing a circuit board according to claim 1, wherein the insulating substrate is a ceramic substrate. 3. Ultraviolet (U) radiation is applied onto the ceramic substrate.
3. The method of manufacturing a circuit board according to claim 2, further comprising: V) coating a material that becomes sticky upon irradiation with light, and forming the circuit pattern from the coated material.