JPH04293291A - Semicustom hybrid integrated circuit and manufacture thereof - Google Patents

Semicustom hybrid integrated circuit and manufacture thereof

Info

Publication number
JPH04293291A
JPH04293291A JP5885291A JP5885291A JPH04293291A JP H04293291 A JPH04293291 A JP H04293291A JP 5885291 A JP5885291 A JP 5885291A JP 5885291 A JP5885291 A JP 5885291A JP H04293291 A JPH04293291 A JP H04293291A
Authority
JP
Japan
Prior art keywords
user
board
circuit
integrated circuit
hybrid integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5885291A
Other languages
Japanese (ja)
Inventor
Sakae Koyada
栄 古屋田
Akikazu Toyoda
豊田　明和
Tsunetaro Nose
能勢　恒太郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Materials Corp
Original Assignee
Mitsubishi Materials Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Materials Corp filed Critical Mitsubishi Materials Corp
Priority to JP5885291A priority Critical patent/JPH04293291A/en
Publication of JPH04293291A publication Critical patent/JPH04293291A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0286—Programmable, customizable or modifiable circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters

Abstract

PURPOSE:To provide a semicustom hybrid integrated circuit and a manufacturing method therefor in which its design can be altered flexibly to cope with users' type and circuit changes, etc. CONSTITUTION:A common section (a fixed section) and a user section (a variable section) of a circuit are formed on a mother board 1 and a different user board 2 from the board 1, the substrate 2 is mounted on the substrate 1, and wired therebetween as prescribed.

Description

【発明の詳細な説明】[Detailed description of the invention]

【０００１】0001

【産業上の利用分野】本発明は、セミカスタム集積回路
及びその製造方法に関し、さらに詳しくは、工程のある
部分まではユーザによらず、共通化して製造され、ある
工程以降はユーザごとに専用化して製造される集積回路
に関するものである。[Industrial Application Field] The present invention relates to a semi-custom integrated circuit and a method for manufacturing the same, and more specifically, up to a certain part of the process is manufactured in common, regardless of the user, and after a certain process, it is dedicated to each user. The invention relates to integrated circuits that are manufactured by

【０００２】0002

【従来の技術】セミカスタム集積回路は特定のユーザご
とに専用化されて設計、製造されるカスタム集積回路と
は異なり、共通部分の他に一般に配線工程以降をユーザ
により可変とされている。すなわち、セミカスタム混成
集積回路は、共通部（以下固定部分という）と、ユーザ
部（以下可変部分という）とからなり、共に混成集積回
路のマザー基板に取付けられるが、従来技術においては
、この可変部分は基板抵抗とチップ抵抗とからなる混成
ネットワーク抵抗部としてマザー基板に直接取付けられ
ていた。2. Description of the Related Art Semi-custom integrated circuits differ from custom integrated circuits which are designed and manufactured exclusively for each specific user, and in addition to common parts, the wiring process and subsequent steps are generally variable by the user. In other words, a semi-custom hybrid integrated circuit consists of a common part (hereinafter referred to as a fixed part) and a user part (hereinafter referred to as a variable part), both of which are attached to the motherboard of the hybrid integrated circuit. The part was directly attached to the motherboard as a hybrid network resistance section consisting of a substrate resistor and a chip resistor.

【０００３】0003

【発明が解決しようとする課題】従来技術のセミカスタ
ム混成集積回路においては、可変部分は上述のように混
成集積回路のマザー基板上に直接取付けられているため
に次のような問題があった。 ■品種及び回路変更の際、毎回マザー基板上のレイアウ
トパターンや抵抗値の変更を余儀なくされる。 ■基板抵抗のトリミングに失敗すると補修、交換ができ
ないため、集積回路全体が不良となり使用できなくなっ
た。 ■工程が複雑であり、一つの型で多種の製品を作製する
ことが難しいため、標準化しにくく、またセミカスタム
化が難しかった。 本発明は、上述の従来技術の問題点を解決するセミカス
タム混成集積回路及びその製造方法を提供することを課
題とするものである。[Problems to be Solved by the Invention] In the semi-custom hybrid integrated circuit of the prior art, the variable parts are directly attached to the motherboard of the hybrid integrated circuit as described above, so there are the following problems. . ■When changing product types and circuits, the layout pattern and resistance values on the motherboard must be changed each time. ■If trimming of the substrate resistor fails, it cannot be repaired or replaced, and the entire integrated circuit becomes defective and becomes unusable. ■The process is complex and it is difficult to manufacture many different products with one mold, making it difficult to standardize and semi-customize. SUMMARY OF THE INVENTION An object of the present invention is to provide a semi-custom hybrid integrated circuit and a method for manufacturing the same that solves the problems of the prior art described above.

【０００４】0004

【課題を解決するための手段】本発明は上述の問題点を
解決するものであり、回路発明は、セミカスタム混成集
積回路に適用され、■マザー基板上に形成された共通部
用固定回路と、■マザー基板とは別異のユーザ用基板上
に形成されたユーザ用回路とからなり、マザー基板上に
ユーザ用基板を装着して固定回路と、ユーザ用回路を接
続してなることを特徴とするセミカスタム混成集積回路
である。[Means for Solving the Problems] The present invention solves the above-mentioned problems, and the circuit invention is applied to a semi-custom hybrid integrated circuit. , ■It consists of a user circuit formed on a user board that is different from the motherboard, and is characterized by connecting the fixed circuit and the user circuit by mounting the user board on the motherboard. This is a semi-custom hybrid integrated circuit.

【０００５】また、方法発明は、セミカスタム混成集積
回路の製造方法に適用され、共通部用固定回路とユーザ
用回路を分割して、それぞれをマザー基板上とマザー基
板とは別異のユーザ用基板上に形成しておき、ユーザ用
基板をマザー基板上に装着した後、ユーザ用回路と共通
部用固定回路を接続することを特徴とするセミカスタム
混成集積回路の製造方法である。The method invention is also applied to a method of manufacturing a semi-custom hybrid integrated circuit, in which fixed circuits for common parts and circuits for users are divided, and they are placed on a motherboard and on a separate circuit for users, respectively. This method of manufacturing a semi-custom hybrid integrated circuit is characterized in that the circuit is formed on a substrate, the user circuit is mounted on the motherboard, and then the user circuit and the fixed circuit for the common part are connected.

【０００６】[0006]

【作用】混成集積回路用マザー基板とユーザ用基板がそ
れぞれ独立しているため並行して製造できる。またユー
ザ用基板のトリミングが失敗したときは、ユーザ用基板
のみを取替えればよく集積回路全体（マザー基板）が不
良品となるようなことはない。[Operation] Since the mother board for the hybrid integrated circuit and the user board are independent from each other, they can be manufactured in parallel. Furthermore, if trimming of the user board fails, it is sufficient to replace only the user board, and the entire integrated circuit (mother board) will not be defective.

【０００７】設計時、品種により変更する可変部分はユ
ーザ用基板上に形成できるので、この部分を変更するこ
とにより多数の品種を容易に形成できる。[0007] At the time of design, a variable part that is changed depending on the product type can be formed on the user board, so by changing this part, a large number of product types can be easily formed.

【０００８】[0008]

【実施例】本発明を図面により説明する。図１は本発明
の一実施例の斜視説明図、図２は本発明のユーザ基板の
製造工程の斜視説明図を示している。本発明においては
、品種により、回路を可変部分（ユーザ部分）と固定部
分（共通部）に分割しておき、可変部分をユーザ基板２
上に、固定部分をマザー基板１上にそれぞれ別個に形成
しておき、マザー基板１上にユーザ基板２を装着してか
ら、固定部分と可変部分の配線を行ないセミカスタム集
積回路を形成するものである。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be explained with reference to the drawings. FIG. 1 is a perspective explanatory view of an embodiment of the present invention, and FIG. 2 is a perspective explanatory view of the manufacturing process of a user board of the present invention. In the present invention, the circuit is divided into a variable part (user part) and a fixed part (common part) depending on the product type, and the variable part is placed on the user board 2.
Above, the fixed parts are formed separately on the motherboard 1, the user board 2 is mounted on the motherboard 1, and then the fixed parts and variable parts are wired to form a semi-custom integrated circuit. It is.

【０００９】図２に順次示すように、アルミナからなる
ユーザ基板２上に、配線を形成した後基板抵抗３を形成
し、さらにチップ抵抗４を装着する。次いでトリミング
プローブ５が各抵抗端子に接続され、ユーザ基板２上に
ユーザ専用の混成ネットワーク抵抗部が形成される。図
１に示すように、固定部分の基板抵抗３をはじめ各部品
を装着したマザー基板１上に、混成ネットワーク抵抗部
を形成したユーザ基板２を装着し、固定部分と可変部分
間に所定の配線を接続する。なお、基板抵抗３及びチッ
プ抵抗４は厚膜・薄膜のいずれでもよい。As shown in FIG. 2, after wiring is formed on a user substrate 2 made of alumina, a substrate resistor 3 is formed, and a chip resistor 4 is further mounted. Next, the trimming probe 5 is connected to each resistance terminal, and a hybrid network resistance section dedicated to the user is formed on the user board 2. As shown in FIG. 1, a user board 2 on which a hybrid network resistance section is formed is mounted on a motherboard 1 on which various components including a board resistor 3 on a fixed section are mounted, and predetermined wiring is connected between the fixed section and the variable section. Connect. Note that the substrate resistor 3 and the chip resistor 4 may be either thick films or thin films.

【００１０】また、ユーザ基板２をマザー基板１上に装
着する際、ユーザ基板２の下側にマザー基板１の配線パ
ターンがあってもよいことは勿論である。本発明の混成
集積回路の製造工程の一つについてそのフローを図４に
示した。本発明方法は、基本的には、一般的な厚膜技術
を応用したものであり、さらに詳しく説明する。Furthermore, when the user board 2 is mounted on the mother board 1, it goes without saying that the wiring pattern of the mother board 1 may be present on the underside of the user board 2. FIG. 4 shows the flow of one of the manufacturing steps of the hybrid integrated circuit of the present invention. The method of the present invention is basically an application of general thick film technology, and will be explained in more detail.

【００１１】（ａ）設計時、品種により変更する可変部
分を混成ネットワーク抵抗部としてユーザ基板に、また
固定部分をマザー基板にそれぞれ分割して形成する。 ユーザ基板 ■アルミナ基板上に導体及び抵抗ペーストを用いてスク
リーン印刷法により所定のパターンを形成した。導体及
び抵抗ペーストは市販厚膜用各ペーストを用いた。（例
としてＤＰ５７１５他） ■印刷されたパターンを乾燥する。（印刷後、常温で１
０分のレベリングを行う。乾燥は、１５０℃、１０分保
持の２０分温度プロファイルである。）■乾燥されたパ
ターンを焼成して、基板上に焼付けを行う。（焼成は、
８５０℃、１０分保持の６０分温度プロファイルである
。） ■チップ抵抗を接着剤を用いて実装する。チップ抵抗に
は１００５サイズのものを使用した。（例としてＫＭＤ
、ＲＭＣ−１／１６Ｓ他） ■基板上の抵抗素子の値が所定の範囲内に入るように抵
抗素子をトリミングする。 マザー基板 上述のユーザ基板の工程■、■、■と同様の工程に次い
で、 ■抵抗素子のトリミングを行う。 （ｂ）マザー基板上に、ＩＣ、コンデンサ等と一緒に、
ユーザ基板を接着剤にて実装する。ワイヤーボンディン
グには２５μｍのＡｕワイヤを使用した。(a) At the time of design, a variable part that changes depending on the type of product is divided into a user board as a hybrid network resistance part, and a fixed part is divided into a mother board. User board ① A predetermined pattern was formed on an alumina board by screen printing using conductor and resistor paste. Commercially available pastes for thick films were used as the conductor and resistance pastes. (DP5715 etc. as an example) ■Dry the printed pattern. (1 at room temperature after printing)
Perform leveling for 0 minutes. Drying is a 20 minute temperature profile at 150° C. and held for 10 minutes. ) ■ Fire the dried pattern and print it on the substrate. (The firing is
This is a 60-minute temperature profile of 850° C. held for 10 minutes. ) ■Mount the chip resistor using adhesive. A 1005 size chip resistor was used. (For example, KMD
, RMC-1/16S, etc.) (2) Trim the resistance element on the substrate so that the value of the resistance element falls within a predetermined range. Mother board Following the steps ①, ②, and ③ for the user board described above, ② trimming of the resistive element is performed. (b) On the motherboard together with ICs, capacitors, etc.
Mount the user board using adhesive. A 25 μm Au wire was used for wire bonding.

【００１２】（ｃ）デュアル・インライン１４ピンの金
属パッケージにて気密封止する。ここでは以上のように
して製造した。上述のように、回路の可変部分が、ユー
ザ基板２上に、基板抵抗３とチップ抵抗４からなるユー
ザ専用の混成ネットワーク抵抗部として構成されている
ために、抵抗ペーストのシート抵抗、チップ抵抗の種類
、トリミング目標値、レイアウトパターン等の変更があ
っても、従来のようにマザー基板１全体の設計変更をす
ることなく、ユーザ基板２のみの変更で柔軟に対応する
ことができる。(c) Hermetically sealed with a dual in-line 14-pin metal package. Here, it was manufactured as described above. As mentioned above, since the variable part of the circuit is configured on the user board 2 as a user-specific hybrid network resistance section consisting of the board resistor 3 and the chip resistor 4, the sheet resistance of the resistor paste and the chip resistor are Even if there is a change in type, trimming target value, layout pattern, etc., it can be flexibly handled by changing only the user board 2, without changing the design of the entire mother board 1 as in the conventional case.

【００１３】[0013]

【発明の効果】本発明は生産性の向上に次のような優れ
た効果を奏する。 ■サイズ、品種等を標準化し易い。 ■セミカスタム化が容易である。 ■１つのユーザ基板で多数の品種を設定できる。 ■製造工程が並行して進められる。 ■トリミング不良により歩留りの低減が防止できる。。[Effects of the Invention] The present invention has the following excellent effects in improving productivity. ■Easy to standardize size, variety, etc. ■Semi-customization is easy. ■Many types can be set on one user board. ■Manufacturing processes proceed in parallel. ■Prevents yield loss due to poor trimming. .

【図面の簡単な説明】[Brief explanation of the drawing]

【図１】本発明の一実施例の斜視説明図である。FIG. 1 is a perspective explanatory view of an embodiment of the present invention.

【図２】ユーザ基板の製造工程の斜視説明図である。FIG. 2 is a perspective explanatory diagram of a manufacturing process of a user board.

【図３】ユーザ基板上に形成されたネットワーク抵抗部
のパターン例である。FIG. 3 is an example of a pattern of a network resistance section formed on a user board.

【図４】混成集積回路の製造工程の一つについてのフロ
ーを示す。FIG. 4 shows a flow for one of the manufacturing steps of a hybrid integrated circuit.

【符号の説明】[Explanation of symbols]

１　　マザー基板 ２　　ユーザ基板 ３　　基板抵抗 ４　　チップ抵抗 ５　　トリミングプローブ 1 Mother board 2 User board 3　Substrate resistance 4 Chip resistance 5 Trimming probe

Claims (2)

【特許請求の範囲】[Claims] 【請求項１】　　セミカスタム混成集積回路において、
マザー基板上に形成された共通部用固定回路と、該マザ
ー基板とは別異のユーザ用基板上に形成されたユーザ用
回路とからなり、該マザー基板上に該ユーザ用基板を装
着して該固定回路と、該ユーザ用回路を接続してなるこ
とを特徴とするセミカスタム混成集積回路。[Claim 1] In a semi-custom hybrid integrated circuit,
It consists of a fixed circuit for common parts formed on a mother board and a user circuit formed on a user board different from the mother board, and the user board is mounted on the mother board. A semi-custom hybrid integrated circuit characterized by connecting the fixed circuit and the user circuit. 【請求項２】　　セミカスタム混成集積回路の製造方法
において、共通部用固定回路とユーザ用回路を分割して
、それぞれをマザー基板上と該マザー基板とは別異のユ
ーザ用基板上に形成しておき、該ユーザ用基板を該マザ
ー基板上に装着した後、該ユーザ用回路と該共通部用固
定回路を接続することを特徴とするセミカスタム混成集
積回路の製造方法。[Claim 2] In a method for manufacturing a semi-custom hybrid integrated circuit, a fixed circuit for a common part and a user circuit are divided, and each is formed on a mother board and a user board different from the mother board. 1. A method for manufacturing a semi-custom hybrid integrated circuit, comprising: first mounting the user board on the mother board; and then connecting the user circuit and the common part fixed circuit.
JP5885291A 1991-03-22 1991-03-22 Semicustom hybrid integrated circuit and manufacture thereof Pending JPH04293291A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5885291A JPH04293291A (en) 1991-03-22 1991-03-22 Semicustom hybrid integrated circuit and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5885291A JPH04293291A (en) 1991-03-22 1991-03-22 Semicustom hybrid integrated circuit and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH04293291A true JPH04293291A (en) 1992-10-16

Family

ID=13096217

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5885291A Pending JPH04293291A (en) 1991-03-22 1991-03-22 Semicustom hybrid integrated circuit and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH04293291A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH067268U (en) * 1992-05-13 1994-01-28 株式会社三協精機製作所 Circuit board
JP2004123902A (en) * 2002-10-02 2004-04-22 Dainippon Toryo Co Ltd Coating composition for inorganic substrate

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS554514B2 (en) * 1978-10-16 1980-01-30
JPS5687395A (en) * 1979-12-18 1981-07-15 Fujitsu Ltd Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS554514B2 (en) * 1978-10-16 1980-01-30
JPS5687395A (en) * 1979-12-18 1981-07-15 Fujitsu Ltd Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH067268U (en) * 1992-05-13 1994-01-28 株式会社三協精機製作所 Circuit board
JP2004123902A (en) * 2002-10-02 2004-04-22 Dainippon Toryo Co Ltd Coating composition for inorganic substrate

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