JPH031596A - Thick film multilayer circuit board - Google Patents

Thick film multilayer circuit board

Info

Publication number
JPH031596A
JPH031596A JP13498089A JP13498089A JPH031596A JP H031596 A JPH031596 A JP H031596A JP 13498089 A JP13498089 A JP 13498089A JP 13498089 A JP13498089 A JP 13498089A JP H031596 A JPH031596 A JP H031596A
Authority
JP
Japan
Prior art keywords
check pattern
resistance value
insulation resistance
outer layer
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13498089A
Other languages
Japanese (ja)
Inventor
Katsuhiro Nakano
中野 克弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP13498089A priority Critical patent/JPH031596A/en
Publication of JPH031596A publication Critical patent/JPH031596A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To check circuit characteristic of a product without wastefully using the product by forming a circuit check pattern capable of measuring an insulation resistance value between inner layer conductors, an insulation resistance value between outer layer conductors, an insulation resistance value between the inner and outer layer conductors, and the resistance value of a resistor. CONSTITUTION:A circuit check pattern formed of an inner layer conductor check pattern 1, an insulating layer check pattern 2, an outer layer conductor check pattern 3, a resistor check pattern 4, and an overcoating material check pattern 5 formed simultaneously with the same material as that used to form a circuit and made of a pattern capable of measuring an insulation resistance value between inner layer conductors, an insulation resistance value between outer layer conductors, an insulation resistance value between the inner and outer layer conductors, and a resistance value of a resistor is formed on a peripheral margin 6 of an alumina board. Since the forming position of the check pattern is on the margin 6 of the board, it does not affect any influence of forming a circuit and a product, but it can be executed only alteration of the pattern of a printing screen.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は電子部品実装用として用いることができる厚膜
多層回路基板である。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is a thick film multilayer circuit board that can be used for mounting electronic components.

従来の技術 一般に厚膜多層回路基板では、完成された製品の抜き取
り検査によって、その回路特性のチエツクが行なわれて
いる。
2. Description of the Related Art In general, circuit characteristics of thick film multilayer circuit boards are checked by sampling inspection of completed products.

発明が解決しようとする課題 ところが、完成品の検査であるから検査に用いたものは
全て無駄となり、大きな損失が発生していた。
However, since the problem that the invention seeks to solve is the inspection of finished products, everything used for inspection is wasted, resulting in a large loss.

本発明は上記従来の課題を解決するものであり、製品を
無駄にすることなくその回路特性をチエツクできるもの
である。
The present invention solves the above-mentioned conventional problems, and makes it possible to check the circuit characteristics of a product without wasting it.

課題を解決するための手段 本発明の厚膜多層回路基板は、電子部品実装用として用
いることができるものであって、アルミナ基板の周辺余
白部に、回路形成に使用した材料と同一材料で同時形成
した内層導体・絶縁層・抵抗体・外層導体・オーバーコ
ート材各々のチェックパターンから成り、且つ内層導体
間の絶縁抵抗値、外層導体間の絶縁抵抗値、内層導体と
外層導体間の絶縁抵抗値、抵抗体の抵抗値を測定可能な
パターンから成る回路チェックパターンを持つものであ
る。
Means for Solving the Problems The thick film multilayer circuit board of the present invention can be used for mounting electronic components, and the peripheral margin of the alumina board is made of the same material used for circuit formation. It consists of check patterns for each of the formed inner layer conductor, insulating layer, resistor, outer layer conductor, and overcoat material, and the insulation resistance value between the inner layer conductor, the insulation resistance value between the outer layer conductor, and the insulation resistance between the inner layer conductor and the outer layer conductor. It has a circuit check pattern consisting of a pattern that can measure the resistance value of a resistor.

作用 本発明の厚膜多層回路基板は、アルミナ基板の周辺余白
部に、回路形成に使用した材料と同一材料で同時形成し
た内層導体・絶縁層・抵抗体・外層導体・オーバーコー
ト材各々のチェックパターンから成り、且つ内層導体間
の絶縁抵抗値、外層導体間の絶縁抵抗値、内層導体と外
層導体間の絶縁抵抗値、抵抗体の抵抗値を測定可能なパ
ターンから成る回路チェックパターンを持つものである
Function: The thick film multilayer circuit board of the present invention is designed to check the inner layer conductor, insulating layer, resistor, outer layer conductor, and overcoat material that are simultaneously formed with the same material used for circuit formation on the peripheral margin of the alumina substrate. A circuit check pattern consisting of a pattern that can measure the insulation resistance value between the inner layer conductors, the insulation resistance value between the outer layer conductors, the insulation resistance value between the inner layer conductor and the outer layer conductor, and the resistance value of the resistor. It is.

またここで回路チェックパターンの形成箇所は、アルミ
ナ基板の周辺余白部である為、何ら回路形成及びその製
品に影響はな(、印刷用スクリーンのパターン変更のみ
で実施することができる。
In addition, since the circuit check pattern is formed in the peripheral margin of the alumina substrate, it does not affect the circuit formation or the product in any way (it can be implemented by simply changing the pattern of the printing screen).

実施例 以下本発明の一実施例の厚膜多層回路基板を図面を参照
して説明する。
EXAMPLE Hereinafter, a thick film multilayer circuit board according to an example of the present invention will be described with reference to the drawings.

第1図に示す様に、アルミナ基板の周辺余白部6に、回
路形成に使用した材料と同一材料で同時形成した内層導
体チェックパターン1、絶縁層チエ4ツクパターン2、
外層導体チェックパターン3、抵抗体チェックパターン
4、オーバーコート材チェックパターン5から成り、且
つ内層導体間の絶縁抵抗値、外層導体間の絶縁抵抗値、
内層導体と外層導体間の絶縁抵抗値、抵抗体の抵抗値を
測定可能なパターンから成る回路チェックパターンを形
成する。
As shown in FIG. 1, an inner layer conductor check pattern 1, an insulating layer check pattern 2, and an insulating layer check pattern 2, which are simultaneously formed with the same material as that used for circuit formation, are formed on the peripheral margin 6 of the alumina substrate, as shown in FIG.
It consists of an outer layer conductor check pattern 3, a resistor check pattern 4, an overcoat material check pattern 5, and an insulation resistance value between the inner layer conductors, an insulation resistance value between the outer layer conductors,
A circuit check pattern consisting of a pattern capable of measuring the insulation resistance value between the inner layer conductor and the outer layer conductor and the resistance value of the resistor is formed.

また、当実施例では、回路チェックパターンの形成箇所
は、アルミナ基板の周辺余白部6である為、何ら回路形
成及びその製品に影響はなく、印刷用スクリーンのパタ
ーン変更のみで実施することができて有利である。
Furthermore, in this example, since the circuit check pattern is formed in the peripheral margin 6 of the alumina substrate, there is no effect on the circuit formation or its product, and it can be implemented by simply changing the pattern of the printing screen. It is advantageous.

発明の効果 以上の様に本発明の厚膜多層回路基板は、アルミナ基板
の周辺余白部に、回路形成に使用した材料と同一材料で
同時形成した内層導体チェックパターン、絶縁層チェッ
クパターン、外層導体チェックパターン、抵抗体チェッ
クパターン、オーバーコート材チェックパターンから成
り、且つ内層導体間の絶縁抵抗値、外層導体間の絶縁抵
抗値、内層導体と外層導体間の絶縁抵抗値、抵抗体の抵
抗値を測定可能なパターンから成る回路チェックパター
ンを形成したものであり、この様にすれば、製品を無駄
にすることな(その回路特性をチエツクでき、費用削減
に大いに役立つものである。特に、本発明によれば、ア
ルミナ基板の周辺余白部に回路形成に使用した材料と同
一材料で同時形成している為に、何ら回路形成及びその
製品に影響はなく、印刷用スクリーンのパターン変更の
みで実施することができて実用上非常に有利なものであ
る。
Effects of the Invention As described above, the thick film multilayer circuit board of the present invention has an inner layer conductor check pattern, an insulating layer check pattern, and an outer layer conductor formed simultaneously on the peripheral margin of the alumina substrate using the same material as that used for forming the circuit. It consists of a check pattern, a resistor check pattern, and an overcoat material check pattern, and also measures the insulation resistance between the inner layer conductors, the insulation resistance between the outer layer conductors, the insulation resistance between the inner and outer conductors, and the resistance of the resistor. A circuit check pattern consisting of a measurable pattern is formed, and in this way, the circuit characteristics of the product can be checked without wasting the product, which is very useful for cost reduction.In particular, the present invention According to , since the peripheral margin of the alumina substrate is simultaneously formed with the same material used for circuit formation, there is no effect on circuit formation or the product, and the only change is to change the pattern of the printing screen. This is very advantageous in practice.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例における厚膜多層回路基板の
平面図、第2図aはそのA−8間の断面図、同図すはC
−D間の断面図である。 ■・・・・・・内層導体チェックパターン、2・・・・
・・絶縁層チェックパターン、3・・・・・・外層導体
チェックパターン、4・・・・・・抵抗体チェックパタ
ーン、5・・・・・・オーバーコート材チェックパター
ン、6・・・・・・アルミナ基板の周辺余白部。 代理人の氏名 弁理士 粟野重孝 はが1名弔 図 吊 図 C(1)
FIG. 1 is a plan view of a thick film multilayer circuit board according to an embodiment of the present invention, FIG. 2a is a sectional view taken along line A-8, and FIG.
-D is a sectional view. ■・・・Inner layer conductor check pattern, 2...
... Insulating layer check pattern, 3 ... Outer layer conductor check pattern, 4 ... Resistor check pattern, 5 ... Overcoat material check pattern, 6 ... - Margin area around the alumina substrate. Name of agent: Patent attorney Shigetaka Awano (1 person) Funeral diagram hanging diagram C (1)

Claims (1)

【特許請求の範囲】[Claims]  アルミナ基板上に形成された厚膜多層回路を形成する
ものであって、該アルミナ基板の周辺余白部に、内層導
体と同時形成された同一材料の内層導体チェックパター
ンと、絶縁層と同時形成された同一材料の絶縁層チェッ
クパターンと、抵抗体と同時形成された同一材料の抵抗
体チェックパターンと、外層導体と同時形成された同一
材料の外層導体チェックパターンと、オーバーコート材
と同時形成された同一材料のオーバーコート材チェック
パターンから成り、且つ内層導体間の絶縁抵抗値、外層
導体間の絶縁抵抗値、内層導体と外層導体間の絶縁抵抗
値、抵抗体の抵抗値を測定可能なパターンから成る回路
チェックパターンを持つことを特徴とする厚膜多層回路
基板。
A thick film multilayer circuit is formed on an alumina substrate, and an inner layer conductor check pattern of the same material is formed at the same time as the inner layer conductor, and an insulating layer is formed at the same time on the peripheral margin of the alumina substrate. An insulating layer check pattern made of the same material as the resistor, a resistor check pattern made of the same material formed at the same time as the resistor, an outer layer conductor check pattern made of the same material formed simultaneously with the outer layer conductor, and an overcoat material formed simultaneously. A pattern consisting of an overcoat material check pattern made of the same material and capable of measuring the insulation resistance value between the inner layer conductors, the insulation resistance value between the outer layer conductors, the insulation resistance value between the inner layer conductor and the outer layer conductor, and the resistance value of the resistor. A thick film multilayer circuit board characterized by having a circuit check pattern consisting of the following.
JP13498089A 1989-05-29 1989-05-29 Thick film multilayer circuit board Pending JPH031596A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13498089A JPH031596A (en) 1989-05-29 1989-05-29 Thick film multilayer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13498089A JPH031596A (en) 1989-05-29 1989-05-29 Thick film multilayer circuit board

Publications (1)

Publication Number Publication Date
JPH031596A true JPH031596A (en) 1991-01-08

Family

ID=15141106

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13498089A Pending JPH031596A (en) 1989-05-29 1989-05-29 Thick film multilayer circuit board

Country Status (1)

Country Link
JP (1) JPH031596A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006216338A (en) * 2005-02-02 2006-08-17 Kitagawa Ind Co Ltd Electromagnetic wave shield tape and cable
JP2007157825A (en) * 2005-12-01 2007-06-21 Inoac Corp Electromagnetic shield tube and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006216338A (en) * 2005-02-02 2006-08-17 Kitagawa Ind Co Ltd Electromagnetic wave shield tape and cable
JP2007157825A (en) * 2005-12-01 2007-06-21 Inoac Corp Electromagnetic shield tube and manufacturing method thereof

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