JPH0134337Y2 - - Google Patents

Info

Publication number
JPH0134337Y2
JPH0134337Y2 JP18257882U JP18257882U JPH0134337Y2 JP H0134337 Y2 JPH0134337 Y2 JP H0134337Y2 JP 18257882 U JP18257882 U JP 18257882U JP 18257882 U JP18257882 U JP 18257882U JP H0134337 Y2 JPH0134337 Y2 JP H0134337Y2
Authority
JP
Japan
Prior art keywords
conductor
parallel
view
chip resistor
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP18257882U
Other languages
Japanese (ja)
Other versions
JPS5987132U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18257882U priority Critical patent/JPS5987132U/en
Publication of JPS5987132U publication Critical patent/JPS5987132U/en
Application granted granted Critical
Publication of JPH0134337Y2 publication Critical patent/JPH0134337Y2/ja
Granted legal-status Critical Current

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  • Parts Printed On Printed Circuit Boards (AREA)
  • Non-Adjustable Resistors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

【考案の詳細な説明】 本考案は無線機等のプリント基板における微小
容量の実装技術の改良に関するものである。
[Detailed Description of the Invention] The present invention relates to an improvement in a technique for mounting minute capacitance on a printed circuit board of a radio device or the like.

第1図、第2図は従来広く用いられているパタ
ーンコンデンサの平面図および断面図である。こ
の構成はプリント基板1と導体3と導体3′とか
ら成り、導体3と導体3′との間に間隔4を設け、
導体3と導体3′の相対する面積および間隔4を
適当に選ぶことにより微小容量を形成している。
この微小容量は導体3,3′の形成を印刷法ある
いは写真焼付法などで行えば精度を上げることが
可能であり、また磁器コンデンサ等を用いた場合
に比べバラツキを非常に小さく抑えることが可能
であるが、同一の基板を用いて容量を何種類かに
変えたい場合、プリント基板の種類を増やさなく
てはならず、また、容量を大きくするには導体
3,3′の対向面積を大きくとる必要があり、プ
リント基板内におけるパターンコンデンサの占有
面積が非常に大きくなると言う欠点があつた。
FIGS. 1 and 2 are a plan view and a sectional view of a conventionally widely used pattern capacitor. This configuration consists of a printed circuit board 1, a conductor 3, and a conductor 3', with a gap 4 provided between the conductor 3 and the conductor 3',
A minute capacitance is formed by appropriately selecting the opposing areas of the conductor 3 and the conductor 3' and the spacing 4.
It is possible to increase the accuracy of this minute capacitance by forming the conductors 3 and 3' using a printing method or photoprinting method, and it is also possible to suppress variations to a very small level compared to when using ceramic capacitors, etc. However, if you want to change the capacitance to several types using the same board, you will need to increase the number of types of printed circuit boards, and in order to increase the capacitance, you will need to increase the opposing area of conductors 3 and 3'. This has the disadvantage that the area occupied by the pattern capacitor within the printed circuit board becomes very large.

本考案はこれらの欠点を除去するために、プリ
ント基板上に立体的にコンデンサを形成し、この
容量を任意に可変できる様にしたものである。
In order to eliminate these drawbacks, the present invention forms a three-dimensional capacitor on a printed circuit board so that the capacitance can be varied as desired.

第3図、第4図は本考案実施例による平面図お
よび側面図、第5図はジヤンパ用極小抵抗値のチ
ツプ抵抗の断面図である。この構成はプリント基
板1の上に導体3を設け、これと並行して絶縁さ
れ、かつチツプ部品が取付けられる形状例えばコ
字状部を有する並行導体2を形成する。導体3は
並行導体2と重複する位置で片端開放あるいは貫
通させても良い。チツプ部品取付可能な並行導体
2の上にジヤンパ用極小抵抗値のチツプ抵抗5を
実装し、チツプ部品の両端を並行導体2にはんだ
付けする。このようにすれば導体3とチツプ低抗
5の抵抗体との間に容量が形成される。この容量
値は導体3とチツプ抵抗5との重ね合さる面積と
間隔で決まるので、チツプ抵抗5の数を増減する
ことで容量値を変えることができる。また、チツ
プ抵抗5の構造は第5図に示す如く、セラミツク
の基板部7の上に抵抗体部8を形成し、この両端
に電極10がメタライズされており、抵抗体部8
の上に抵抗体保護のためにガラスコート9を施こ
している。この図からも明確なように、並行導体
2に取付けるチツプ抵抗5の表裏を変えることに
より、抵抗体部8と並行導体2の間隔を変えるこ
とができるので、任意の容量値を選択できる。な
お、本考案の実施例においては導体3の両側に並
行導体2を設けているが、導体3の片側に並行導
体を設け、導体3に直交させてチツプ抵抗5を並
行導体にはんだ付けしても同様の効果が得られ
る。
3 and 4 are a plan view and a side view according to an embodiment of the present invention, and FIG. 5 is a sectional view of a chip resistor having an extremely low resistance value for jumper use. In this configuration, a conductor 3 is provided on a printed circuit board 1, and a parallel conductor 2 is formed in parallel therewith, which is insulated and has a shape such as a U-shape to which a chip component is attached. The conductor 3 may be open at one end or may be passed through at a position where it overlaps with the parallel conductor 2. A chip resistor 5 with a minimum resistance value for jumper is mounted on the parallel conductor 2 to which a chip component can be attached, and both ends of the chip component are soldered to the parallel conductor 2. In this way, a capacitance is formed between the conductor 3 and the resistor of the chip resistor 5. Since this capacitance value is determined by the overlapping area and spacing between the conductor 3 and the chip resistor 5, the capacitance value can be changed by increasing or decreasing the number of chip resistors 5. Furthermore, the structure of the chip resistor 5 is as shown in FIG.
A glass coat 9 is applied on top of the resistor to protect it. As is clear from this figure, by changing the front and back sides of the chip resistor 5 attached to the parallel conductor 2, the distance between the resistor portion 8 and the parallel conductor 2 can be changed, so that an arbitrary capacitance value can be selected. In the embodiment of the present invention, parallel conductors 2 are provided on both sides of the conductor 3, but a parallel conductor is provided on one side of the conductor 3, and a chip resistor 5 is soldered to the parallel conductor so as to be perpendicular to the conductor 3. A similar effect can be obtained.

以上説明した如く本考案によれば、同一のパタ
ーンを有する基板でもチツプ抵抗の数、表裏を選
択することで任意の容量値を得ることができ、プ
リント基板の種類を減らすことができる。また、
チツプ抵抗の実装は自動装着ができるので極めて
安価に微小容量のコンデンサを作ることができ
る。
As explained above, according to the present invention, an arbitrary capacitance value can be obtained by selecting the number of chip resistors and the front and back sides even on boards having the same pattern, and the number of types of printed circuit boards can be reduced. Also,
Since chip resistors can be mounted automatically, capacitors with minute capacitance can be made at extremely low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図は従来例によるパターンコンデ
ンサの平面図および側面図、第3図、第4図は本
考案の実施例によるパターンコンデンサの平面図
および側面図、第5図は本考案の実施例によるジ
ヤンパ用極小抵抗値のチツプ抵抗の断面図であ
る。 1…プリント基板、2…並行導体、3,3′…
導体、4…間隔、5…チツプ抵抗、7…基板部、
8…抵抗体部、9…ガラスコート、10…電極。
1 and 2 are a plan view and a side view of a conventional pattern capacitor, FIGS. 3 and 4 are a plan view and a side view of a pattern capacitor according to an embodiment of the present invention, and FIG. 5 is a plan view and a side view of a pattern capacitor according to an embodiment of the present invention. FIG. 3 is a cross-sectional view of a chip resistor with a minimum resistance value for a jumper according to an embodiment. 1...Printed circuit board, 2...Parallel conductor, 3, 3'...
Conductor, 4... Spacing, 5... Chip resistor, 7... Board part,
8...Resistor part, 9...Glass coat, 10...Electrode.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 直線あるいは曲線の導体を有するプリント基板
において、前記導体に並行し、かつ絶縁された並
行導体を設け、この並行導体に抵抗値の極小なチ
ツプ抵抗を装着し、このチツプ抵抗の数および表
裏を選択することにより、前記導体と並行導体と
の間に任意の微小容量を形成することを特徴とす
るパターンコンデンサ。
In a printed circuit board that has a straight or curved conductor, an insulated parallel conductor is provided parallel to the conductor, a chip resistor with minimal resistance is attached to the parallel conductor, and the number and front and back sides of the chip resistor are selected. A pattern capacitor characterized in that, by doing so, an arbitrary minute capacitance is formed between the conductor and the parallel conductor.
JP18257882U 1982-12-03 1982-12-03 pattern capacitor Granted JPS5987132U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18257882U JPS5987132U (en) 1982-12-03 1982-12-03 pattern capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18257882U JPS5987132U (en) 1982-12-03 1982-12-03 pattern capacitor

Publications (2)

Publication Number Publication Date
JPS5987132U JPS5987132U (en) 1984-06-13
JPH0134337Y2 true JPH0134337Y2 (en) 1989-10-19

Family

ID=30395361

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18257882U Granted JPS5987132U (en) 1982-12-03 1982-12-03 pattern capacitor

Country Status (1)

Country Link
JP (1) JPS5987132U (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09260182A (en) * 1996-03-19 1997-10-03 Murata Mfg Co Ltd Chip electronic part and mounting thereof

Also Published As

Publication number Publication date
JPS5987132U (en) 1984-06-13

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