JPH0411383Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to the structure of a distributed constant type delay line for obtaining a very short delay time, which is formed by forming conductor patterns on opposing main surfaces of a substrate.

[Prior art and its problems]

A zigzag-shaped conductor pattern and a grounding conductor pattern are formed on the opposing main surfaces of the board, and this type of delay line is used in computers and computers to obtain a short delay time of several hundred picoseconds to several nanoseconds. There is a large demand for delay circuits for electronic devices using . The conductor pattern is mainly formed using photoetching technology, but in order to accurately set a short delay time, it is necessary to improve its dimensional accuracy, especially the accuracy of the zigzag conductor pattern that determines the inductance and capacitance values. .

When the conductor density is almost the same on the same main surface, for example, when forming a grounding conductor pattern that spreads over the entire surface or when forming a zigzag-shaped conductor pattern over the entire surface, it is easy to improve accuracy. However, when varying the conductor density on the same main surface due to delay time requirements, for example when partially forming a zigzag conductor pattern, accuracy is difficult to achieve.
That is, the time required for immersion in the etching solution is longer in order to remove the conductor in areas where there is almost no conductor density, and the conductor pattern to be left is likely to be damaged.

〔the purpose〕

The purpose of this invention is to reduce the difference in local conductor density on the same main surface by forming a grounding conductor pattern around the zigzag conductor pattern, thereby improving the dimensional accuracy of the zigzag conductor pattern. To provide a delay line that can be easily improved and is less susceptible to external noise, thereby obtaining a dual-purpose effect.

[Technical means to solve problems]

The delay line of the present invention has a zigzag conductor pattern formed on the first main surface of the substrate, and a grounding conductor pattern opposite to the zigzag conductor pattern on the second main surface to obtain capacitance. The delay line is characterized in that another grounding conductor pattern is formed in a portion of the first main surface where the zigzag conductor pattern does not exist.

〔Example〕

Embodiments of the delay line of the present invention will be described below with reference to FIGS. 1 to 4. Fig. 1 is a plan view of the first main surface, Fig. 2 is a plan view of the second main surface, Fig. 3a and Fig. 3b are a plan view and side view of the external terminal, and Fig. 4 is a delay It is a side view of a line.

A zigzag-shaped conductor pattern 3 extending in the length direction is formed on the first main surface 2 of the substrate 1 made of aluminum oxide porcelain.
A conductive pattern 4 for grounding is formed on the entire surface of the portion where the conductive pattern 3 is not present, that is, both ends of the conductive pattern 3. 5 and 6 are terminals of the conductor pattern 3, and 7 and 8 are terminals of the conductor pattern 4. These terminals are provided near one side of the substrate 1 so as to be easily connected to the external terminal 9.

On the second main surface 10 on the back side of the first main surface 2, a grounding conductor pattern 11 is formed on almost the entire surface, facing the conductor pattern 3 and for obtaining capacitance. Terminals 12 and 13 of conductor pattern 11 are located at positions overlapping terminals 7 and 8, respectively, in plan. Further, the terminals 14 and 15 are empty terminals that are not connected to the conductor pattern 11, and are located at positions overlapping the terminals 6 and 5, respectively, in a plan view.

The external terminal 9 has a tip 16 split in half in the length direction, and as shown in FIG.
It is fixed by soldering to the terminals on the front and back while sandwiching it in place. The grounding conductor pattern 4 and the conductor pattern 11 are commonly connected via an external terminal 9. Further, both conductor patterns are formed from a copper film deposited on the substrate 1 using photoetching technology.

In this way, a delay line is constructed in which terminals 5 and 6 serve as input and output terminals. Note that the external terminals 9 can be connected to the substrate 1 on both sides depending on the shape of the conductor pattern. Further, in the embodiment, the conductor pattern 4 and the conductor pattern 11 are formed on one surface, but in order to reduce eddy current loss, the conductor may be removed in a slit shape or in a uniform pattern. In short, it is sufficient that the conductor density does not vary greatly on the same main surface. Furthermore, the substrate 1 can also be made of other ceramics or synthetic resins.

〔effect〕

As mentioned above, the delay line of the present invention has a grounding conductor pattern formed on the main surface on which the zigzag conductor pattern is formed, reducing local differences in conductor density during manufacturing. This is a structure that can easily improve the dimensional accuracy of the zigzag-shaped conductor pattern. Therefore, the delay time can be set accurately.

Furthermore, since there are conductor patterns for grounding on both main surfaces, the device is less susceptible to noise, making it particularly useful in environments where there is a lot of pulse noise.

[Brief explanation of the drawing]

1 and 2 are plan views showing the substrate in the embodiment of the delay line of the present invention, FIGS. 3a and 3b are plan views and side views of external terminals, and FIG. 4 is a side view of the delay line. It is a diagram. DESCRIPTION OF SYMBOLS 1... Board, 2... First main surface, 3... Zigzag conductor pattern, 4, 11... Grounding conductor pattern, 5, 6, 7, 8, 12, 13, 1
4, 15... terminal, 9... external terminal, 10... second main surface, 16... tip.

Claims (1)

[Scope of utility model registration request] A delay line formed by forming a zigzag conductor pattern on a first main surface of a substrate, and forming a grounding conductor pattern opposite to the zigzag conductor pattern on a second main surface to obtain capacitance. A delay line characterized in that another ground conductor pattern is formed also in a portion of the first main surface where the zigzag conductor pattern does not exist.